Commit | Line | Data |
---|---|---|
95ea3627 | 1 | /* |
9c9a0d14 | 2 | Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> |
95ea3627 ID |
3 | <http://rt2x00.serialmonkey.com> |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the | |
17 | Free Software Foundation, Inc., | |
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | */ | |
20 | ||
21 | /* | |
22 | Module: rt2x00pci | |
23 | Abstract: rt2x00 generic pci device routines. | |
24 | */ | |
25 | ||
95ea3627 ID |
26 | #include <linux/dma-mapping.h> |
27 | #include <linux/kernel.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/pci.h> | |
5a0e3ad6 | 30 | #include <linux/slab.h> |
95ea3627 ID |
31 | |
32 | #include "rt2x00.h" | |
33 | #include "rt2x00pci.h" | |
34 | ||
c9c3b1a5 ID |
35 | /* |
36 | * Register access. | |
37 | */ | |
38 | int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev, | |
39 | const unsigned int offset, | |
40 | const struct rt2x00_field32 field, | |
41 | u32 *reg) | |
42 | { | |
43 | unsigned int i; | |
44 | ||
c70762f9 AB |
45 | if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) |
46 | return 0; | |
47 | ||
c9c3b1a5 ID |
48 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
49 | rt2x00pci_register_read(rt2x00dev, offset, reg); | |
50 | if (!rt2x00_get_field32(*reg, field)) | |
51 | return 1; | |
52 | udelay(REGISTER_BUSY_DELAY); | |
53 | } | |
54 | ||
55 | ERROR(rt2x00dev, "Indirect register access failed: " | |
56 | "offset=0x%.08x, value=0x%.08x\n", offset, *reg); | |
57 | *reg = ~0; | |
58 | ||
59 | return 0; | |
60 | } | |
61 | EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read); | |
62 | ||
95ea3627 ID |
63 | /* |
64 | * TX data handlers. | |
65 | */ | |
6db3786a | 66 | int rt2x00pci_write_tx_data(struct queue_entry *entry) |
95ea3627 | 67 | { |
798b7adb | 68 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
b8be63ff | 69 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
181d6902 | 70 | struct skb_frame_desc *skbdesc; |
95ea3627 | 71 | |
6db3786a ID |
72 | /* |
73 | * This should not happen, we already checked the entry | |
74 | * was ours. When the hardware disagrees there has been | |
75 | * a queue corruption! | |
76 | */ | |
798b7adb ID |
77 | if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) { |
78 | ERROR(rt2x00dev, | |
6db3786a | 79 | "Corrupt queue %d, accessing entry which is not ours.\n" |
95ea3627 | 80 | "Please file bug report to %s.\n", |
e58c6aca | 81 | entry->queue->qid, DRV_PROJECT); |
95ea3627 ID |
82 | return -EINVAL; |
83 | } | |
84 | ||
08992f7f ID |
85 | /* |
86 | * Fill in skb descriptor | |
87 | */ | |
6db3786a | 88 | skbdesc = get_skb_frame_desc(entry->skb); |
b8be63ff | 89 | skbdesc->desc = entry_priv->desc; |
6db3786a | 90 | skbdesc->desc_len = entry->queue->desc_size; |
95ea3627 | 91 | |
95ea3627 ID |
92 | return 0; |
93 | } | |
94 | EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); | |
95 | ||
96 | /* | |
3957ccb5 | 97 | * TX/RX data handlers. |
95ea3627 ID |
98 | */ |
99 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) | |
100 | { | |
181d6902 ID |
101 | struct data_queue *queue = rt2x00dev->rx; |
102 | struct queue_entry *entry; | |
b8be63ff | 103 | struct queue_entry_priv_pci *entry_priv; |
c4da0048 | 104 | struct skb_frame_desc *skbdesc; |
95ea3627 ID |
105 | |
106 | while (1) { | |
181d6902 | 107 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
b8be63ff | 108 | entry_priv = entry->priv_data; |
95ea3627 | 109 | |
798b7adb | 110 | if (rt2x00dev->ops->lib->get_entry_state(entry)) |
95ea3627 ID |
111 | break; |
112 | ||
c4da0048 GW |
113 | /* |
114 | * Fill in desc fields of the skb descriptor | |
115 | */ | |
116 | skbdesc = get_skb_frame_desc(entry->skb); | |
117 | skbdesc->desc = entry_priv->desc; | |
118 | skbdesc->desc_len = entry->queue->desc_size; | |
119 | ||
120 | /* | |
121 | * Send the frame to rt2x00lib for further processing. | |
122 | */ | |
123 | rt2x00lib_rxdone(rt2x00dev, entry); | |
95ea3627 ID |
124 | } |
125 | } | |
126 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); | |
127 | ||
128 | /* | |
129 | * Device initialization handlers. | |
130 | */ | |
181d6902 ID |
131 | static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev, |
132 | struct data_queue *queue) | |
95ea3627 | 133 | { |
b8be63ff | 134 | struct queue_entry_priv_pci *entry_priv; |
30b3a23c ID |
135 | void *addr; |
136 | dma_addr_t dma; | |
95ea3627 ID |
137 | unsigned int i; |
138 | ||
139 | /* | |
140 | * Allocate DMA memory for descriptor and buffer. | |
141 | */ | |
c4da0048 GW |
142 | addr = dma_alloc_coherent(rt2x00dev->dev, |
143 | queue->limit * queue->desc_size, | |
144 | &dma, GFP_KERNEL | GFP_DMA); | |
30b3a23c | 145 | if (!addr) |
95ea3627 ID |
146 | return -ENOMEM; |
147 | ||
c4da0048 | 148 | memset(addr, 0, queue->limit * queue->desc_size); |
9c9dd2c9 | 149 | |
95ea3627 | 150 | /* |
181d6902 | 151 | * Initialize all queue entries to contain valid addresses. |
95ea3627 | 152 | */ |
181d6902 | 153 | for (i = 0; i < queue->limit; i++) { |
b8be63ff | 154 | entry_priv = queue->entries[i].priv_data; |
c4da0048 GW |
155 | entry_priv->desc = addr + i * queue->desc_size; |
156 | entry_priv->desc_dma = dma + i * queue->desc_size; | |
95ea3627 ID |
157 | } |
158 | ||
159 | return 0; | |
160 | } | |
161 | ||
181d6902 ID |
162 | static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev, |
163 | struct data_queue *queue) | |
95ea3627 | 164 | { |
b8be63ff ID |
165 | struct queue_entry_priv_pci *entry_priv = |
166 | queue->entries[0].priv_data; | |
181d6902 | 167 | |
c4da0048 GW |
168 | if (entry_priv->desc) |
169 | dma_free_coherent(rt2x00dev->dev, | |
170 | queue->limit * queue->desc_size, | |
171 | entry_priv->desc, entry_priv->desc_dma); | |
172 | entry_priv->desc = NULL; | |
95ea3627 ID |
173 | } |
174 | ||
175 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) | |
176 | { | |
181d6902 | 177 | struct data_queue *queue; |
95ea3627 ID |
178 | int status; |
179 | ||
180 | /* | |
181 | * Allocate DMA | |
182 | */ | |
181d6902 ID |
183 | queue_for_each(rt2x00dev, queue) { |
184 | status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue); | |
95ea3627 ID |
185 | if (status) |
186 | goto exit; | |
187 | } | |
188 | ||
189 | /* | |
190 | * Register interrupt handler. | |
191 | */ | |
440ddada ID |
192 | status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler, |
193 | IRQF_SHARED, rt2x00dev->name, rt2x00dev); | |
95ea3627 ID |
194 | if (status) { |
195 | ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n", | |
440ddada | 196 | rt2x00dev->irq, status); |
b30cdfc5 | 197 | goto exit; |
95ea3627 ID |
198 | } |
199 | ||
200 | return 0; | |
201 | ||
202 | exit: | |
b30cdfc5 ID |
203 | queue_for_each(rt2x00dev, queue) |
204 | rt2x00pci_free_queue_dma(rt2x00dev, queue); | |
95ea3627 ID |
205 | |
206 | return status; | |
207 | } | |
208 | EXPORT_SYMBOL_GPL(rt2x00pci_initialize); | |
209 | ||
210 | void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) | |
211 | { | |
181d6902 | 212 | struct data_queue *queue; |
95ea3627 ID |
213 | |
214 | /* | |
215 | * Free irq line. | |
216 | */ | |
14a3bf89 | 217 | free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev); |
95ea3627 ID |
218 | |
219 | /* | |
220 | * Free DMA | |
221 | */ | |
181d6902 ID |
222 | queue_for_each(rt2x00dev, queue) |
223 | rt2x00pci_free_queue_dma(rt2x00dev, queue); | |
95ea3627 ID |
224 | } |
225 | EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize); | |
226 | ||
227 | /* | |
228 | * PCI driver handlers. | |
229 | */ | |
230 | static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev) | |
231 | { | |
232 | kfree(rt2x00dev->rf); | |
233 | rt2x00dev->rf = NULL; | |
234 | ||
235 | kfree(rt2x00dev->eeprom); | |
236 | rt2x00dev->eeprom = NULL; | |
237 | ||
21795094 ID |
238 | if (rt2x00dev->csr.base) { |
239 | iounmap(rt2x00dev->csr.base); | |
240 | rt2x00dev->csr.base = NULL; | |
95ea3627 ID |
241 | } |
242 | } | |
243 | ||
244 | static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev) | |
245 | { | |
14a3bf89 | 246 | struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev); |
95ea3627 | 247 | |
275f165f | 248 | rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0); |
21795094 | 249 | if (!rt2x00dev->csr.base) |
95ea3627 ID |
250 | goto exit; |
251 | ||
252 | rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL); | |
253 | if (!rt2x00dev->eeprom) | |
254 | goto exit; | |
255 | ||
256 | rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL); | |
257 | if (!rt2x00dev->rf) | |
258 | goto exit; | |
259 | ||
260 | return 0; | |
261 | ||
262 | exit: | |
263 | ERROR_PROBE("Failed to allocate registers.\n"); | |
264 | ||
265 | rt2x00pci_free_reg(rt2x00dev); | |
266 | ||
267 | return -ENOMEM; | |
268 | } | |
269 | ||
270 | int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |
271 | { | |
272 | struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data; | |
273 | struct ieee80211_hw *hw; | |
274 | struct rt2x00_dev *rt2x00dev; | |
275 | int retval; | |
276 | ||
277 | retval = pci_request_regions(pci_dev, pci_name(pci_dev)); | |
278 | if (retval) { | |
279 | ERROR_PROBE("PCI request regions failed.\n"); | |
280 | return retval; | |
281 | } | |
282 | ||
283 | retval = pci_enable_device(pci_dev); | |
284 | if (retval) { | |
285 | ERROR_PROBE("Enable device failed.\n"); | |
286 | goto exit_release_regions; | |
287 | } | |
288 | ||
289 | pci_set_master(pci_dev); | |
290 | ||
291 | if (pci_set_mwi(pci_dev)) | |
292 | ERROR_PROBE("MWI not available.\n"); | |
293 | ||
284901a9 | 294 | if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) { |
95ea3627 ID |
295 | ERROR_PROBE("PCI DMA not supported.\n"); |
296 | retval = -EIO; | |
297 | goto exit_disable_device; | |
298 | } | |
299 | ||
300 | hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw); | |
301 | if (!hw) { | |
302 | ERROR_PROBE("Failed to allocate hardware.\n"); | |
303 | retval = -ENOMEM; | |
304 | goto exit_disable_device; | |
305 | } | |
306 | ||
307 | pci_set_drvdata(pci_dev, hw); | |
308 | ||
309 | rt2x00dev = hw->priv; | |
14a3bf89 | 310 | rt2x00dev->dev = &pci_dev->dev; |
95ea3627 ID |
311 | rt2x00dev->ops = ops; |
312 | rt2x00dev->hw = hw; | |
440ddada ID |
313 | rt2x00dev->irq = pci_dev->irq; |
314 | rt2x00dev->name = pci_name(pci_dev); | |
315 | ||
2015d192 GW |
316 | rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI); |
317 | ||
95ea3627 ID |
318 | retval = rt2x00pci_alloc_reg(rt2x00dev); |
319 | if (retval) | |
320 | goto exit_free_device; | |
321 | ||
322 | retval = rt2x00lib_probe_dev(rt2x00dev); | |
323 | if (retval) | |
324 | goto exit_free_reg; | |
325 | ||
326 | return 0; | |
327 | ||
328 | exit_free_reg: | |
329 | rt2x00pci_free_reg(rt2x00dev); | |
330 | ||
331 | exit_free_device: | |
332 | ieee80211_free_hw(hw); | |
333 | ||
334 | exit_disable_device: | |
335 | if (retval != -EBUSY) | |
336 | pci_disable_device(pci_dev); | |
337 | ||
338 | exit_release_regions: | |
339 | pci_release_regions(pci_dev); | |
340 | ||
341 | pci_set_drvdata(pci_dev, NULL); | |
342 | ||
343 | return retval; | |
344 | } | |
345 | EXPORT_SYMBOL_GPL(rt2x00pci_probe); | |
346 | ||
347 | void rt2x00pci_remove(struct pci_dev *pci_dev) | |
348 | { | |
349 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); | |
350 | struct rt2x00_dev *rt2x00dev = hw->priv; | |
351 | ||
352 | /* | |
353 | * Free all allocated data. | |
354 | */ | |
355 | rt2x00lib_remove_dev(rt2x00dev); | |
356 | rt2x00pci_free_reg(rt2x00dev); | |
357 | ieee80211_free_hw(hw); | |
358 | ||
359 | /* | |
360 | * Free the PCI device data. | |
361 | */ | |
362 | pci_set_drvdata(pci_dev, NULL); | |
363 | pci_disable_device(pci_dev); | |
364 | pci_release_regions(pci_dev); | |
365 | } | |
366 | EXPORT_SYMBOL_GPL(rt2x00pci_remove); | |
367 | ||
368 | #ifdef CONFIG_PM | |
369 | int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state) | |
370 | { | |
371 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); | |
372 | struct rt2x00_dev *rt2x00dev = hw->priv; | |
373 | int retval; | |
374 | ||
375 | retval = rt2x00lib_suspend(rt2x00dev, state); | |
376 | if (retval) | |
377 | return retval; | |
378 | ||
95ea3627 ID |
379 | pci_save_state(pci_dev); |
380 | pci_disable_device(pci_dev); | |
381 | return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)); | |
382 | } | |
383 | EXPORT_SYMBOL_GPL(rt2x00pci_suspend); | |
384 | ||
385 | int rt2x00pci_resume(struct pci_dev *pci_dev) | |
386 | { | |
387 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); | |
388 | struct rt2x00_dev *rt2x00dev = hw->priv; | |
95ea3627 ID |
389 | |
390 | if (pci_set_power_state(pci_dev, PCI_D0) || | |
391 | pci_enable_device(pci_dev) || | |
392 | pci_restore_state(pci_dev)) { | |
393 | ERROR(rt2x00dev, "Failed to resume device.\n"); | |
394 | return -EIO; | |
395 | } | |
396 | ||
499a214c | 397 | return rt2x00lib_resume(rt2x00dev); |
95ea3627 ID |
398 | } |
399 | EXPORT_SYMBOL_GPL(rt2x00pci_resume); | |
400 | #endif /* CONFIG_PM */ | |
401 | ||
402 | /* | |
403 | * rt2x00pci module information. | |
404 | */ | |
405 | MODULE_AUTHOR(DRV_PROJECT); | |
406 | MODULE_VERSION(DRV_VERSION); | |
181d6902 | 407 | MODULE_DESCRIPTION("rt2x00 pci library"); |
95ea3627 | 408 | MODULE_LICENSE("GPL"); |