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Merge branch 'bkl/procfs' of git://git.kernel.org/pub/scm/linux/kernel/git/frederic...
[linux-2.6-block.git] / drivers / mmc / host / sdhci-pci.c
CommitLineData
b8c86fc5
PO		 1/* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
2 *
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
9 *
10 * Thanks to the following companies for their support:
11 *
12 * - JMicron (hardware and technical support)
13 */
14
15#include <linux/delay.h>
16#include <linux/highmem.h>
17#include <linux/pci.h>
18#include <linux/dma-mapping.h>
5a0e3ad6 19#include <linux/slab.h>
b8c86fc5
PO		 20
21#include <linux/mmc/host.h>
22
23#include <asm/scatterlist.h>
24#include <asm/io.h>
25
26#include "sdhci.h"
27
28/*
29 * PCI registers
30 */
31
32#define PCI_SDHCI_IFPIO 0x00
33#define PCI_SDHCI_IFDMA 0x01
34#define PCI_SDHCI_IFVENDOR 0x02
35
36#define PCI_SLOT_INFO 0x40 /* 8 bits */
37#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
38#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
39
40#define MAX_SLOTS 8
41
22606405 42struct sdhci_pci_chip;
4489428a 43struct sdhci_pci_slot;
22606405
PO		 44
45struct sdhci_pci_fixes {
46 unsigned int quirks;
47
48 int (*probe)(struct sdhci_pci_chip*);
45211e21 49
4489428a 50 int (*probe_slot)(struct sdhci_pci_slot*);
1e72859e 51 void (*remove_slot)(struct sdhci_pci_slot*, int);
4489428a
PO		 52
53 int (*suspend)(struct sdhci_pci_chip*,
54 pm_message_t);
45211e21 55 int (*resume)(struct sdhci_pci_chip*);
22606405
PO		 56};
57
58struct sdhci_pci_slot {
59 struct sdhci_pci_chip *chip;
60 struct sdhci_host *host;
b8c86fc5 61
22606405
PO		 62 int pci_bar;
63};
64
65struct sdhci_pci_chip {
66 struct pci_dev *pdev;
67
68 unsigned int quirks;
69 const struct sdhci_pci_fixes *fixes;
70
71 int num_slots; /* Slots on controller */
72 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
73};
74
75
76/*****************************************************************************\
77 * *
78 * Hardware specific quirk handling *
79 * *
80\*****************************************************************************/
81
82static int ricoh_probe(struct sdhci_pci_chip *chip)
83{
c99436fb
CB		 84 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
85 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
22606405
PO		 86 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
87
88 return 0;
89}
90
91static const struct sdhci_pci_fixes sdhci_ricoh = {
92 .probe = ricoh_probe,
84938294
VK		 93 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
94 SDHCI_QUIRK_FORCE_DMA |
95 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
22606405
PO		 96};
97
98static const struct sdhci_pci_fixes sdhci_ene_712 = {
99 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
100 SDHCI_QUIRK_BROKEN_DMA,
101};
102
103static const struct sdhci_pci_fixes sdhci_ene_714 = {
104 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
105 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
106 SDHCI_QUIRK_BROKEN_DMA,
107};
108
109static const struct sdhci_pci_fixes sdhci_cafe = {
110 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
a0874897 111 SDHCI_QUIRK_NO_BUSY_IRQ |
ee53ab5d 112 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
22606405
PO		 113};
114
45211e21
PO		 115static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
116{
117 u8 scratch;
118 int ret;
119
120 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
121 if (ret)
122 return ret;
123
124 /*
125 * Turn PMOS on [bit 0], set over current detection to 2.4 V
126 * [bit 1:2] and enable over current debouncing [bit 6].
127 */
128 if (on)
129 scratch |= 0x47;
130 else
131 scratch &= ~0x47;
132
133 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
134 if (ret)
135 return ret;
136
137 return 0;
138}
139
140static int jmicron_probe(struct sdhci_pci_chip *chip)
141{
142 int ret;
143
93fc48c7
PO		 144 if (chip->pdev->revision == 0) {
145 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
146 SDHCI_QUIRK_32BIT_DMA_SIZE |
2134a922 147 SDHCI_QUIRK_32BIT_ADMA_SIZE |
4a3cba32 148 SDHCI_QUIRK_RESET_AFTER_REQUEST |
86a6a874 149 SDHCI_QUIRK_BROKEN_SMALL_PIO;
93fc48c7
PO		 150 }
151
4489428a
PO		 152 /*
153 * JMicron chips can have two interfaces to the same hardware
154 * in order to work around limitations in Microsoft's driver.
155 * We need to make sure we only bind to one of them.
156 *
157 * This code assumes two things:
158 *
159 * 1. The PCI code adds subfunctions in order.
160 *
161 * 2. The MMC interface has a lower subfunction number
162 * than the SD interface.
163 */
164 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
165 struct pci_dev *sd_dev;
166
167 sd_dev = NULL;
168 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
169 PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
170 if ((PCI_SLOT(chip->pdev->devfn) ==
171 PCI_SLOT(sd_dev->devfn)) &&
172 (chip->pdev->bus == sd_dev->bus))
173 break;
174 }
175
176 if (sd_dev) {
177 pci_dev_put(sd_dev);
178 dev_info(&chip->pdev->dev, "Refusing to bind to "
179 "secondary interface.\n");
180 return -ENODEV;
181 }
182 }
183
45211e21
PO		 184 /*
185 * JMicron chips need a bit of a nudge to enable the power
186 * output pins.
187 */
188 ret = jmicron_pmos(chip, 1);
189 if (ret) {
190 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
191 return ret;
192 }
193
194 return 0;
195}
196
4489428a
PO		 197static void jmicron_enable_mmc(struct sdhci_host *host, int on)
198{
199 u8 scratch;
200
201 scratch = readb(host->ioaddr + 0xC0);
202
203 if (on)
204 scratch |= 0x01;
205 else
206 scratch &= ~0x01;
207
208 writeb(scratch, host->ioaddr + 0xC0);
209}
210
211static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
212{
2134a922
PO		 213 if (slot->chip->pdev->revision == 0) {
214 u16 version;
215
216 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
217 version = (version & SDHCI_VENDOR_VER_MASK) >>
218 SDHCI_VENDOR_VER_SHIFT;
219
220 /*
221 * Older versions of the chip have lots of nasty glitches
222 * in the ADMA engine. It's best just to avoid it
223 * completely.
224 */
225 if (version < 0xAC)
226 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
227 }
228
4489428a
PO		 229 /*
230 * The secondary interface requires a bit set to get the
231 * interrupts.
232 */
233 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
234 jmicron_enable_mmc(slot->host, 1);
235
236 return 0;
237}
238
1e72859e 239static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
4489428a 240{
1e72859e
PO		 241 if (dead)
242 return;
243
4489428a
PO		 244 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
245 jmicron_enable_mmc(slot->host, 0);
246}
247
248static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
249{
250 int i;
251
252 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
253 for (i = 0;i < chip->num_slots;i++)
254 jmicron_enable_mmc(chip->slots[i]->host, 0);
255 }
256
257 return 0;
258}
259
45211e21
PO		 260static int jmicron_resume(struct sdhci_pci_chip *chip)
261{
4489428a
PO		 262 int ret, i;
263
264 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
265 for (i = 0;i < chip->num_slots;i++)
266 jmicron_enable_mmc(chip->slots[i]->host, 1);
267 }
45211e21
PO		 268
269 ret = jmicron_pmos(chip, 1);
270 if (ret) {
271 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
272 return ret;
273 }
274
275 return 0;
276}
277
22606405 278static const struct sdhci_pci_fixes sdhci_jmicron = {
45211e21
PO		 279 .probe = jmicron_probe,
280
4489428a
PO		 281 .probe_slot = jmicron_probe_slot,
282 .remove_slot = jmicron_remove_slot,
283
284 .suspend = jmicron_suspend,
45211e21 285 .resume = jmicron_resume,
22606405
PO		 286};
287
a7a6186c
NP		 288/* SysKonnect CardBus2SDIO extra registers */
289#define SYSKT_CTRL 0x200
290#define SYSKT_RDFIFO_STAT 0x204
291#define SYSKT_WRFIFO_STAT 0x208
292#define SYSKT_POWER_DATA 0x20c
293#define SYSKT_POWER_330 0xef
294#define SYSKT_POWER_300 0xf8
295#define SYSKT_POWER_184 0xcc
296#define SYSKT_POWER_CMD 0x20d
297#define SYSKT_POWER_START (1 << 7)
298#define SYSKT_POWER_STATUS 0x20e
299#define SYSKT_POWER_STATUS_OK (1 << 0)
300#define SYSKT_BOARD_REV 0x210
301#define SYSKT_CHIP_REV 0x211
302#define SYSKT_CONF_DATA 0x212
303#define SYSKT_CONF_DATA_1V8 (1 << 2)
304#define SYSKT_CONF_DATA_2V5 (1 << 1)
305#define SYSKT_CONF_DATA_3V3 (1 << 0)
306
307static int syskt_probe(struct sdhci_pci_chip *chip)
308{
309 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
310 chip->pdev->class &= ~0x0000FF;
311 chip->pdev->class |= PCI_SDHCI_IFDMA;
312 }
313 return 0;
314}
315
316static int syskt_probe_slot(struct sdhci_pci_slot *slot)
317{
318 int tm, ps;
319
320 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
321 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
322 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
323 "board rev %d.%d, chip rev %d.%d\n",
324 board_rev >> 4, board_rev & 0xf,
325 chip_rev >> 4, chip_rev & 0xf);
326 if (chip_rev >= 0x20)
327 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
328
329 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
330 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
331 udelay(50);
332 tm = 10; /* Wait max 1 ms */
333 do {
334 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
335 if (ps & SYSKT_POWER_STATUS_OK)
336 break;
337 udelay(100);
338 } while (--tm);
339 if (!tm) {
340 dev_err(&slot->chip->pdev->dev,
341 "power regulator never stabilized");
342 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
343 return -ENODEV;
344 }
345
346 return 0;
347}
348
349static const struct sdhci_pci_fixes sdhci_syskt = {
350 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
351 .probe = syskt_probe,
352 .probe_slot = syskt_probe_slot,
353};
354
557b0697
HW		 355static int via_probe(struct sdhci_pci_chip *chip)
356{
357 if (chip->pdev->revision == 0x10)
358 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
359
360 return 0;
361}
362
363static const struct sdhci_pci_fixes sdhci_via = {
364 .probe = via_probe,
365};
366
22606405 367static const struct pci_device_id pci_ids[] __devinitdata = {
b8c86fc5
PO		 368 {
369 .vendor = PCI_VENDOR_ID_RICOH,
370 .device = PCI_DEVICE_ID_RICOH_R5C822,
22606405 371 .subvendor = PCI_ANY_ID,
b8c86fc5 372 .subdevice = PCI_ANY_ID,
22606405 373 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
b8c86fc5
PO		 374 },
375
376 {
377 .vendor = PCI_VENDOR_ID_ENE,
378 .device = PCI_DEVICE_ID_ENE_CB712_SD,
379 .subvendor = PCI_ANY_ID,
380 .subdevice = PCI_ANY_ID,
22606405 381 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
b8c86fc5
PO		 382 },
383
384 {
385 .vendor = PCI_VENDOR_ID_ENE,
386 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
387 .subvendor = PCI_ANY_ID,
388 .subdevice = PCI_ANY_ID,
22606405 389 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
b8c86fc5
PO		 390 },
391
392 {
393 .vendor = PCI_VENDOR_ID_ENE,
394 .device = PCI_DEVICE_ID_ENE_CB714_SD,
395 .subvendor = PCI_ANY_ID,
396 .subdevice = PCI_ANY_ID,
22606405 397 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
b8c86fc5
PO		 398 },
399
400 {
401 .vendor = PCI_VENDOR_ID_ENE,
402 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
403 .subvendor = PCI_ANY_ID,
404 .subdevice = PCI_ANY_ID,
22606405 405 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
b8c86fc5
PO		 406 },
407
408 {
409 .vendor = PCI_VENDOR_ID_MARVELL,
8c5eb880 410 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
b8c86fc5
PO		 411 .subvendor = PCI_ANY_ID,
412 .subdevice = PCI_ANY_ID,
22606405 413 .driver_data = (kernel_ulong_t)&sdhci_cafe,
b8c86fc5
PO		 414 },
415
416 {
417 .vendor = PCI_VENDOR_ID_JMICRON,
418 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
419 .subvendor = PCI_ANY_ID,
420 .subdevice = PCI_ANY_ID,
22606405 421 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
b8c86fc5
PO		 422 },
423
4489428a
PO		 424 {
425 .vendor = PCI_VENDOR_ID_JMICRON,
426 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
427 .subvendor = PCI_ANY_ID,
428 .subdevice = PCI_ANY_ID,
429 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
430 },
431
a7a6186c
NP		 432 {
433 .vendor = PCI_VENDOR_ID_SYSKONNECT,
434 .device = 0x8000,
435 .subvendor = PCI_ANY_ID,
436 .subdevice = PCI_ANY_ID,
437 .driver_data = (kernel_ulong_t)&sdhci_syskt,
438 },
439
557b0697
HW		 440 {
441 .vendor = PCI_VENDOR_ID_VIA,
442 .device = 0x95d0,
443 .subvendor = PCI_ANY_ID,
444 .subdevice = PCI_ANY_ID,
445 .driver_data = (kernel_ulong_t)&sdhci_via,
446 },
447
b8c86fc5
PO		 448 { /* Generic SD host controller */
449 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
450 },
451
452 { /* end: all zeroes */ },
453};
454
455MODULE_DEVICE_TABLE(pci, pci_ids);
456
b8c86fc5
PO		 457/*****************************************************************************\
458 * *
459 * SDHCI core callbacks *
460 * *
461\*****************************************************************************/
462
463static int sdhci_pci_enable_dma(struct sdhci_host *host)
464{
465 struct sdhci_pci_slot *slot;
466 struct pci_dev *pdev;
467 int ret;
468
469 slot = sdhci_priv(host);
470 pdev = slot->chip->pdev;
471
472 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
473 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
a13abc7b 474 (host->flags & SDHCI_USE_SDMA)) {
b8c86fc5
PO		 475 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
476 "doesn't fully claim to support it.\n");
477 }
478
284901a9 479 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
b8c86fc5
PO		 480 if (ret)
481 return ret;
482
483 pci_set_master(pdev);
484
485 return 0;
486}
487
488static struct sdhci_ops sdhci_pci_ops = {
489 .enable_dma = sdhci_pci_enable_dma,
490};
491
492/*****************************************************************************\
493 * *
494 * Suspend/resume *
495 * *
496\*****************************************************************************/
497
498#ifdef CONFIG_PM
499
500static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
501{
502 struct sdhci_pci_chip *chip;
503 struct sdhci_pci_slot *slot;
2f4cbb3d 504 mmc_pm_flag_t pm_flags = 0;
b8c86fc5
PO		 505 int i, ret;
506
507 chip = pci_get_drvdata(pdev);
508 if (!chip)
509 return 0;
510
511 for (i = 0;i < chip->num_slots;i++) {
512 slot = chip->slots[i];
513 if (!slot)
514 continue;
515
516 ret = sdhci_suspend_host(slot->host, state);
517
518 if (ret) {
519 for (i--;i >= 0;i--)
520 sdhci_resume_host(chip->slots[i]->host);
521 return ret;
522 }
2f4cbb3d
NP		 523
524 pm_flags |= slot->host->mmc->pm_flags;
b8c86fc5
PO		 525 }
526
4489428a
PO		 527 if (chip->fixes && chip->fixes->suspend) {
528 ret = chip->fixes->suspend(chip, state);
529 if (ret) {
530 for (i = chip->num_slots - 1;i >= 0;i--)
531 sdhci_resume_host(chip->slots[i]->host);
532 return ret;
533 }
534 }
535
b8c86fc5 536 pci_save_state(pdev);
2f4cbb3d
NP		 537 if (pm_flags & MMC_PM_KEEP_POWER) {
538 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
539 pci_enable_wake(pdev, PCI_D3hot, 1);
540 pci_set_power_state(pdev, PCI_D3hot);
541 } else {
542 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
543 pci_disable_device(pdev);
544 pci_set_power_state(pdev, pci_choose_state(pdev, state));
545 }
b8c86fc5
PO		 546
547 return 0;
548}
549
550static int sdhci_pci_resume (struct pci_dev *pdev)
551{
552 struct sdhci_pci_chip *chip;
553 struct sdhci_pci_slot *slot;
554 int i, ret;
555
556 chip = pci_get_drvdata(pdev);
557 if (!chip)
558 return 0;
559
560 pci_set_power_state(pdev, PCI_D0);
561 pci_restore_state(pdev);
562 ret = pci_enable_device(pdev);
563 if (ret)
564 return ret;
565
45211e21
PO		 566 if (chip->fixes && chip->fixes->resume) {
567 ret = chip->fixes->resume(chip);
568 if (ret)
569 return ret;
570 }
571
b8c86fc5
PO		 572 for (i = 0;i < chip->num_slots;i++) {
573 slot = chip->slots[i];
574 if (!slot)
575 continue;
576
577 ret = sdhci_resume_host(slot->host);
578 if (ret)
579 return ret;
580 }
581
582 return 0;
583}
584
585#else /* CONFIG_PM */
586
587#define sdhci_pci_suspend NULL
588#define sdhci_pci_resume NULL
589
590#endif /* CONFIG_PM */
591
592/*****************************************************************************\
593 * *
594 * Device probing/removal *
595 * *
596\*****************************************************************************/
597
598static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
599 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
600{
601 struct sdhci_pci_slot *slot;
602 struct sdhci_host *host;
603
604 resource_size_t addr;
605
606 int ret;
607
608 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
609 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
610 return ERR_PTR(-ENODEV);
611 }
612
613 if (pci_resource_len(pdev, bar) != 0x100) {
614 dev_err(&pdev->dev, "Invalid iomem size. You may "
615 "experience problems.\n");
616 }
617
618 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
619 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
620 return ERR_PTR(-ENODEV);
621 }
622
623 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
624 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
625 return ERR_PTR(-ENODEV);
626 }
627
628 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
629 if (IS_ERR(host)) {
c60a32cd
DC		 630 dev_err(&pdev->dev, "cannot allocate host\n");
631 return ERR_PTR(PTR_ERR(host));
b8c86fc5
PO		 632 }
633
634 slot = sdhci_priv(host);
635
636 slot->chip = chip;
637 slot->host = host;
638 slot->pci_bar = bar;
639
640 host->hw_name = "PCI";
641 host->ops = &sdhci_pci_ops;
642 host->quirks = chip->quirks;
643
644 host->irq = pdev->irq;
645
646 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
647 if (ret) {
648 dev_err(&pdev->dev, "cannot request region\n");
c60a32cd 649 goto free;
b8c86fc5
PO		 650 }
651
652 addr = pci_resource_start(pdev, bar);
092f82ed 653 host->ioaddr = pci_ioremap_bar(pdev, bar);
b8c86fc5
PO		 654 if (!host->ioaddr) {
655 dev_err(&pdev->dev, "failed to remap registers\n");
656 goto release;
657 }
658
4489428a
PO		 659 if (chip->fixes && chip->fixes->probe_slot) {
660 ret = chip->fixes->probe_slot(slot);
661 if (ret)
662 goto unmap;
663 }
664
2f4cbb3d
NP		 665 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
666
b8c86fc5
PO		 667 ret = sdhci_add_host(host);
668 if (ret)
4489428a 669 goto remove;
b8c86fc5
PO		 670
671 return slot;
672
4489428a
PO		 673remove:
674 if (chip->fixes && chip->fixes->remove_slot)
1e72859e 675 chip->fixes->remove_slot(slot, 0);
4489428a 676
b8c86fc5
PO		 677unmap:
678 iounmap(host->ioaddr);
679
680release:
681 pci_release_region(pdev, bar);
c60a32cd
DC		 682
683free:
b8c86fc5
PO		 684 sdhci_free_host(host);
685
686 return ERR_PTR(ret);
687}
688
689static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
690{
1e72859e
PO		 691 int dead;
692 u32 scratch;
693
694 dead = 0;
695 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
696 if (scratch == (u32)-1)
697 dead = 1;
698
699 sdhci_remove_host(slot->host, dead);
4489428a
PO		 700
701 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1e72859e 702 slot->chip->fixes->remove_slot(slot, dead);
4489428a 703
b8c86fc5 704 pci_release_region(slot->chip->pdev, slot->pci_bar);
4489428a 705
b8c86fc5
PO		 706 sdhci_free_host(slot->host);
707}
708
709static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
710 const struct pci_device_id *ent)
711{
712 struct sdhci_pci_chip *chip;
713 struct sdhci_pci_slot *slot;
714
715 u8 slots, rev, first_bar;
716 int ret, i;
717
718 BUG_ON(pdev == NULL);
719 BUG_ON(ent == NULL);
720
721 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
722
723 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
724 (int)pdev->vendor, (int)pdev->device, (int)rev);
725
726 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
727 if (ret)
728 return ret;
729
730 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
731 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
732 if (slots == 0)
733 return -ENODEV;
734
735 BUG_ON(slots > MAX_SLOTS);
736
737 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
738 if (ret)
739 return ret;
740
741 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
742
743 if (first_bar > 5) {
744 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
745 return -ENODEV;
746 }
747
748 ret = pci_enable_device(pdev);
749 if (ret)
750 return ret;
751
752 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
753 if (!chip) {
754 ret = -ENOMEM;
755 goto err;
756 }
757
758 chip->pdev = pdev;
22606405
PO		 759 chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
760 if (chip->fixes)
761 chip->quirks = chip->fixes->quirks;
b8c86fc5
PO		 762 chip->num_slots = slots;
763
764 pci_set_drvdata(pdev, chip);
765
22606405
PO		 766 if (chip->fixes && chip->fixes->probe) {
767 ret = chip->fixes->probe(chip);
768 if (ret)
769 goto free;
770 }
771
b8c86fc5
PO		 772 for (i = 0;i < slots;i++) {
773 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
774 if (IS_ERR(slot)) {
775 for (i--;i >= 0;i--)
776 sdhci_pci_remove_slot(chip->slots[i]);
777 ret = PTR_ERR(slot);
778 goto free;
779 }
780
781 chip->slots[i] = slot;
782 }
783
784 return 0;
785
786free:
787 pci_set_drvdata(pdev, NULL);
788 kfree(chip);
789
790err:
791 pci_disable_device(pdev);
792 return ret;
793}
794
795static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
796{
797 int i;
798 struct sdhci_pci_chip *chip;
799
800 chip = pci_get_drvdata(pdev);
801
802 if (chip) {
803 for (i = 0;i < chip->num_slots; i++)
804 sdhci_pci_remove_slot(chip->slots[i]);
805
806 pci_set_drvdata(pdev, NULL);
807 kfree(chip);
808 }
809
810 pci_disable_device(pdev);
811}
812
813static struct pci_driver sdhci_driver = {
814 .name = "sdhci-pci",
815 .id_table = pci_ids,
816 .probe = sdhci_pci_probe,
817 .remove = __devexit_p(sdhci_pci_remove),
818 .suspend = sdhci_pci_suspend,
819 .resume = sdhci_pci_resume,
820};
821
822/*****************************************************************************\
823 * *
824 * Driver init/exit *
825 * *
826\*****************************************************************************/
827
828static int __init sdhci_drv_init(void)
829{
830 return pci_register_driver(&sdhci_driver);
831}
832
833static void __exit sdhci_drv_exit(void)
834{
835 pci_unregister_driver(&sdhci_driver);
836}
837
838module_init(sdhci_drv_init);
839module_exit(sdhci_drv_exit);
840
32710e8f 841MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
b8c86fc5
PO		 842MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
843MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)