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Merge branch 'for-33' of git://repo.or.cz/linux-kbuild
[linux-2.6-block.git] / drivers / media / video / mx1_camera.c
CommitLineData
6acc81c3
PZ		 1/*
2 * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
3 *
4 * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
6 *
7 * Based on PXA SoC camera driver
8 * Copyright (C) 2006, Sascha Hauer, Pengutronix
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/clk.h>
17#include <linux/delay.h>
18#include <linux/device.h>
19#include <linux/dma-mapping.h>
20#include <linux/errno.h>
21#include <linux/fs.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/mutex.h>
30#include <linux/platform_device.h>
f39c1ab3 31#include <linux/sched.h>
6acc81c3
PZ		 32#include <linux/time.h>
33#include <linux/version.h>
34#include <linux/videodev2.h>
35
36#include <media/soc_camera.h>
37#include <media/v4l2-common.h>
38#include <media/v4l2-dev.h>
39#include <media/videobuf-dma-contig.h>
760697be 40#include <media/soc_mediabus.h>
6acc81c3
PZ		 41
42#include <asm/dma.h>
43#include <asm/fiq.h>
44#include <mach/dma-mx1-mx2.h>
45#include <mach/hardware.h>
46#include <mach/mx1_camera.h>
47
48/*
49 * CSI registers
50 */
51#define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
52#define DMA_DIMR 0x08 /* Interrupt mask Register */
53#define CSICR1 0x00 /* CSI Control Register 1 */
54#define CSISR 0x08 /* CSI Status Register */
55#define CSIRXR 0x10 /* CSI RxFIFO Register */
56
57#define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
58#define CSICR1_SOF_POL (1 << 17)
59#define CSICR1_SOF_INTEN (1 << 16)
60#define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
61#define CSICR1_MCLKEN (1 << 9)
62#define CSICR1_FCC (1 << 8)
63#define CSICR1_BIG_ENDIAN (1 << 7)
64#define CSICR1_CLR_RXFIFO (1 << 5)
65#define CSICR1_GCLK_MODE (1 << 4)
66#define CSICR1_DATA_POL (1 << 2)
67#define CSICR1_REDGE (1 << 1)
68#define CSICR1_EN (1 << 0)
69
70#define CSISR_SFF_OR_INT (1 << 25)
71#define CSISR_RFF_OR_INT (1 << 24)
72#define CSISR_STATFF_INT (1 << 21)
73#define CSISR_RXFF_INT (1 << 18)
74#define CSISR_SOF_INT (1 << 16)
75#define CSISR_DRDY (1 << 0)
76
77#define VERSION_CODE KERNEL_VERSION(0, 0, 1)
78#define DRIVER_NAME "mx1-camera"
79
80#define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
81 CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
82
83#define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
84 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
85 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
86 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
87 SOCAM_DATAWIDTH_8)
88
89#define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
90
91/*
92 * Structures
93 */
94
95/* buffer for one video frame */
96struct mx1_buffer {
97 /* common v4l buffer stuff -- must be first */
760697be
GL		 98 struct videobuf_buffer vb;
99 enum v4l2_mbus_pixelcode code;
100 int inwork;
6acc81c3
PZ		 101};
102
5d28d525
GL		 103/*
104 * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
6acc81c3 105 * Interface. If anyone ever builds hardware to enable more than
5d28d525
GL		 106 * one camera, they will have to modify this driver too
107 */
6acc81c3 108struct mx1_camera_dev {
eb6c8558 109 struct soc_camera_host soc_host;
6acc81c3
PZ		 110 struct soc_camera_device *icd;
111 struct mx1_camera_pdata *pdata;
112 struct mx1_buffer *active;
6acc81c3
PZ		 113 struct resource *res;
114 struct clk *clk;
115 struct list_head capture;
116
117 void __iomem *base;
118 int dma_chan;
119 unsigned int irq;
120 unsigned long mclk;
121
122 spinlock_t lock;
123};
124
125/*
126 * Videobuf operations
127 */
128static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
129 unsigned int *size)
130{
131 struct soc_camera_device *icd = vq->priv_data;
760697be
GL		 132 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
133 icd->current_fmt->host_fmt);
6acc81c3 134
760697be
GL		 135 if (bytes_per_line < 0)
136 return bytes_per_line;
137
138 *size = bytes_per_line * icd->user_height;
6acc81c3
PZ		 139
140 if (!*count)
141 *count = 32;
142
143 while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
144 (*count)--;
145
0166b743 146 dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
6acc81c3
PZ		 147
148 return 0;
149}
150
151static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
152{
153 struct soc_camera_device *icd = vq->priv_data;
154 struct videobuf_buffer *vb = &buf->vb;
155
156 BUG_ON(in_interrupt());
157
0166b743 158 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 159 vb, vb->baddr, vb->bsize);
160
5d28d525
GL		 161 /*
162 * This waits until this buffer is out of danger, i.e., until it is no
163 * longer in STATE_QUEUED or STATE_ACTIVE
164 */
6acc81c3
PZ		 165 videobuf_waiton(vb, 0, 0);
166 videobuf_dma_contig_free(vq, vb);
167
168 vb->state = VIDEOBUF_NEEDS_INIT;
169}
170
171static int mx1_videobuf_prepare(struct videobuf_queue *vq,
172 struct videobuf_buffer *vb, enum v4l2_field field)
173{
174 struct soc_camera_device *icd = vq->priv_data;
175 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
176 int ret;
760697be
GL		 177 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
178 icd->current_fmt->host_fmt);
179
180 if (bytes_per_line < 0)
181 return bytes_per_line;
6acc81c3 182
0166b743 183 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 184 vb, vb->baddr, vb->bsize);
185
186 /* Added list head initialization on alloc */
187 WARN_ON(!list_empty(&vb->queue));
188
189 BUG_ON(NULL == icd->current_fmt);
190
5d28d525
GL		 191 /*
192 * I think, in buf_prepare you only have to protect global data,
193 * the actual buffer is yours
194 */
6acc81c3
PZ		 195 buf->inwork = 1;
196
760697be 197 if (buf->code != icd->current_fmt->code ||
6a6c8786
GL		 198 vb->width != icd->user_width ||
199 vb->height != icd->user_height ||
6acc81c3 200 vb->field != field) {
760697be 201 buf->code = icd->current_fmt->code;
6a6c8786
GL		 202 vb->width = icd->user_width;
203 vb->height = icd->user_height;
6acc81c3
PZ		 204 vb->field = field;
205 vb->state = VIDEOBUF_NEEDS_INIT;
206 }
207
760697be 208 vb->size = bytes_per_line * vb->height;
6acc81c3
PZ		 209 if (0 != vb->baddr && vb->bsize < vb->size) {
210 ret = -EINVAL;
211 goto out;
212 }
213
214 if (vb->state == VIDEOBUF_NEEDS_INIT) {
215 ret = videobuf_iolock(vq, vb, NULL);
216 if (ret)
217 goto fail;
218
219 vb->state = VIDEOBUF_PREPARED;
220 }
221
222 buf->inwork = 0;
223
224 return 0;
225
226fail:
227 free_buffer(vq, buf);
228out:
229 buf->inwork = 0;
230 return ret;
231}
232
233static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
234{
235 struct videobuf_buffer *vbuf = &pcdev->active->vb;
0166b743 236 struct device *dev = pcdev->icd->dev.parent;
6acc81c3
PZ		 237 int ret;
238
239 if (unlikely(!pcdev->active)) {
0166b743 240 dev_err(dev, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 241 return -EFAULT;
242 }
243
244 /* setup sg list for future DMA */
245 ret = imx_dma_setup_single(pcdev->dma_chan,
246 videobuf_to_dma_contig(vbuf),
247 vbuf->size, pcdev->res->start +
248 CSIRXR, DMA_MODE_READ);
249 if (unlikely(ret))
0166b743 250 dev_err(dev, "Failed to setup DMA sg list\n");
6acc81c3
PZ		 251
252 return ret;
253}
254
2dd54a54 255/* Called under spinlock_irqsave(&pcdev->lock, ...) */
6acc81c3
PZ		 256static void mx1_videobuf_queue(struct videobuf_queue *vq,
257 struct videobuf_buffer *vb)
258{
259 struct soc_camera_device *icd = vq->priv_data;
260 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
261 struct mx1_camera_dev *pcdev = ici->priv;
262 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
6acc81c3 263
0166b743 264 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 265 vb, vb->baddr, vb->bsize);
266
6acc81c3
PZ		 267 list_add_tail(&vb->queue, &pcdev->capture);
268
269 vb->state = VIDEOBUF_ACTIVE;
270
271 if (!pcdev->active) {
272 pcdev->active = buf;
273
274 /* setup sg list for future DMA */
275 if (!mx1_camera_setup_dma(pcdev)) {
276 unsigned int temp;
277 /* enable SOF irq */
278 temp = __raw_readl(pcdev->base + CSICR1) |
279 CSICR1_SOF_INTEN;
280 __raw_writel(temp, pcdev->base + CSICR1);
281 }
282 }
6acc81c3
PZ		 283}
284
285static void mx1_videobuf_release(struct videobuf_queue *vq,
286 struct videobuf_buffer *vb)
287{
288 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
289#ifdef DEBUG
290 struct soc_camera_device *icd = vq->priv_data;
0166b743 291 struct device *dev = icd->dev.parent;
6acc81c3 292
0166b743 293 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 294 vb, vb->baddr, vb->bsize);
295
296 switch (vb->state) {
297 case VIDEOBUF_ACTIVE:
0166b743 298 dev_dbg(dev, "%s (active)\n", __func__);
6acc81c3
PZ		 299 break;
300 case VIDEOBUF_QUEUED:
0166b743 301 dev_dbg(dev, "%s (queued)\n", __func__);
6acc81c3
PZ		 302 break;
303 case VIDEOBUF_PREPARED:
0166b743 304 dev_dbg(dev, "%s (prepared)\n", __func__);
6acc81c3
PZ		 305 break;
306 default:
0166b743 307 dev_dbg(dev, "%s (unknown)\n", __func__);
6acc81c3
PZ		 308 break;
309 }
310#endif
311
312 free_buffer(vq, buf);
313}
314
315static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
316 struct videobuf_buffer *vb,
317 struct mx1_buffer *buf)
318{
319 /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
320 list_del_init(&vb->queue);
321 vb->state = VIDEOBUF_DONE;
322 do_gettimeofday(&vb->ts);
323 vb->field_count++;
324 wake_up(&vb->done);
325
326 if (list_empty(&pcdev->capture)) {
327 pcdev->active = NULL;
328 return;
329 }
330
331 pcdev->active = list_entry(pcdev->capture.next,
332 struct mx1_buffer, vb.queue);
333
334 /* setup sg list for future DMA */
335 if (likely(!mx1_camera_setup_dma(pcdev))) {
336 unsigned int temp;
337
338 /* enable SOF irq */
339 temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
340 __raw_writel(temp, pcdev->base + CSICR1);
341 }
342}
343
344static void mx1_camera_dma_irq(int channel, void *data)
345{
346 struct mx1_camera_dev *pcdev = data;
0166b743 347 struct device *dev = pcdev->icd->dev.parent;
6acc81c3
PZ		 348 struct mx1_buffer *buf;
349 struct videobuf_buffer *vb;
350 unsigned long flags;
351
352 spin_lock_irqsave(&pcdev->lock, flags);
353
354 imx_dma_disable(channel);
355
356 if (unlikely(!pcdev->active)) {
0166b743 357 dev_err(dev, "DMA End IRQ with no active buffer\n");
6acc81c3
PZ		 358 goto out;
359 }
360
361 vb = &pcdev->active->vb;
362 buf = container_of(vb, struct mx1_buffer, vb);
363 WARN_ON(buf->inwork || list_empty(&vb->queue));
0166b743 364 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
6acc81c3
PZ		 365 vb, vb->baddr, vb->bsize);
366
367 mx1_camera_wakeup(pcdev, vb, buf);
368out:
369 spin_unlock_irqrestore(&pcdev->lock, flags);
370}
371
372static struct videobuf_queue_ops mx1_videobuf_ops = {
373 .buf_setup = mx1_videobuf_setup,
374 .buf_prepare = mx1_videobuf_prepare,
375 .buf_queue = mx1_videobuf_queue,
376 .buf_release = mx1_videobuf_release,
377};
378
379static void mx1_camera_init_videobuf(struct videobuf_queue *q,
380 struct soc_camera_device *icd)
381{
382 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
383 struct mx1_camera_dev *pcdev = ici->priv;
384
979ea1dd 385 videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
6acc81c3
PZ		 386 &pcdev->lock,
387 V4L2_BUF_TYPE_VIDEO_CAPTURE,
388 V4L2_FIELD_NONE,
389 sizeof(struct mx1_buffer), icd);
390}
391
392static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
393{
394 unsigned int mclk = pcdev->mclk;
395 unsigned long div;
396 unsigned long lcdclk;
397
398 lcdclk = clk_get_rate(pcdev->clk);
399
5d28d525
GL		 400 /*
401 * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
402 * they get a nice Oops
403 */
6acc81c3
PZ		 404 div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
405
0166b743
GL		 406 dev_dbg(pcdev->icd->dev.parent,
407 "System clock %lukHz, target freq %dkHz, divisor %lu\n",
408 lcdclk / 1000, mclk / 1000, div);
6acc81c3
PZ		 409
410 return div;
411}
412
413static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
414{
415 unsigned int csicr1 = CSICR1_EN;
416
979ea1dd 417 dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
6acc81c3
PZ		 418
419 clk_enable(pcdev->clk);
420
421 /* enable CSI before doing anything else */
422 __raw_writel(csicr1, pcdev->base + CSICR1);
423
424 csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
425 csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
426 csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
427
428 __raw_writel(csicr1, pcdev->base + CSICR1);
429}
430
431static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
432{
979ea1dd 433 dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
6acc81c3
PZ		 434
435 /* Disable all CSI interface */
436 __raw_writel(0x00, pcdev->base + CSICR1);
437
438 clk_disable(pcdev->clk);
439}
440
5d28d525
GL		 441/*
442 * The following two functions absolutely depend on the fact, that
443 * there can be only one camera on i.MX1/i.MXL camera sensor interface
444 */
6acc81c3
PZ		 445static int mx1_camera_add_device(struct soc_camera_device *icd)
446{
447 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
448 struct mx1_camera_dev *pcdev = ici->priv;
449 int ret;
450
451 if (pcdev->icd) {
452 ret = -EBUSY;
453 goto ebusy;
454 }
455
0166b743 456 dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
6acc81c3
PZ		 457 icd->devnum);
458
459 mx1_camera_activate(pcdev);
6acc81c3 460
979ea1dd 461 pcdev->icd = icd;
6acc81c3
PZ		 462
463ebusy:
464 return ret;
465}
466
467static void mx1_camera_remove_device(struct soc_camera_device *icd)
468{
469 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
470 struct mx1_camera_dev *pcdev = ici->priv;
471 unsigned int csicr1;
472
473 BUG_ON(icd != pcdev->icd);
474
475 /* disable interrupts */
476 csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
477 __raw_writel(csicr1, pcdev->base + CSICR1);
478
479 /* Stop DMA engine */
480 imx_dma_disable(pcdev->dma_chan);
481
0166b743 482 dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
6acc81c3
PZ		 483 icd->devnum);
484
6acc81c3
PZ		 485 mx1_camera_deactivate(pcdev);
486
487 pcdev->icd = NULL;
488}
489
490static int mx1_camera_set_crop(struct soc_camera_device *icd,
08590b96 491 struct v4l2_crop *a)
6acc81c3 492{
c9c1f1c0 493 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
08590b96
GL		 494
495 return v4l2_subdev_call(sd, video, s_crop, a);
6acc81c3
PZ		 496}
497
498static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
499{
500 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
501 struct mx1_camera_dev *pcdev = ici->priv;
502 unsigned long camera_flags, common_flags;
503 unsigned int csicr1;
504 int ret;
505
506 camera_flags = icd->ops->query_bus_param(icd);
507
508 /* MX1 supports only 8bit buswidth */
509 common_flags = soc_camera_bus_param_compatible(camera_flags,
760697be 510 CSI_BUS_FLAGS);
6acc81c3
PZ		 511 if (!common_flags)
512 return -EINVAL;
513
6acc81c3
PZ		 514 /* Make choises, based on platform choice */
515 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
516 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
517 if (!pcdev->pdata ||
518 pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
519 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
520 else
521 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
522 }
523
524 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
525 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
526 if (!pcdev->pdata ||
527 pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
528 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
529 else
530 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
531 }
532
533 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
534 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
535 if (!pcdev->pdata ||
536 pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
537 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
538 else
539 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
540 }
541
542 ret = icd->ops->set_bus_param(icd, common_flags);
543 if (ret < 0)
544 return ret;
545
546 csicr1 = __raw_readl(pcdev->base + CSICR1);
547
548 if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
549 csicr1 |= CSICR1_REDGE;
550 if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
551 csicr1 |= CSICR1_SOF_POL;
552 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
553 csicr1 |= CSICR1_DATA_POL;
554
555 __raw_writel(csicr1, pcdev->base + CSICR1);
556
557 return 0;
558}
559
560static int mx1_camera_set_fmt(struct soc_camera_device *icd,
561 struct v4l2_format *f)
562{
c9c1f1c0 563 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
6acc81c3
PZ		 564 const struct soc_camera_format_xlate *xlate;
565 struct v4l2_pix_format *pix = &f->fmt.pix;
760697be
GL		 566 struct v4l2_mbus_framefmt mf;
567 int ret, buswidth;
6acc81c3
PZ		 568
569 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
570 if (!xlate) {
96c75399
GL		 571 dev_warn(icd->dev.parent, "Format %x not found\n",
572 pix->pixelformat);
6acc81c3
PZ		 573 return -EINVAL;
574 }
575
760697be
GL		 576 buswidth = xlate->host_fmt->bits_per_sample;
577 if (buswidth > 8) {
578 dev_warn(icd->dev.parent,
579 "bits-per-sample %d for format %x unsupported\n",
580 buswidth, pix->pixelformat);
581 return -EINVAL;
6acc81c3
PZ		 582 }
583
760697be
GL		 584 mf.width = pix->width;
585 mf.height = pix->height;
586 mf.field = pix->field;
587 mf.colorspace = pix->colorspace;
588 mf.code = xlate->code;
589
590 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
591 if (ret < 0)
592 return ret;
593
594 if (mf.code != xlate->code)
595 return -EINVAL;
596
597 pix->width = mf.width;
598 pix->height = mf.height;
599 pix->field = mf.field;
600 pix->colorspace = mf.colorspace;
601 icd->current_fmt = xlate;
602
6acc81c3
PZ		 603 return ret;
604}
605
606static int mx1_camera_try_fmt(struct soc_camera_device *icd,
607 struct v4l2_format *f)
608{
c9c1f1c0 609 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
760697be
GL		 610 const struct soc_camera_format_xlate *xlate;
611 struct v4l2_pix_format *pix = &f->fmt.pix;
612 struct v4l2_mbus_framefmt mf;
613 int ret;
6acc81c3
PZ		 614 /* TODO: limit to mx1 hardware capabilities */
615
760697be
GL		 616 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
617 if (!xlate) {
618 dev_warn(icd->dev.parent, "Format %x not found\n",
619 pix->pixelformat);
620 return -EINVAL;
621 }
622
623 mf.width = pix->width;
624 mf.height = pix->height;
625 mf.field = pix->field;
626 mf.colorspace = pix->colorspace;
627 mf.code = xlate->code;
628
6acc81c3 629 /* limit to sensor capabilities */
760697be
GL		 630 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
631 if (ret < 0)
632 return ret;
633
634 pix->width = mf.width;
635 pix->height = mf.height;
636 pix->field = mf.field;
637 pix->colorspace = mf.colorspace;
638
639 return 0;
6acc81c3
PZ		 640}
641
642static int mx1_camera_reqbufs(struct soc_camera_file *icf,
643 struct v4l2_requestbuffers *p)
644{
645 int i;
646
5d28d525
GL		 647 /*
648 * This is for locking debugging only. I removed spinlocks and now I
6acc81c3
PZ		 649 * check whether .prepare is ever called on a linked buffer, or whether
650 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
5d28d525
GL		 651 * it hadn't triggered
652 */
6acc81c3
PZ		 653 for (i = 0; i < p->count; i++) {
654 struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
655 struct mx1_buffer, vb);
656 buf->inwork = 0;
657 INIT_LIST_HEAD(&buf->vb.queue);
658 }
659
660 return 0;
661}
662
663static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
664{
665 struct soc_camera_file *icf = file->private_data;
666 struct mx1_buffer *buf;
667
668 buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
669 vb.stream);
670
671 poll_wait(file, &buf->vb.done, pt);
672
673 if (buf->vb.state == VIDEOBUF_DONE ||
674 buf->vb.state == VIDEOBUF_ERROR)
675 return POLLIN | POLLRDNORM;
676
677 return 0;
678}
679
680static int mx1_camera_querycap(struct soc_camera_host *ici,
681 struct v4l2_capability *cap)
682{
683 /* cap->name is set by the friendly caller:-> */
684 strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
685 cap->version = VERSION_CODE;
686 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
687
688 return 0;
689}
690
691static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
692 .owner = THIS_MODULE,
693 .add = mx1_camera_add_device,
694 .remove = mx1_camera_remove_device,
695 .set_bus_param = mx1_camera_set_bus_param,
696 .set_crop = mx1_camera_set_crop,
697 .set_fmt = mx1_camera_set_fmt,
698 .try_fmt = mx1_camera_try_fmt,
699 .init_videobuf = mx1_camera_init_videobuf,
700 .reqbufs = mx1_camera_reqbufs,
701 .poll = mx1_camera_poll,
702 .querycap = mx1_camera_querycap,
703};
704
6acc81c3
PZ		 705static struct fiq_handler fh = {
706 .name = "csi_sof"
707};
708
709static int __init mx1_camera_probe(struct platform_device *pdev)
710{
711 struct mx1_camera_dev *pcdev;
712 struct resource *res;
713 struct pt_regs regs;
714 struct clk *clk;
715 void __iomem *base;
716 unsigned int irq;
717 int err = 0;
718
719 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
720 irq = platform_get_irq(pdev, 0);
721 if (!res || !irq) {
722 err = -ENODEV;
723 goto exit;
724 }
725
726 clk = clk_get(&pdev->dev, "csi_clk");
727 if (IS_ERR(clk)) {
728 err = PTR_ERR(clk);
729 goto exit;
730 }
731
732 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
733 if (!pcdev) {
734 dev_err(&pdev->dev, "Could not allocate pcdev\n");
735 err = -ENOMEM;
736 goto exit_put_clk;
737 }
738
6acc81c3
PZ		 739 pcdev->res = res;
740 pcdev->clk = clk;
741
742 pcdev->pdata = pdev->dev.platform_data;
743
744 if (pcdev->pdata)
745 pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
746
747 if (!pcdev->mclk) {
748 dev_warn(&pdev->dev,
749 "mclk_10khz == 0! Please, fix your platform data. "
750 "Using default 20MHz\n");
751 pcdev->mclk = 20000000;
752 }
753
754 INIT_LIST_HEAD(&pcdev->capture);
755 spin_lock_init(&pcdev->lock);
756
757 /*
758 * Request the regions.
759 */
760 if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
761 err = -EBUSY;
762 goto exit_kfree;
763 }
764
765 base = ioremap(res->start, resource_size(res));
766 if (!base) {
767 err = -ENOMEM;
768 goto exit_release;
769 }
770 pcdev->irq = irq;
771 pcdev->base = base;
6acc81c3
PZ		 772
773 /* request dma */
774 pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
775 if (pcdev->dma_chan < 0) {
eff505fa 776 dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
6acc81c3
PZ		 777 err = -EBUSY;
778 goto exit_iounmap;
779 }
eff505fa 780 dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
6acc81c3
PZ		 781
782 imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
783 pcdev);
784
785 imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
786 IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
787 /* burst length : 16 words = 64 bytes */
788 imx_dma_config_burstlen(pcdev->dma_chan, 0);
789
790 /* request irq */
791 err = claim_fiq(&fh);
792 if (err) {
eff505fa 793 dev_err(&pdev->dev, "Camera interrupt register failed \n");
6acc81c3
PZ		 794 goto exit_free_dma;
795 }
796
797 set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
798 &mx1_camera_sof_fiq_start);
799
800 regs.ARM_r8 = DMA_BASE + DMA_DIMR;
801 regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
802 regs.ARM_r10 = (long)pcdev->base + CSICR1;
803 regs.ARM_fp = (long)pcdev->base + CSISR;
804 regs.ARM_sp = 1 << pcdev->dma_chan;
805 set_fiq_regs(&regs);
806
807 mxc_set_irq_fiq(irq, 1);
808 enable_fiq(irq);
809
eb6c8558
GL		 810 pcdev->soc_host.drv_name = DRIVER_NAME;
811 pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
812 pcdev->soc_host.priv = pcdev;
979ea1dd 813 pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
eb6c8558
GL		 814 pcdev->soc_host.nr = pdev->id;
815 err = soc_camera_host_register(&pcdev->soc_host);
6acc81c3
PZ		 816 if (err)
817 goto exit_free_irq;
818
819 dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
820
821 return 0;
822
823exit_free_irq:
824 disable_fiq(irq);
825 mxc_set_irq_fiq(irq, 0);
826 release_fiq(&fh);
827exit_free_dma:
828 imx_dma_free(pcdev->dma_chan);
829exit_iounmap:
830 iounmap(base);
831exit_release:
832 release_mem_region(res->start, resource_size(res));
833exit_kfree:
834 kfree(pcdev);
835exit_put_clk:
836 clk_put(clk);
837exit:
838 return err;
839}
840
841static int __exit mx1_camera_remove(struct platform_device *pdev)
842{
eff505fa
GL		 843 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
844 struct mx1_camera_dev *pcdev = container_of(soc_host,
845 struct mx1_camera_dev, soc_host);
6acc81c3
PZ		 846 struct resource *res;
847
848 imx_dma_free(pcdev->dma_chan);
849 disable_fiq(pcdev->irq);
850 mxc_set_irq_fiq(pcdev->irq, 0);
851 release_fiq(&fh);
852
853 clk_put(pcdev->clk);
854
eff505fa 855 soc_camera_host_unregister(soc_host);
6acc81c3
PZ		 856
857 iounmap(pcdev->base);
858
859 res = pcdev->res;
860 release_mem_region(res->start, resource_size(res));
861
862 kfree(pcdev);
863
864 dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
865
866 return 0;
867}
868
869static struct platform_driver mx1_camera_driver = {
870 .driver = {
871 .name = DRIVER_NAME,
872 },
873 .remove = __exit_p(mx1_camera_remove),
874};
875
876static int __init mx1_camera_init(void)
877{
878 return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
879}
880
881static void __exit mx1_camera_exit(void)
882{
883 return platform_driver_unregister(&mx1_camera_driver);
884}
885
886module_init(mx1_camera_init);
887module_exit(mx1_camera_exit);
888
889MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
890MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
891MODULE_LICENSE("GPL v2");
892MODULE_ALIAS("platform:" DRIVER_NAME);
Linux 6.x block layer and io_uring tree(s)