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Merge branches 'acpi-resources', 'acpi-battery', 'acpi-doc' and 'acpi-pnp'
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_audio.c
CommitLineData
bfc1f97d
SG		 1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Slava Grigorev <slava.grigorev@amd.com>
23 */
24
64424d6e 25#include <linux/gcd.h>
bfc1f97d 26#include <drm/drmP.h>
1a626b68 27#include <drm/drm_crtc.h>
bfc1f97d 28#include "radeon.h"
1a626b68
SG		 29#include "atom.h"
30#include "radeon_audio.h"
bfc1f97d
SG		 31
32void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
33 u8 enable_mask);
8bf59820
SG		 34void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
35 u8 enable_mask);
bfc1f97d
SG		 36void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
37 u8 enable_mask);
1a626b68
SG		 38u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
39void dce6_endpoint_wreg(struct radeon_device *rdev,
40 u32 offset, u32 reg, u32 v);
070a2e63
AD		 41void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
42 struct cea_sad *sads, int sad_count);
43void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
44 struct cea_sad *sads, int sad_count);
45void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
46 struct cea_sad *sads, int sad_count);
00a9d4bc
SG		 47void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
48 u8 *sadb, int sad_count);
49void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
50 u8 *sadb, int sad_count);
51void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
52 u8 *sadb, int sad_count);
53void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
54 u8 *sadb, int sad_count);
55void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
56 u8 *sadb, int sad_count);
57void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
58 u8 *sadb, int sad_count);
87654f87
SG		 59void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
60 struct drm_connector *connector, struct drm_display_mode *mode);
61void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
62 struct drm_connector *connector, struct drm_display_mode *mode);
3cdde027
SG		 63struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
64struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
88252d77 65void dce6_afmt_select_pin(struct drm_encoder *encoder);
a85d682a
SG		 66void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
67 struct radeon_crtc *crtc, unsigned int clock);
68void dce3_2_audio_set_dto(struct radeon_device *rdev,
69 struct radeon_crtc *crtc, unsigned int clock);
70void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
71 struct radeon_crtc *crtc, unsigned int clock);
72void dce4_dp_audio_set_dto(struct radeon_device *rdev,
73 struct radeon_crtc *crtc, unsigned int clock);
74void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
75 struct radeon_crtc *crtc, unsigned int clock);
76void dce6_dp_audio_set_dto(struct radeon_device *rdev,
77 struct radeon_crtc *crtc, unsigned int clock);
baa7d8e4 78void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
96ea7afb 79 unsigned char *buffer, size_t size);
baa7d8e4 80void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
96ea7afb 81 unsigned char *buffer, size_t size);
64424d6e
SG		 82void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
83 const struct radeon_hdmi_acr *acr);
84void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
85 const struct radeon_hdmi_acr *acr);
86void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
87 const struct radeon_hdmi_acr *acr);
930a9785
AD		 88void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
be273e58
SG		 90void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
91 u32 offset, int bpc);
1852c9a0
SG		 92void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
93void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
94void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
3be2e7d0
SG		 95void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
96void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
97void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
6e72376d
SG		 98static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
99 struct drm_display_mode *mode);
e55bca26
SG		 100static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
101 struct drm_display_mode *mode);
6f945693
SG		 102void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
103void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
add7d759 104void evergreen_dp_enable(struct drm_encoder *encoder, bool enable);
bfc1f97d
SG		 105
106static const u32 pin_offsets[7] =
107{
108 (0x5e00 - 0x5e00),
109 (0x5e18 - 0x5e00),
110 (0x5e30 - 0x5e00),
111 (0x5e48 - 0x5e00),
112 (0x5e60 - 0x5e00),
113 (0x5e78 - 0x5e00),
114 (0x5e90 - 0x5e00),
115};
116
1a626b68
SG		 117static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
118{
119 return RREG32(reg);
120}
121
122static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
123 u32 reg, u32 v)
124{
125 WREG32(reg, v);
126}
127
a85d682a
SG		 128static struct radeon_audio_basic_funcs r600_funcs = {
129 .endpoint_rreg = radeon_audio_rreg,
130 .endpoint_wreg = radeon_audio_wreg,
131 .enable = r600_audio_enable,
132};
133
1a626b68
SG		 134static struct radeon_audio_basic_funcs dce32_funcs = {
135 .endpoint_rreg = radeon_audio_rreg,
136 .endpoint_wreg = radeon_audio_wreg,
8bf59820 137 .enable = r600_audio_enable,
1a626b68
SG		 138};
139
140static struct radeon_audio_basic_funcs dce4_funcs = {
141 .endpoint_rreg = radeon_audio_rreg,
142 .endpoint_wreg = radeon_audio_wreg,
8bf59820 143 .enable = dce4_audio_enable,
1a626b68
SG		 144};
145
146static struct radeon_audio_basic_funcs dce6_funcs = {
147 .endpoint_rreg = dce6_endpoint_rreg,
148 .endpoint_wreg = dce6_endpoint_wreg,
8bf59820 149 .enable = dce6_audio_enable,
1a626b68
SG		 150};
151
a85d682a
SG		 152static struct radeon_audio_funcs r600_hdmi_funcs = {
153 .get_pin = r600_audio_get_pin,
154 .set_dto = r600_hdmi_audio_set_dto,
64424d6e 155 .update_acr = r600_hdmi_update_acr,
930a9785 156 .set_vbi_packet = r600_set_vbi_packet,
baa7d8e4 157 .set_avi_packet = r600_set_avi_packet,
1852c9a0 158 .set_audio_packet = r600_set_audio_packet,
3be2e7d0 159 .set_mute = r600_set_mute,
6e72376d 160 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 161 .dpms = r600_hdmi_enable,
a85d682a
SG		 162};
163
070a2e63 164static struct radeon_audio_funcs dce32_hdmi_funcs = {
3cdde027 165 .get_pin = r600_audio_get_pin,
070a2e63 166 .write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc 167 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
a85d682a 168 .set_dto = dce3_2_audio_set_dto,
64424d6e 169 .update_acr = dce3_2_hdmi_update_acr,
930a9785 170 .set_vbi_packet = r600_set_vbi_packet,
baa7d8e4 171 .set_avi_packet = r600_set_avi_packet,
1852c9a0 172 .set_audio_packet = dce3_2_set_audio_packet,
3be2e7d0 173 .set_mute = dce3_2_set_mute,
6e72376d 174 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 175 .dpms = r600_hdmi_enable,
070a2e63
AD		 176};
177
178static struct radeon_audio_funcs dce32_dp_funcs = {
3cdde027 179 .get_pin = r600_audio_get_pin,
070a2e63 180 .write_sad_regs = dce3_2_afmt_write_sad_regs,
00a9d4bc 181 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
a85d682a 182 .set_dto = dce3_2_audio_set_dto,
baa7d8e4 183 .set_avi_packet = r600_set_avi_packet,
e55bca26 184 .set_audio_packet = dce3_2_set_audio_packet,
070a2e63
AD		 185};
186
187static struct radeon_audio_funcs dce4_hdmi_funcs = {
3cdde027 188 .get_pin = r600_audio_get_pin,
070a2e63 189 .write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc 190 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
87654f87 191 .write_latency_fields = dce4_afmt_write_latency_fields,
a85d682a 192 .set_dto = dce4_hdmi_audio_set_dto,
64424d6e 193 .update_acr = evergreen_hdmi_update_acr,
930a9785 194 .set_vbi_packet = dce4_set_vbi_packet,
be273e58 195 .set_color_depth = dce4_hdmi_set_color_depth,
baa7d8e4 196 .set_avi_packet = evergreen_set_avi_packet,
1852c9a0 197 .set_audio_packet = dce4_set_audio_packet,
3be2e7d0 198 .set_mute = dce4_set_mute,
6e72376d 199 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 200 .dpms = evergreen_hdmi_enable,
070a2e63
AD		 201};
202
203static struct radeon_audio_funcs dce4_dp_funcs = {
3cdde027 204 .get_pin = r600_audio_get_pin,
070a2e63 205 .write_sad_regs = evergreen_hdmi_write_sad_regs,
00a9d4bc 206 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
87654f87 207 .write_latency_fields = dce4_afmt_write_latency_fields,
a85d682a 208 .set_dto = dce4_dp_audio_set_dto,
baa7d8e4 209 .set_avi_packet = evergreen_set_avi_packet,
e55bca26
SG		 210 .set_audio_packet = dce4_set_audio_packet,
211 .mode_set = radeon_audio_dp_mode_set,
add7d759 212 .dpms = evergreen_dp_enable,
070a2e63
AD		 213};
214
215static struct radeon_audio_funcs dce6_hdmi_funcs = {
88252d77 216 .select_pin = dce6_afmt_select_pin,
3cdde027 217 .get_pin = dce6_audio_get_pin,
070a2e63 218 .write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc 219 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
87654f87 220 .write_latency_fields = dce6_afmt_write_latency_fields,
a85d682a 221 .set_dto = dce6_hdmi_audio_set_dto,
64424d6e 222 .update_acr = evergreen_hdmi_update_acr,
930a9785 223 .set_vbi_packet = dce4_set_vbi_packet,
be273e58 224 .set_color_depth = dce4_hdmi_set_color_depth,
baa7d8e4 225 .set_avi_packet = evergreen_set_avi_packet,
1852c9a0 226 .set_audio_packet = dce4_set_audio_packet,
3be2e7d0 227 .set_mute = dce4_set_mute,
6e72376d 228 .mode_set = radeon_audio_hdmi_mode_set,
6f945693 229 .dpms = evergreen_hdmi_enable,
070a2e63
AD		 230};
231
232static struct radeon_audio_funcs dce6_dp_funcs = {
88252d77 233 .select_pin = dce6_afmt_select_pin,
3cdde027 234 .get_pin = dce6_audio_get_pin,
070a2e63 235 .write_sad_regs = dce6_afmt_write_sad_regs,
00a9d4bc 236 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
87654f87 237 .write_latency_fields = dce6_afmt_write_latency_fields,
a85d682a 238 .set_dto = dce6_dp_audio_set_dto,
baa7d8e4 239 .set_avi_packet = evergreen_set_avi_packet,
e55bca26
SG		 240 .set_audio_packet = dce4_set_audio_packet,
241 .mode_set = radeon_audio_dp_mode_set,
12428327 242 .dpms = evergreen_dp_enable,
070a2e63
AD		 243};
244
1a626b68
SG		 245static void radeon_audio_interface_init(struct radeon_device *rdev)
246{
247 if (ASIC_IS_DCE6(rdev)) {
248 rdev->audio.funcs = &dce6_funcs;
070a2e63
AD		 249 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
250 rdev->audio.dp_funcs = &dce6_dp_funcs;
1a626b68
SG		 251 } else if (ASIC_IS_DCE4(rdev)) {
252 rdev->audio.funcs = &dce4_funcs;
070a2e63
AD		 253 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
254 rdev->audio.dp_funcs = &dce4_dp_funcs;
a85d682a 255 } else if (ASIC_IS_DCE32(rdev)) {
1a626b68 256 rdev->audio.funcs = &dce32_funcs;
070a2e63
AD		 257 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
258 rdev->audio.dp_funcs = &dce32_dp_funcs;
a85d682a
SG		 259 } else {
260 rdev->audio.funcs = &r600_funcs;
261 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
262 rdev->audio.dp_funcs = 0;
1a626b68
SG		 263 }
264}
265
bfc1f97d
SG		 266static int radeon_audio_chipset_supported(struct radeon_device *rdev)
267{
268 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
269}
270
271int radeon_audio_init(struct radeon_device *rdev)
272{
273 int i;
274
275 if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
276 return 0;
277
278 rdev->audio.enabled = true;
279
280 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
281 rdev->audio.num_pins = 3;
282 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
283 rdev->audio.num_pins = 7;
284 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
285 rdev->audio.num_pins = 7;
286 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
287 rdev->audio.num_pins = 2;
288 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
289 rdev->audio.num_pins = 6;
290 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
291 rdev->audio.num_pins = 6;
292 else
293 rdev->audio.num_pins = 1;
294
295 for (i = 0; i < rdev->audio.num_pins; i++) {
296 rdev->audio.pin[i].channels = -1;
297 rdev->audio.pin[i].rate = -1;
298 rdev->audio.pin[i].bits_per_sample = -1;
299 rdev->audio.pin[i].status_bits = 0;
300 rdev->audio.pin[i].category_code = 0;
301 rdev->audio.pin[i].connected = false;
302 rdev->audio.pin[i].offset = pin_offsets[i];
303 rdev->audio.pin[i].id = i;
1a626b68
SG		 304 }
305
306 radeon_audio_interface_init(rdev);
307
308 /* disable audio. it will be set up later */
309 for (i = 0; i < rdev->audio.num_pins; i++)
8bf59820 310 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
1a626b68
SG		 311
312 return 0;
313}
314
1a626b68
SG		 315u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
316{
317 if (rdev->audio.funcs->endpoint_rreg)
318 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
bfc1f97d
SG		 319
320 return 0;
321}
1a626b68
SG		 322
323void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
324 u32 reg, u32 v)
325{
326 if (rdev->audio.funcs->endpoint_wreg)
327 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
328}
070a2e63 329
6e72376d 330static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
070a2e63
AD		 331{
332 struct radeon_encoder *radeon_encoder;
333 struct drm_connector *connector;
334 struct radeon_connector *radeon_connector = NULL;
335 struct cea_sad *sads;
336 int sad_count;
337
338 list_for_each_entry(connector,
339 &encoder->dev->mode_config.connector_list, head) {
340 if (connector->encoder == encoder) {
341 radeon_connector = to_radeon_connector(connector);
342 break;
343 }
344 }
345
346 if (!radeon_connector) {
347 DRM_ERROR("Couldn't find encoder's connector\n");
348 return;
349 }
350
351 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
352 if (sad_count <= 0) {
353 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
354 return;
355 }
356 BUG_ON(!sads);
357
358 radeon_encoder = to_radeon_encoder(encoder);
359
360 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
361 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
362
363 kfree(sads);
364}
00a9d4bc 365
6e72376d 366static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
00a9d4bc
SG		 367{
368 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
f4c6c081
AD		 369 struct drm_connector *connector;
370 struct radeon_connector *radeon_connector = NULL;
371 u8 *sadb = NULL;
372 int sad_count;
00a9d4bc 373
f4c6c081
AD		 374 list_for_each_entry(connector,
375 &encoder->dev->mode_config.connector_list, head) {
376 if (connector->encoder == encoder) {
377 radeon_connector = to_radeon_connector(connector);
378 break;
379 }
380 }
381
382 if (!radeon_connector) {
383 DRM_ERROR("Couldn't find encoder's connector\n");
384 return;
385 }
386
387 sad_count = drm_edid_to_speaker_allocation(
00a9d4bc 388 radeon_connector_edid(connector), &sadb);
f4c6c081
AD		 389 if (sad_count < 0) {
390 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
391 sad_count);
392 sad_count = 0;
393 }
00a9d4bc
SG		 394
395 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
396 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
397
f4c6c081 398 kfree(sadb);
00a9d4bc 399}
87654f87 400
6e72376d 401static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
87654f87
SG		 402 struct drm_display_mode *mode)
403{
404 struct radeon_encoder *radeon_encoder;
405 struct drm_connector *connector;
406 struct radeon_connector *radeon_connector = 0;
407
408 list_for_each_entry(connector,
409 &encoder->dev->mode_config.connector_list, head) {
410 if (connector->encoder == encoder) {
411 radeon_connector = to_radeon_connector(connector);
412 break;
413 }
414 }
415
416 if (!radeon_connector) {
417 DRM_ERROR("Couldn't find encoder's connector\n");
418 return;
419 }
420
421 radeon_encoder = to_radeon_encoder(encoder);
422
423 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
424 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
425}
3cdde027
SG		 426
427struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
428{
429 struct radeon_device *rdev = encoder->dev->dev_private;
430 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
431
432 if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
433 return radeon_encoder->audio->get_pin(rdev);
434
435 return NULL;
436}
88252d77 437
6e72376d 438static void radeon_audio_select_pin(struct drm_encoder *encoder)
88252d77
SG		 439{
440 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
441
442 if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
443 radeon_encoder->audio->select_pin(encoder);
444}
8bf59820
SG		 445
446void radeon_audio_enable(struct radeon_device *rdev,
447 struct r600_audio_pin *pin, u8 enable_mask)
448{
449 if (rdev->audio.funcs->enable)
450 rdev->audio.funcs->enable(rdev, pin, enable_mask);
451}
7991d665 452
ccd4be7e 453void radeon_audio_detect(struct drm_connector *connector,
d3c34d2c 454 enum drm_connector_status status)
ccd4be7e
SG		 455{
456 struct radeon_device *rdev;
457 struct radeon_encoder *radeon_encoder;
458 struct radeon_encoder_atom_dig *dig;
459
460 if (!connector || !connector->encoder)
461 return;
462
0f55db36
AD		 463 if (!radeon_encoder_is_digital(connector->encoder))
464 return;
465
ccd4be7e
SG		 466 rdev = connector->encoder->dev->dev_private;
467 radeon_encoder = to_radeon_encoder(connector->encoder);
468 dig = radeon_encoder->enc_priv;
469
0f55db36
AD		 470 if (!dig->afmt)
471 return;
ccd4be7e 472
0f55db36
AD		 473 if (status == connector_status_connected) {
474 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
ccd4be7e
SG		 475
476 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
0f55db36
AD		 477 radeon_dp_getsinktype(radeon_connector) ==
478 CONNECTOR_OBJECT_ID_DISPLAYPORT)
ccd4be7e
SG		 479 radeon_encoder->audio = rdev->audio.dp_funcs;
480 else
481 radeon_encoder->audio = rdev->audio.hdmi_funcs;
482
d3c34d2c 483 dig->afmt->pin = radeon_audio_get_pin(connector->encoder);
0f55db36
AD		 484 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
485 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
486 } else {
487 radeon_audio_enable(rdev, dig->afmt->pin, 0);
488 dig->afmt->pin = NULL;
489 }
ccd4be7e
SG		 490 } else {
491 radeon_audio_enable(rdev, dig->afmt->pin, 0);
d3c34d2c 492 dig->afmt->pin = NULL;
ccd4be7e
SG		 493 }
494}
495
7991d665
SG		 496void radeon_audio_fini(struct radeon_device *rdev)
497{
498 int i;
499
500 if (!rdev->audio.enabled)
501 return;
502
503 for (i = 0; i < rdev->audio.num_pins; i++)
504 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
505
506 rdev->audio.enabled = false;
507}
a85d682a 508
6e72376d 509static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
a85d682a
SG		 510{
511 struct radeon_device *rdev = encoder->dev->dev_private;
512 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
513 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
514
515 if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
516 radeon_encoder->audio->set_dto(rdev, crtc, clock);
517}
96ea7afb 518
6e72376d 519static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
baa7d8e4 520 struct drm_display_mode *mode)
96ea7afb 521{
f4c6c081 522 struct radeon_device *rdev = encoder->dev->dev_private;
96ea7afb
SG		 523 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
524 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
a1dcc277
AD		 525 struct drm_connector *connector;
526 struct radeon_connector *radeon_connector = NULL;
baa7d8e4
SG		 527 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
528 struct hdmi_avi_infoframe frame;
529 int err;
530
a1dcc277
AD		 531 list_for_each_entry(connector,
532 &encoder->dev->mode_config.connector_list, head) {
533 if (connector->encoder == encoder) {
534 radeon_connector = to_radeon_connector(connector);
535 break;
536 }
537 }
538
539 if (!radeon_connector) {
540 DRM_ERROR("Couldn't find encoder's connector\n");
541 return -ENOENT;
542 }
543
baa7d8e4
SG		 544 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
545 if (err < 0) {
546 DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
547 return err;
548 }
549
a1dcc277
AD		 550 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) {
551 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB)
552 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED;
553 else
554 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL;
555 } else {
556 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
557 }
558
baa7d8e4
SG		 559 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
560 if (err < 0) {
561 DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
562 return err;
563 }
564
565 if (dig && dig->afmt &&
566 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet)
567 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
568 buffer, sizeof(buffer));
96ea7afb 569
baa7d8e4 570 return 0;
96ea7afb 571}
64424d6e
SG		 572
573/*
574 * calculate CTS and N values if they are not found in the table
575 */
576static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
577{
578 int n, cts;
579 unsigned long div, mul;
580
581 /* Safe, but overly large values */
582 n = 128 * freq;
583 cts = clock * 1000;
584
585 /* Smallest valid fraction */
586 div = gcd(n, cts);
587
588 n /= div;
589 cts /= div;
590
591 /*
592 * The optimal N is 128*freq/1000. Calculate the closest larger
593 * value that doesn't truncate any bits.
594 */
595 mul = ((128*freq/1000) + (n-1))/n;
596
597 n *= mul;
598 cts *= mul;
599
600 /* Check that we are in spec (not always possible) */
601 if (n < (128*freq/1500))
602 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
603 if (n > (128*freq/300))
604 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
605
606 *N = n;
607 *CTS = cts;
608
609 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
610 *N, *CTS, freq);
611}
612
613static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
614{
615 static struct radeon_hdmi_acr res;
616 u8 i;
617
618 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
619 /* 32kHz 44.1kHz 48kHz */
620 /* Clock N CTS N CTS N CTS */
621 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
622 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
623 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
624 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
625 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
626 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
627 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
628 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
629 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
630 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
631 };
632
633 /* Precalculated values for common clocks */
634 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
635 if (hdmi_predefined_acr[i].clock == clock)
636 return &hdmi_predefined_acr[i];
637
638 /* And odd clocks get manually calculated */
639 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
640 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
641 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
642
643 return &res;
644}
645
646/*
647 * update the N and CTS parameters for a given pixel clock rate
648 */
6e72376d 649static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
64424d6e 650{
f4c6c081
AD		 651 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
652 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
653 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
64424d6e
SG		 654
655 if (!dig || !dig->afmt)
656 return;
657
658 if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
659 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
660}
930a9785 661
6e72376d 662static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
930a9785 663{
f4c6c081
AD		 664 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
665 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
930a9785
AD		 666
667 if (!dig || !dig->afmt)
668 return;
669
670 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
671 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
672}
be273e58 673
6e72376d 674static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
be273e58
SG		 675{
676 int bpc = 8;
677 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
678 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
679
680 if (!dig || !dig->afmt)
681 return;
682
683 if (encoder->crtc) {
684 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
685 bpc = radeon_crtc->bpc;
686 }
687
688 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
689 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
690}
1852c9a0 691
6e72376d 692static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
1852c9a0 693{
f4c6c081
AD		 694 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
695 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1852c9a0
SG		 696
697 if (!dig || !dig->afmt)
698 return;
699
700 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
701 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
702}
3be2e7d0 703
6e72376d 704static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
3be2e7d0 705{
f4c6c081
AD		 706 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
707 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
3be2e7d0
SG		 708
709 if (!dig || !dig->afmt)
710 return;
711
712 if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
713 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
714}
6e72376d
SG		 715
716/*
717 * update the info frames with the data from the current display mode
718 */
719static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
3ed7ceea 720 struct drm_display_mode *mode)
6e72376d 721{
6e72376d
SG		 722 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
723 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
724
725 if (!dig || !dig->afmt)
726 return;
727
88af339f 728 radeon_audio_set_mute(encoder, true);
6e72376d 729
b20932dd
AD		 730 radeon_audio_write_speaker_allocation(encoder);
731 radeon_audio_write_sad_regs(encoder);
732 radeon_audio_write_latency_fields(encoder, mode);
6e72376d
SG		 733 radeon_audio_set_dto(encoder, mode->clock);
734 radeon_audio_set_vbi_packet(encoder);
735 radeon_hdmi_set_color_depth(encoder);
6e72376d 736 radeon_audio_update_acr(encoder, mode->clock);
6e72376d
SG		 737 radeon_audio_set_audio_packet(encoder);
738 radeon_audio_select_pin(encoder);
6e72376d
SG		 739
740 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
741 return;
742
88af339f 743 radeon_audio_set_mute(encoder, false);
6e72376d
SG		 744}
745
e55bca26
SG		 746static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
747 struct drm_display_mode *mode)
748{
749 struct drm_device *dev = encoder->dev;
750 struct radeon_device *rdev = dev->dev_private;
751 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
752 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
aeefd07e
AD		 753 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
754 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
755 struct radeon_connector_atom_dig *dig_connector =
756 radeon_connector->con_priv;
e55bca26
SG		 757
758 if (!dig || !dig->afmt)
759 return;
760
b20932dd
AD		 761 radeon_audio_write_speaker_allocation(encoder);
762 radeon_audio_write_sad_regs(encoder);
763 radeon_audio_write_latency_fields(encoder, mode);
aeefd07e
AD		 764 if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev))
765 radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
766 else
767 radeon_audio_set_dto(encoder, dig_connector->dp_clock);
e55bca26
SG		 768 radeon_audio_set_audio_packet(encoder);
769 radeon_audio_select_pin(encoder);
770
771 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
772 return;
e55bca26
SG		 773}
774
6e72376d
SG		 775void radeon_audio_mode_set(struct drm_encoder *encoder,
776 struct drm_display_mode *mode)
777{
778 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
779
780 if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
781 radeon_encoder->audio->mode_set(encoder, mode);
782}
6f945693
SG		 783
784void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
785{
786 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
787
788 if (radeon_encoder->audio && radeon_encoder->audio->dpms)
789 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
790}
Linux 6.x block layer and io_uring tree(s)