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6ee73861 BS |
1 | /* |
2 | * Copyright 2009 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Author: Ben Skeggs | |
23 | */ | |
24 | ||
760285e7 DH |
25 | #include <drm/drmP.h> |
26 | #include <drm/drm_crtc_helper.h> | |
6ee73861 | 27 | |
4dc28134 | 28 | #include "nouveau_drv.h" |
77145f1c | 29 | #include "nouveau_reg.h" |
1a646342 | 30 | #include "hw.h" |
6ee73861 BS |
31 | #include "nouveau_encoder.h" |
32 | #include "nouveau_connector.h" | |
33 | ||
fcd6f048 BS |
34 | #include <nvif/if0004.h> |
35 | ||
ba801ef0 BS |
36 | static void |
37 | nv04_display_fini(struct drm_device *dev) | |
38 | { | |
fcd6f048 BS |
39 | struct nv04_display *disp = nv04_display(dev); |
40 | ||
41 | /* Disable flip completion events. */ | |
42 | nvif_notify_put(&disp->flip); | |
43 | ||
ba801ef0 BS |
44 | /* Disable vblank interrupts. */ |
45 | NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0); | |
46 | if (nv_two_heads(dev)) | |
47 | NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0); | |
48 | } | |
49 | ||
50 | static int | |
51 | nv04_display_init(struct drm_device *dev) | |
52 | { | |
fcd6f048 | 53 | struct nv04_display *disp = nv04_display(dev); |
ba801ef0 BS |
54 | struct nouveau_encoder *encoder; |
55 | struct nouveau_crtc *crtc; | |
56 | ||
57 | /* meh.. modeset apparently doesn't setup all the regs and depends | |
58 | * on pre-existing state, for now load the state of the card *before* | |
59 | * nouveau was loaded, and then do a modeset. | |
60 | * | |
61 | * best thing to do probably is to make save/restore routines not | |
62 | * save/restore "pre-load" state, but more general so we can save | |
63 | * on suspend too. | |
64 | */ | |
65 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) | |
66 | crtc->save(&crtc->base); | |
67 | ||
68 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.base.head) | |
69 | encoder->enc_save(&encoder->base.base); | |
70 | ||
fcd6f048 BS |
71 | /* Enable flip completion events. */ |
72 | nvif_notify_get(&disp->flip); | |
ba801ef0 BS |
73 | return 0; |
74 | } | |
75 | ||
76 | static void | |
77 | nv04_display_destroy(struct drm_device *dev) | |
78 | { | |
79 | struct nv04_display *disp = nv04_display(dev); | |
80 | struct nouveau_drm *drm = nouveau_drm(dev); | |
81 | struct nouveau_encoder *encoder; | |
82 | struct nouveau_crtc *nv_crtc; | |
83 | ||
84 | /* Restore state */ | |
85 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.base.head) | |
86 | encoder->enc_restore(&encoder->base.base); | |
87 | ||
88 | list_for_each_entry(nv_crtc, &dev->mode_config.crtc_list, base.head) | |
89 | nv_crtc->restore(&nv_crtc->base); | |
90 | ||
91 | nouveau_hw_save_vga_fonts(dev, 0); | |
92 | ||
fcd6f048 BS |
93 | nvif_notify_fini(&disp->flip); |
94 | ||
ba801ef0 BS |
95 | nouveau_display(dev)->priv = NULL; |
96 | kfree(disp); | |
97 | ||
98 | nvif_object_unmap(&drm->client.device.object); | |
99 | } | |
100 | ||
6ee73861 BS |
101 | int |
102 | nv04_display_create(struct drm_device *dev) | |
103 | { | |
77145f1c | 104 | struct nouveau_drm *drm = nouveau_drm(dev); |
1167c6bc | 105 | struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device); |
77145f1c | 106 | struct dcb_table *dcb = &drm->vbios.dcb; |
8f1a6086 | 107 | struct drm_connector *connector, *ct; |
6ee73861 | 108 | struct drm_encoder *encoder; |
129b7820 | 109 | struct nouveau_encoder *nv_encoder; |
2c3d7715 | 110 | struct nouveau_crtc *crtc; |
017e6e29 | 111 | struct nv04_display *disp; |
6ee73861 BS |
112 | int i, ret; |
113 | ||
017e6e29 | 114 | disp = kzalloc(sizeof(*disp), GFP_KERNEL); |
017e6e29 BS |
115 | if (!disp) |
116 | return -ENOMEM; | |
117 | ||
01326050 | 118 | nvif_object_map(&drm->client.device.object, NULL, 0); |
0ad72863 | 119 | |
77145f1c BS |
120 | nouveau_display(dev)->priv = disp; |
121 | nouveau_display(dev)->dtor = nv04_display_destroy; | |
122 | nouveau_display(dev)->init = nv04_display_init; | |
123 | nouveau_display(dev)->fini = nv04_display_fini; | |
6ee73861 | 124 | |
eb493fbc LP |
125 | /* Pre-nv50 doesn't support atomic, so don't expose the ioctls */ |
126 | dev->driver->driver_features &= ~DRIVER_ATOMIC; | |
127 | ||
fcd6f048 BS |
128 | /* Request page flip completion event. */ |
129 | if (drm->nvsw.client) { | |
130 | nvif_notify_init(&drm->nvsw, nv04_flip_complete, | |
131 | false, NV04_NVSW_NTFY_UEVENT, | |
132 | NULL, 0, 0, &disp->flip); | |
133 | } | |
134 | ||
95f158ea | 135 | nouveau_hw_save_vga_fonts(dev, 1); |
6ee73861 | 136 | |
6ee73861 BS |
137 | nv04_crtc_create(dev, 0); |
138 | if (nv_two_heads(dev)) | |
139 | nv04_crtc_create(dev, 1); | |
140 | ||
141 | for (i = 0; i < dcb->entries; i++) { | |
cb75d97e | 142 | struct dcb_output *dcbent = &dcb->entry[i]; |
6ee73861 | 143 | |
3c7fc252 | 144 | connector = nouveau_connector_create(dev, dcbent); |
8f1a6086 BS |
145 | if (IS_ERR(connector)) |
146 | continue; | |
147 | ||
6ee73861 | 148 | switch (dcbent->type) { |
cb75d97e | 149 | case DCB_OUTPUT_ANALOG: |
8f1a6086 | 150 | ret = nv04_dac_create(connector, dcbent); |
6ee73861 | 151 | break; |
cb75d97e BS |
152 | case DCB_OUTPUT_LVDS: |
153 | case DCB_OUTPUT_TMDS: | |
8f1a6086 | 154 | ret = nv04_dfp_create(connector, dcbent); |
6ee73861 | 155 | break; |
cb75d97e | 156 | case DCB_OUTPUT_TV: |
6ee73861 | 157 | if (dcbent->location == DCB_LOC_ON_CHIP) |
8f1a6086 | 158 | ret = nv17_tv_create(connector, dcbent); |
6ee73861 | 159 | else |
8f1a6086 | 160 | ret = nv04_tv_create(connector, dcbent); |
6ee73861 BS |
161 | break; |
162 | default: | |
77145f1c | 163 | NV_WARN(drm, "DCB type %d not known\n", dcbent->type); |
6ee73861 BS |
164 | continue; |
165 | } | |
166 | ||
167 | if (ret) | |
168 | continue; | |
6ee73861 BS |
169 | } |
170 | ||
8f1a6086 BS |
171 | list_for_each_entry_safe(connector, ct, |
172 | &dev->mode_config.connector_list, head) { | |
173 | if (!connector->encoder_ids[0]) { | |
77145f1c | 174 | NV_WARN(drm, "%s has no encoders, removing\n", |
8c6c361a | 175 | connector->name); |
8f1a6086 BS |
176 | connector->funcs->destroy(connector); |
177 | } | |
178 | } | |
6ee73861 | 179 | |
5ed50209 BS |
180 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
181 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); | |
2aa5eac5 BS |
182 | struct nvkm_i2c_bus *bus = |
183 | nvkm_i2c_bus_find(i2c, nv_encoder->dcb->i2c_index); | |
184 | nv_encoder->i2c = bus ? &bus->i2c : NULL; | |
5ed50209 BS |
185 | } |
186 | ||
6ee73861 | 187 | /* Save previous state */ |
2c3d7715 DV |
188 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) |
189 | crtc->save(&crtc->base); | |
6ee73861 | 190 | |
129b7820 DV |
191 | list_for_each_entry(nv_encoder, &dev->mode_config.encoder_list, base.base.head) |
192 | nv_encoder->enc_save(&nv_encoder->base.base); | |
6ee73861 | 193 | |
515de6b2 IM |
194 | nouveau_overlay_init(dev); |
195 | ||
6ee73861 BS |
196 | return 0; |
197 | } |