Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Machine specific setup for generic | |
3 | */ | |
4 | ||
1da177e4 | 5 | #include <linux/init.h> |
1da177e4 | 6 | #include <linux/interrupt.h> |
1da177e4 | 7 | #include <asm/arch_hooks.h> |
e75eac33 JF |
8 | #include <asm/voyager.h> |
9 | #include <asm/e820.h> | |
d5fb3426 | 10 | #include <asm/io.h> |
e75eac33 | 11 | #include <asm/setup.h> |
1da177e4 LT |
12 | |
13 | void __init pre_intr_init_hook(void) | |
14 | { | |
15 | init_ISA_irqs(); | |
16 | } | |
17 | ||
18 | /* | |
19 | * IRQ2 is cascade interrupt to second interrupt controller | |
20 | */ | |
6a61f6a5 TG |
21 | static struct irqaction irq2 = { |
22 | .handler = no_action, | |
23 | .mask = CPU_MASK_NONE, | |
24 | .name = "cascade", | |
25 | }; | |
1da177e4 LT |
26 | |
27 | void __init intr_init_hook(void) | |
28 | { | |
29 | #ifdef CONFIG_SMP | |
73557af5 | 30 | voyager_smp_intr_init(); |
1da177e4 LT |
31 | #endif |
32 | ||
d5fb3426 | 33 | setup_irq(2, &irq2); |
1da177e4 LT |
34 | } |
35 | ||
92ab7831 | 36 | static void voyager_disable_tsc(void) |
1da177e4 LT |
37 | { |
38 | /* Voyagers run their CPUs from independent clocks, so disable | |
39 | * the TSC code because we can't sync them */ | |
404ee5b1 | 40 | setup_clear_cpu_cap(X86_FEATURE_TSC); |
1da177e4 LT |
41 | } |
42 | ||
92ab7831 JB |
43 | void __init pre_setup_arch_hook(void) |
44 | { | |
45 | voyager_disable_tsc(); | |
46 | } | |
47 | ||
48 | void __init pre_time_init_hook(void) | |
49 | { | |
50 | voyager_disable_tsc(); | |
51 | } | |
52 | ||
1da177e4 LT |
53 | void __init trap_init_hook(void) |
54 | { | |
55 | } | |
56 | ||
a4ec1eff | 57 | static struct irqaction irq0 = { |
9f483519 | 58 | .handler = timer_interrupt, |
936577c6 | 59 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, |
9f483519 JB |
60 | .mask = CPU_MASK_NONE, |
61 | .name = "timer" | |
62 | }; | |
1da177e4 LT |
63 | |
64 | void __init time_init_hook(void) | |
65 | { | |
9f483519 | 66 | irq0.mask = cpumask_of_cpu(safe_smp_processor_id()); |
1da177e4 LT |
67 | setup_irq(0, &irq0); |
68 | } | |
e75eac33 JF |
69 | |
70 | /* Hook for machine specific memory setup. */ | |
71 | ||
a4ec1eff | 72 | char *__init machine_specific_memory_setup(void) |
e75eac33 JF |
73 | { |
74 | char *who; | |
6e9bcc79 | 75 | int new_nr; |
e75eac33 JF |
76 | |
77 | who = "NOT VOYAGER"; | |
78 | ||
a4ec1eff | 79 | if (voyager_level == 5) { |
e75eac33 JF |
80 | __u32 addr, length; |
81 | int i; | |
82 | ||
83 | who = "Voyager-SUS"; | |
84 | ||
85 | e820.nr_map = 0; | |
a4ec1eff | 86 | for (i = 0; voyager_memory_detect(i, &addr, &length); i++) { |
d0be6bde | 87 | e820_add_region(addr, length, E820_RAM); |
e75eac33 JF |
88 | } |
89 | return who; | |
a4ec1eff | 90 | } else if (voyager_level == 4) { |
e75eac33 | 91 | __u32 tom; |
a4ec1eff | 92 | __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8; |
e75eac33 JF |
93 | /* select the DINO config space */ |
94 | outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT); | |
95 | /* Read DINO top of memory register */ | |
96 | tom = ((inb(catbase + 0x4) & 0xf0) << 16) | |
a4ec1eff | 97 | + ((inb(catbase + 0x5) & 0x7f) << 24); |
e75eac33 | 98 | |
a4ec1eff IM |
99 | if (inb(catbase) != VOYAGER_DINO) { |
100 | printk(KERN_ERR | |
101 | "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n"); | |
102 | tom = (boot_params.screen_info.ext_mem_k) << 10; | |
e75eac33 JF |
103 | } |
104 | who = "Voyager-TOM"; | |
d0be6bde | 105 | e820_add_region(0, 0x9f000, E820_RAM); |
e75eac33 | 106 | /* map from 1M to top of memory */ |
d0be6bde | 107 | e820_add_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024, |
a4ec1eff | 108 | E820_RAM); |
e75eac33 JF |
109 | /* FIXME: Should check the ASICs to see if I need to |
110 | * take out the 8M window. Just do it at the moment | |
111 | * */ | |
d0be6bde | 112 | e820_add_region(8 * 1024 * 1024, 8 * 1024 * 1024, |
a4ec1eff | 113 | E820_RESERVED); |
e75eac33 JF |
114 | return who; |
115 | } | |
116 | ||
95a71a45 | 117 | return default_machine_specific_memory_setup(); |
e75eac33 | 118 | } |