Merge branch 'bkl/procfs' of git://git.kernel.org/pub/scm/linux/kernel/git/frederic...
[linux-2.6-block.git] / arch / x86 / kernel / tlb_uv.c
CommitLineData
1812924b
CW
1/*
2 * SGI UltraViolet TLB flush routines.
3 *
b8f7fb13 4 * (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI.
1812924b
CW
5 *
6 * This code is released under the GNU General Public License version 2 or
7 * later.
8 */
aef8f5b8 9#include <linux/seq_file.h>
1812924b
CW
10#include <linux/proc_fs.h>
11#include <linux/kernel.h>
5a0e3ad6 12#include <linux/slab.h>
1812924b 13
1812924b 14#include <asm/mmu_context.h>
bdbcdd48 15#include <asm/uv/uv.h>
1812924b 16#include <asm/uv/uv_mmrs.h>
b4c286e6 17#include <asm/uv/uv_hub.h>
1812924b 18#include <asm/uv/uv_bau.h>
7b6aa335 19#include <asm/apic.h>
b4c286e6 20#include <asm/idle.h>
b194b120 21#include <asm/tsc.h>
99dd8713 22#include <asm/irq_vectors.h>
b8f7fb13 23#include <asm/timer.h>
1812924b 24
b8f7fb13
CW
25struct msg_desc {
26 struct bau_payload_queue_entry *msg;
27 int msg_slot;
28 int sw_ack_slot;
29 struct bau_payload_queue_entry *va_queue_first;
30 struct bau_payload_queue_entry *va_queue_last;
31};
b4c286e6 32
6f4edd69
JS
33#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x000000000bUL
34
b8f7fb13 35static int uv_bau_max_concurrent __read_mostly;
b4c286e6 36
b8f7fb13
CW
37static int nobau;
38static int __init setup_nobau(char *arg)
39{
40 nobau = 1;
41 return 0;
42}
43early_param("nobau", setup_nobau);
b4c286e6 44
b8f7fb13
CW
45/* base pnode in this partition */
46static int uv_partition_base_pnode __read_mostly;
47/* position of pnode (which is nasid>>1): */
48static int uv_nshift __read_mostly;
49static unsigned long uv_mmask __read_mostly;
1812924b 50
dc163a41
IM
51static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
52static DEFINE_PER_CPU(struct bau_control, bau_control);
b8f7fb13
CW
53static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
54
55struct reset_args {
56 int sender;
57};
1812924b 58
9674f35b 59/*
b8f7fb13
CW
60 * Determine the first node on a uvhub. 'Nodes' are used for kernel
61 * memory allocation.
9674f35b 62 */
b8f7fb13 63static int __init uvhub_to_first_node(int uvhub)
9674f35b
CW
64{
65 int node, b;
66
67 for_each_online_node(node) {
68 b = uv_node_to_blade_id(node);
b8f7fb13 69 if (uvhub == b)
9674f35b
CW
70 return node;
71 }
b8f7fb13 72 return -1;
9674f35b
CW
73}
74
75/*
b8f7fb13 76 * Determine the apicid of the first cpu on a uvhub.
9674f35b 77 */
b8f7fb13 78static int __init uvhub_to_first_apicid(int uvhub)
9674f35b
CW
79{
80 int cpu;
81
82 for_each_present_cpu(cpu)
b8f7fb13 83 if (uvhub == uv_cpu_to_blade_id(cpu))
9674f35b
CW
84 return per_cpu(x86_cpu_to_apicid, cpu);
85 return -1;
86}
87
1812924b
CW
88/*
89 * Free a software acknowledge hardware resource by clearing its Pending
90 * bit. This will return a reply to the sender.
91 * If the message has timed out, a reply has already been sent by the
92 * hardware but the resource has not been released. In that case our
93 * clear of the Timeout bit (as well) will free the resource. No reply will
94 * be sent (the hardware will only do one reply per message).
95 */
b8f7fb13
CW
96static inline void uv_reply_to_message(struct msg_desc *mdp,
97 struct bau_control *bcp)
1812924b 98{
b194b120 99 unsigned long dw;
b8f7fb13 100 struct bau_payload_queue_entry *msg;
1812924b 101
b8f7fb13
CW
102 msg = mdp->msg;
103 if (!msg->canceled) {
104 dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) |
105 msg->sw_ack_vector;
106 uv_write_local_mmr(
107 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
108 }
1812924b
CW
109 msg->replied_to = 1;
110 msg->sw_ack_vector = 0;
1812924b
CW
111}
112
113/*
b8f7fb13 114 * Process the receipt of a RETRY message
1812924b 115 */
b8f7fb13
CW
116static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
117 struct bau_control *bcp)
1812924b 118{
b8f7fb13
CW
119 int i;
120 int cancel_count = 0;
121 int slot2;
122 unsigned long msg_res;
123 unsigned long mmr = 0;
124 struct bau_payload_queue_entry *msg;
125 struct bau_payload_queue_entry *msg2;
126 struct ptc_stats *stat;
1812924b 127
b8f7fb13
CW
128 msg = mdp->msg;
129 stat = &per_cpu(ptcstats, bcp->cpu);
130 stat->d_retries++;
131 /*
132 * cancel any message from msg+1 to the retry itself
133 */
134 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
135 if (msg2 > mdp->va_queue_last)
136 msg2 = mdp->va_queue_first;
137 if (msg2 == msg)
138 break;
139
140 /* same conditions for cancellation as uv_do_reset */
141 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
142 (msg2->sw_ack_vector) && ((msg2->sw_ack_vector &
143 msg->sw_ack_vector) == 0) &&
144 (msg2->sending_cpu == msg->sending_cpu) &&
145 (msg2->msg_type != MSG_NOOP)) {
146 slot2 = msg2 - mdp->va_queue_first;
147 mmr = uv_read_local_mmr
148 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
149 msg_res = ((msg2->sw_ack_vector << 8) |
150 msg2->sw_ack_vector);
151 /*
152 * This is a message retry; clear the resources held
153 * by the previous message only if they timed out.
154 * If it has not timed out we have an unexpected
155 * situation to report.
156 */
157 if (mmr & (msg_res << 8)) {
158 /*
159 * is the resource timed out?
160 * make everyone ignore the cancelled message.
161 */
162 msg2->canceled = 1;
163 stat->d_canceled++;
164 cancel_count++;
165 uv_write_local_mmr(
166 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
167 (msg_res << 8) | msg_res);
168 } else
169 printk(KERN_INFO "note bau retry: no effect\n");
170 }
171 }
172 if (!cancel_count)
173 stat->d_nocanceled++;
174}
1812924b 175
b8f7fb13
CW
176/*
177 * Do all the things a cpu should do for a TLB shootdown message.
178 * Other cpu's may come here at the same time for this message.
179 */
180static void uv_bau_process_message(struct msg_desc *mdp,
181 struct bau_control *bcp)
182{
183 int msg_ack_count;
184 short socket_ack_count = 0;
185 struct ptc_stats *stat;
186 struct bau_payload_queue_entry *msg;
187 struct bau_control *smaster = bcp->socket_master;
1812924b 188
b8f7fb13
CW
189 /*
190 * This must be a normal message, or retry of a normal message
191 */
192 msg = mdp->msg;
193 stat = &per_cpu(ptcstats, bcp->cpu);
1812924b
CW
194 if (msg->address == TLB_FLUSH_ALL) {
195 local_flush_tlb();
b8f7fb13 196 stat->d_alltlb++;
1812924b
CW
197 } else {
198 __flush_tlb_one(msg->address);
b8f7fb13 199 stat->d_onetlb++;
1812924b 200 }
b8f7fb13
CW
201 stat->d_requestee++;
202
203 /*
204 * One cpu on each uvhub has the additional job on a RETRY
205 * of releasing the resource held by the message that is
206 * being retried. That message is identified by sending
207 * cpu number.
208 */
209 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
210 uv_bau_process_retry_msg(mdp, bcp);
1812924b 211
b8f7fb13
CW
212 /*
213 * This is a sw_ack message, so we have to reply to it.
214 * Count each responding cpu on the socket. This avoids
215 * pinging the count's cache line back and forth between
216 * the sockets.
217 */
218 socket_ack_count = atomic_add_short_return(1, (struct atomic_short *)
219 &smaster->socket_acknowledge_count[mdp->msg_slot]);
220 if (socket_ack_count == bcp->cpus_in_socket) {
221 /*
222 * Both sockets dump their completed count total into
223 * the message's count.
224 */
225 smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
226 msg_ack_count = atomic_add_short_return(socket_ack_count,
227 (struct atomic_short *)&msg->acknowledge_count);
228
229 if (msg_ack_count == bcp->cpus_in_uvhub) {
230 /*
231 * All cpus in uvhub saw it; reply
232 */
233 uv_reply_to_message(mdp, bcp);
234 }
235 }
1812924b 236
b8f7fb13 237 return;
1812924b
CW
238}
239
240/*
b8f7fb13
CW
241 * Determine the first cpu on a uvhub.
242 */
243static int uvhub_to_first_cpu(int uvhub)
244{
245 int cpu;
246 for_each_present_cpu(cpu)
247 if (uvhub == uv_cpu_to_blade_id(cpu))
248 return cpu;
249 return -1;
250}
251
252/*
253 * Last resort when we get a large number of destination timeouts is
254 * to clear resources held by a given cpu.
255 * Do this with IPI so that all messages in the BAU message queue
256 * can be identified by their nonzero sw_ack_vector field.
1812924b 257 *
b8f7fb13
CW
258 * This is entered for a single cpu on the uvhub.
259 * The sender want's this uvhub to free a specific message's
260 * sw_ack resources.
1812924b 261 */
b8f7fb13
CW
262static void
263uv_do_reset(void *ptr)
1812924b 264{
b4c286e6 265 int i;
b8f7fb13
CW
266 int slot;
267 int count = 0;
268 unsigned long mmr;
269 unsigned long msg_res;
270 struct bau_control *bcp;
271 struct reset_args *rap;
272 struct bau_payload_queue_entry *msg;
273 struct ptc_stats *stat;
1812924b 274
b8f7fb13
CW
275 bcp = &per_cpu(bau_control, smp_processor_id());
276 rap = (struct reset_args *)ptr;
277 stat = &per_cpu(ptcstats, bcp->cpu);
278 stat->d_resets++;
279
280 /*
281 * We're looking for the given sender, and
282 * will free its sw_ack resource.
283 * If all cpu's finally responded after the timeout, its
284 * message 'replied_to' was set.
285 */
286 for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
287 /* uv_do_reset: same conditions for cancellation as
288 uv_bau_process_retry_msg() */
289 if ((msg->replied_to == 0) &&
290 (msg->canceled == 0) &&
291 (msg->sending_cpu == rap->sender) &&
292 (msg->sw_ack_vector) &&
293 (msg->msg_type != MSG_NOOP)) {
294 /*
295 * make everyone else ignore this message
296 */
297 msg->canceled = 1;
298 slot = msg - bcp->va_queue_first;
299 count++;
300 /*
301 * only reset the resource if it is still pending
302 */
303 mmr = uv_read_local_mmr
304 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
305 msg_res = ((msg->sw_ack_vector << 8) |
306 msg->sw_ack_vector);
307 if (mmr & msg_res) {
308 stat->d_rcanceled++;
309 uv_write_local_mmr(
310 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
311 msg_res);
dc163a41 312 }
dc163a41
IM
313 }
314 }
b8f7fb13 315 return;
dc163a41
IM
316}
317
318/*
b8f7fb13
CW
319 * Use IPI to get all target uvhubs to release resources held by
320 * a given sending cpu number.
dc163a41 321 */
b8f7fb13
CW
322static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution,
323 int sender)
dc163a41 324{
b8f7fb13
CW
325 int uvhub;
326 int cpu;
327 cpumask_t mask;
328 struct reset_args reset_args;
dc163a41 329
b8f7fb13 330 reset_args.sender = sender;
dc163a41 331
b8f7fb13
CW
332 cpus_clear(mask);
333 /* find a single cpu for each uvhub in this distribution mask */
334 for (uvhub = 0;
335 uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE;
336 uvhub++) {
337 if (!bau_uvhub_isset(uvhub, distribution))
b194b120 338 continue;
b8f7fb13
CW
339 /* find a cpu for this uvhub */
340 cpu = uvhub_to_first_cpu(uvhub);
341 cpu_set(cpu, mask);
1812924b 342 }
b8f7fb13
CW
343 /* IPI all cpus; Preemption is already disabled */
344 smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1);
345 return;
346}
347
348static inline unsigned long
349cycles_2_us(unsigned long long cyc)
350{
351 unsigned long long ns;
352 unsigned long us;
353 ns = (cyc * per_cpu(cyc2ns, smp_processor_id()))
354 >> CYC2NS_SCALE_FACTOR;
355 us = ns / 1000;
356 return us;
1812924b
CW
357}
358
b194b120 359/*
b8f7fb13
CW
360 * wait for all cpus on this hub to finish their sends and go quiet
361 * leaves uvhub_quiesce set so that no new broadcasts are started by
362 * bau_flush_send_and_wait()
363 */
364static inline void
365quiesce_local_uvhub(struct bau_control *hmaster)
366{
367 atomic_add_short_return(1, (struct atomic_short *)
368 &hmaster->uvhub_quiesce);
369}
370
371/*
372 * mark this quiet-requestor as done
373 */
374static inline void
375end_uvhub_quiesce(struct bau_control *hmaster)
376{
377 atomic_add_short_return(-1, (struct atomic_short *)
378 &hmaster->uvhub_quiesce);
379}
380
381/*
382 * Wait for completion of a broadcast software ack message
383 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
b194b120 384 */
dc163a41 385static int uv_wait_completion(struct bau_desc *bau_desc,
b8f7fb13
CW
386 unsigned long mmr_offset, int right_shift, int this_cpu,
387 struct bau_control *bcp, struct bau_control *smaster, long try)
b194b120 388{
b8f7fb13 389 int relaxes = 0;
b194b120 390 unsigned long descriptor_status;
b8f7fb13
CW
391 unsigned long mmr;
392 unsigned long mask;
393 cycles_t ttime;
394 cycles_t timeout_time;
395 struct ptc_stats *stat = &per_cpu(ptcstats, this_cpu);
396 struct bau_control *hmaster;
b194b120 397
b8f7fb13
CW
398 hmaster = bcp->uvhub_master;
399 timeout_time = get_cycles() + bcp->timeout_interval;
b194b120 400
b8f7fb13 401 /* spin on the status MMR, waiting for it to go idle */
b194b120
CW
402 while ((descriptor_status = (((unsigned long)
403 uv_read_local_mmr(mmr_offset) >>
404 right_shift) & UV_ACT_STATUS_MASK)) !=
405 DESC_STATUS_IDLE) {
b194b120 406 /*
b8f7fb13
CW
407 * Our software ack messages may be blocked because there are
408 * no swack resources available. As long as none of them
409 * has timed out hardware will NACK our message and its
410 * state will stay IDLE.
b194b120 411 */
b8f7fb13
CW
412 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
413 stat->s_stimeout++;
414 return FLUSH_GIVEUP;
415 } else if (descriptor_status ==
416 DESC_STATUS_DESTINATION_TIMEOUT) {
417 stat->s_dtimeout++;
418 ttime = get_cycles();
419
420 /*
421 * Our retries may be blocked by all destination
422 * swack resources being consumed, and a timeout
423 * pending. In that case hardware returns the
424 * ERROR that looks like a destination timeout.
425 */
426 if (cycles_2_us(ttime - bcp->send_message) < BIOS_TO) {
427 bcp->conseccompletes = 0;
428 return FLUSH_RETRY_PLUGGED;
429 }
430
431 bcp->conseccompletes = 0;
432 return FLUSH_RETRY_TIMEOUT;
433 } else {
434 /*
435 * descriptor_status is still BUSY
436 */
437 cpu_relax();
438 relaxes++;
439 if (relaxes >= 10000) {
440 relaxes = 0;
441 if (get_cycles() > timeout_time) {
442 quiesce_local_uvhub(hmaster);
443
444 /* single-thread the register change */
445 spin_lock(&hmaster->masks_lock);
446 mmr = uv_read_local_mmr(mmr_offset);
447 mask = 0UL;
448 mask |= (3UL < right_shift);
449 mask = ~mask;
450 mmr &= mask;
451 uv_write_local_mmr(mmr_offset, mmr);
452 spin_unlock(&hmaster->masks_lock);
453 end_uvhub_quiesce(hmaster);
454 stat->s_busy++;
b194b120
CW
455 return FLUSH_GIVEUP;
456 }
b194b120
CW
457 }
458 }
459 }
b8f7fb13 460 bcp->conseccompletes++;
b194b120
CW
461 return FLUSH_COMPLETE;
462}
463
b8f7fb13
CW
464static inline cycles_t
465sec_2_cycles(unsigned long sec)
466{
467 unsigned long ns;
468 cycles_t cyc;
469
470 ns = sec * 1000000000;
471 cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
472 return cyc;
473}
474
475/*
476 * conditionally add 1 to *v, unless *v is >= u
477 * return 0 if we cannot add 1 to *v because it is >= u
478 * return 1 if we can add 1 to *v because it is < u
479 * the add is atomic
480 *
481 * This is close to atomic_add_unless(), but this allows the 'u' value
482 * to be lowered below the current 'v'. atomic_add_unless can only stop
483 * on equal.
484 */
485static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
486{
487 spin_lock(lock);
488 if (atomic_read(v) >= u) {
489 spin_unlock(lock);
490 return 0;
491 }
492 atomic_inc(v);
493 spin_unlock(lock);
494 return 1;
495}
496
b194b120
CW
497/**
498 * uv_flush_send_and_wait
499 *
b8f7fb13 500 * Send a broadcast and wait for it to complete.
b194b120 501 *
b8f7fb13
CW
502 * The flush_mask contains the cpus the broadcast is to be sent to, plus
503 * cpus that are on the local uvhub.
b194b120 504 *
b8f7fb13
CW
505 * Returns NULL if all flushing represented in the mask was done. The mask
506 * is zeroed.
bdbcdd48 507 * Returns @flush_mask if some remote flushing remains to be done. The
b8f7fb13
CW
508 * mask will have some bits still set, representing any cpus on the local
509 * uvhub (not current cpu) and any on remote uvhubs if the broadcast failed.
b194b120 510 */
b8f7fb13
CW
511const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
512 struct cpumask *flush_mask,
513 struct bau_control *bcp)
b194b120 514{
b194b120 515 int right_shift;
b8f7fb13 516 int uvhub;
b4c286e6 517 int bit;
b8f7fb13
CW
518 int completion_status = 0;
519 int seq_number = 0;
520 long try = 0;
521 int cpu = bcp->uvhub_cpu;
522 int this_cpu = bcp->cpu;
523 int this_uvhub = bcp->uvhub;
b194b120 524 unsigned long mmr_offset;
b4c286e6 525 unsigned long index;
b194b120
CW
526 cycles_t time1;
527 cycles_t time2;
b8f7fb13
CW
528 struct ptc_stats *stat = &per_cpu(ptcstats, bcp->cpu);
529 struct bau_control *smaster = bcp->socket_master;
530 struct bau_control *hmaster = bcp->uvhub_master;
531
532 /*
533 * Spin here while there are hmaster->max_concurrent or more active
534 * descriptors. This is the per-uvhub 'throttle'.
535 */
536 if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
537 &hmaster->active_descriptor_count,
538 hmaster->max_concurrent)) {
539 stat->s_throttles++;
540 do {
541 cpu_relax();
542 } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
543 &hmaster->active_descriptor_count,
544 hmaster->max_concurrent));
545 }
546
547 while (hmaster->uvhub_quiesce)
548 cpu_relax();
b194b120
CW
549
550 if (cpu < UV_CPUS_PER_ACT_STATUS) {
551 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
552 right_shift = cpu * UV_ACT_STATUS_SIZE;
553 } else {
554 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
555 right_shift =
556 ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
557 }
558 time1 = get_cycles();
559 do {
b8f7fb13
CW
560 /*
561 * Every message from any given cpu gets a unique message
562 * sequence number. But retries use that same number.
563 * Our message may have timed out at the destination because
564 * all sw-ack resources are in use and there is a timeout
565 * pending there. In that case, our last send never got
566 * placed into the queue and we need to persist until it
567 * does.
568 *
569 * Make any retry a type MSG_RETRY so that the destination will
570 * free any resource held by a previous message from this cpu.
571 */
572 if (try == 0) {
573 /* use message type set by the caller the first time */
574 seq_number = bcp->message_number++;
575 } else {
576 /* use RETRY type on all the rest; same sequence */
577 bau_desc->header.msg_type = MSG_RETRY;
578 stat->s_retry_messages++;
579 }
580 bau_desc->header.sequence = seq_number;
dc163a41 581 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
b8f7fb13
CW
582 bcp->uvhub_cpu;
583 bcp->send_message = get_cycles();
584
b194b120 585 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
b8f7fb13
CW
586
587 try++;
b194b120 588 completion_status = uv_wait_completion(bau_desc, mmr_offset,
b8f7fb13
CW
589 right_shift, this_cpu, bcp, smaster, try);
590
591 if (completion_status == FLUSH_RETRY_PLUGGED) {
592 /*
593 * Our retries may be blocked by all destination swack
594 * resources being consumed, and a timeout pending. In
595 * that case hardware immediately returns the ERROR
596 * that looks like a destination timeout.
597 */
598 udelay(TIMEOUT_DELAY);
599 bcp->plugged_tries++;
600 if (bcp->plugged_tries >= PLUGSB4RESET) {
601 bcp->plugged_tries = 0;
602 quiesce_local_uvhub(hmaster);
603 spin_lock(&hmaster->queue_lock);
604 uv_reset_with_ipi(&bau_desc->distribution,
605 this_cpu);
606 spin_unlock(&hmaster->queue_lock);
607 end_uvhub_quiesce(hmaster);
608 bcp->ipi_attempts++;
609 stat->s_resets_plug++;
610 }
611 } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
612 hmaster->max_concurrent = 1;
613 bcp->timeout_tries++;
614 udelay(TIMEOUT_DELAY);
615 if (bcp->timeout_tries >= TIMEOUTSB4RESET) {
616 bcp->timeout_tries = 0;
617 quiesce_local_uvhub(hmaster);
618 spin_lock(&hmaster->queue_lock);
619 uv_reset_with_ipi(&bau_desc->distribution,
620 this_cpu);
621 spin_unlock(&hmaster->queue_lock);
622 end_uvhub_quiesce(hmaster);
623 bcp->ipi_attempts++;
624 stat->s_resets_timeout++;
625 }
626 }
627 if (bcp->ipi_attempts >= 3) {
628 bcp->ipi_attempts = 0;
629 completion_status = FLUSH_GIVEUP;
630 break;
631 }
632 cpu_relax();
633 } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
634 (completion_status == FLUSH_RETRY_TIMEOUT));
b194b120 635 time2 = get_cycles();
b194b120 636
b8f7fb13
CW
637 if ((completion_status == FLUSH_COMPLETE) && (bcp->conseccompletes > 5)
638 && (hmaster->max_concurrent < hmaster->max_concurrent_constant))
639 hmaster->max_concurrent++;
640
641 /*
642 * hold any cpu not timing out here; no other cpu currently held by
643 * the 'throttle' should enter the activation code
644 */
645 while (hmaster->uvhub_quiesce)
646 cpu_relax();
647 atomic_dec(&hmaster->active_descriptor_count);
648
649 /* guard against cycles wrap */
650 if (time2 > time1)
651 stat->s_time += (time2 - time1);
652 else
653 stat->s_requestor--; /* don't count this one */
654 if (completion_status == FLUSH_COMPLETE && try > 1)
655 stat->s_retriesok++;
656 else if (completion_status == FLUSH_GIVEUP) {
b194b120
CW
657 /*
658 * Cause the caller to do an IPI-style TLB shootdown on
b8f7fb13 659 * the target cpu's, all of which are still in the mask.
b194b120 660 */
b8f7fb13 661 stat->s_giveup++;
2749ebe3 662 return flush_mask;
b194b120
CW
663 }
664
665 /*
666 * Success, so clear the remote cpu's from the mask so we don't
667 * use the IPI method of shootdown on them.
668 */
bdbcdd48 669 for_each_cpu(bit, flush_mask) {
b8f7fb13
CW
670 uvhub = uv_cpu_to_blade_id(bit);
671 if (uvhub == this_uvhub)
b194b120 672 continue;
bdbcdd48 673 cpumask_clear_cpu(bit, flush_mask);
b194b120 674 }
bdbcdd48
TH
675 if (!cpumask_empty(flush_mask))
676 return flush_mask;
b8f7fb13 677
bdbcdd48 678 return NULL;
b194b120
CW
679}
680
1812924b
CW
681/**
682 * uv_flush_tlb_others - globally purge translation cache of a virtual
683 * address or all TLB's
bdbcdd48 684 * @cpumask: mask of all cpu's in which the address is to be removed
1812924b
CW
685 * @mm: mm_struct containing virtual address range
686 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
bdbcdd48 687 * @cpu: the current cpu
1812924b
CW
688 *
689 * This is the entry point for initiating any UV global TLB shootdown.
690 *
691 * Purges the translation caches of all specified processors of the given
692 * virtual address, or purges all TLB's on specified processors.
693 *
bdbcdd48
TH
694 * The caller has derived the cpumask from the mm_struct. This function
695 * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1812924b 696 *
b8f7fb13
CW
697 * The cpumask is converted into a uvhubmask of the uvhubs containing
698 * those cpus.
b194b120 699 *
bdbcdd48
TH
700 * Note that this function should be called with preemption disabled.
701 *
702 * Returns NULL if all remote flushing was done.
703 * Returns pointer to cpumask if some remote flushing remains to be
704 * done. The returned pointer is valid till preemption is re-enabled.
1812924b 705 */
bdbcdd48
TH
706const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
707 struct mm_struct *mm,
708 unsigned long va, unsigned int cpu)
1812924b 709{
b8f7fb13
CW
710 int remotes;
711 int tcpu;
712 int uvhub;
b194b120 713 int locals = 0;
dc163a41 714 struct bau_desc *bau_desc;
b8f7fb13
CW
715 struct cpumask *flush_mask;
716 struct ptc_stats *stat;
717 struct bau_control *bcp;
bdbcdd48 718
b8f7fb13
CW
719 if (nobau)
720 return cpumask;
bdbcdd48 721
b8f7fb13
CW
722 bcp = &per_cpu(bau_control, cpu);
723 /*
724 * Each sending cpu has a per-cpu mask which it fills from the caller's
725 * cpu mask. Only remote cpus are converted to uvhubs and copied.
726 */
727 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
728 /*
729 * copy cpumask to flush_mask, removing current cpu
730 * (current cpu should already have been flushed by the caller and
731 * should never be returned if we return flush_mask)
732 */
733 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
734 if (cpu_isset(cpu, *cpumask))
735 locals++; /* current cpu was targeted */
1812924b 736
b8f7fb13
CW
737 bau_desc = bcp->descriptor_base;
738 bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
1812924b 739
b8f7fb13
CW
740 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
741 remotes = 0;
742 for_each_cpu(tcpu, flush_mask) {
743 uvhub = uv_cpu_to_blade_id(tcpu);
744 if (uvhub == bcp->uvhub) {
b194b120 745 locals++;
1812924b 746 continue;
b194b120 747 }
b8f7fb13
CW
748 bau_uvhub_set(uvhub, &bau_desc->distribution);
749 remotes++;
1812924b 750 }
b8f7fb13 751 if (remotes == 0) {
b194b120 752 /*
b8f7fb13
CW
753 * No off_hub flushing; return status for local hub.
754 * Return the caller's mask if all were local (the current
755 * cpu may be in that mask).
b194b120
CW
756 */
757 if (locals)
b8f7fb13 758 return cpumask;
b194b120 759 else
bdbcdd48 760 return NULL;
b194b120 761 }
b8f7fb13
CW
762 stat = &per_cpu(ptcstats, cpu);
763 stat->s_requestor++;
764 stat->s_ntargcpu += remotes;
765 remotes = bau_uvhub_weight(&bau_desc->distribution);
766 stat->s_ntarguvhub += remotes;
767 if (remotes >= 16)
768 stat->s_ntarguvhub16++;
769 else if (remotes >= 8)
770 stat->s_ntarguvhub8++;
771 else if (remotes >= 4)
772 stat->s_ntarguvhub4++;
773 else if (remotes >= 2)
774 stat->s_ntarguvhub2++;
775 else
776 stat->s_ntarguvhub1++;
1812924b
CW
777
778 bau_desc->payload.address = va;
bdbcdd48 779 bau_desc->payload.sending_cpu = cpu;
1812924b 780
b8f7fb13
CW
781 /*
782 * uv_flush_send_and_wait returns null if all cpu's were messaged, or
783 * the adjusted flush_mask if any cpu's were not messaged.
784 */
785 return uv_flush_send_and_wait(bau_desc, flush_mask, bcp);
1812924b
CW
786}
787
788/*
789 * The BAU message interrupt comes here. (registered by set_intr_gate)
790 * See entry_64.S
791 *
792 * We received a broadcast assist message.
793 *
b8f7fb13 794 * Interrupts are disabled; this interrupt could represent
1812924b
CW
795 * the receipt of several messages.
796 *
b8f7fb13
CW
797 * All cores/threads on this hub get this interrupt.
798 * The last one to see it does the software ack.
1812924b 799 * (the resource will not be freed until noninterruptable cpus see this
b8f7fb13 800 * interrupt; hardware may timeout the s/w ack and reply ERROR)
1812924b 801 */
b194b120 802void uv_bau_message_interrupt(struct pt_regs *regs)
1812924b 803{
1812924b 804 int count = 0;
b8f7fb13
CW
805 cycles_t time_start;
806 struct bau_payload_queue_entry *msg;
807 struct bau_control *bcp;
808 struct ptc_stats *stat;
809 struct msg_desc msgdesc;
810
811 time_start = get_cycles();
812 bcp = &per_cpu(bau_control, smp_processor_id());
813 stat = &per_cpu(ptcstats, smp_processor_id());
814 msgdesc.va_queue_first = bcp->va_queue_first;
815 msgdesc.va_queue_last = bcp->va_queue_last;
816 msg = bcp->bau_msg_head;
1812924b
CW
817 while (msg->sw_ack_vector) {
818 count++;
b8f7fb13
CW
819 msgdesc.msg_slot = msg - msgdesc.va_queue_first;
820 msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1;
821 msgdesc.msg = msg;
822 uv_bau_process_message(&msgdesc, bcp);
1812924b 823 msg++;
b8f7fb13
CW
824 if (msg > msgdesc.va_queue_last)
825 msg = msgdesc.va_queue_first;
826 bcp->bau_msg_head = msg;
1812924b 827 }
b8f7fb13 828 stat->d_time += (get_cycles() - time_start);
1812924b 829 if (!count)
b8f7fb13 830 stat->d_nomsg++;
1812924b 831 else if (count > 1)
b8f7fb13
CW
832 stat->d_multmsg++;
833 ack_APIC_irq();
1812924b
CW
834}
835
c4c4688f
CW
836/*
837 * uv_enable_timeouts
838 *
b8f7fb13 839 * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
c4c4688f
CW
840 * shootdown message timeouts enabled. The timeout does not cause
841 * an interrupt, but causes an error message to be returned to
842 * the sender.
843 */
b194b120 844static void uv_enable_timeouts(void)
1812924b 845{
b8f7fb13
CW
846 int uvhub;
847 int nuvhubs;
1812924b 848 int pnode;
c4c4688f 849 unsigned long mmr_image;
1812924b 850
b8f7fb13 851 nuvhubs = uv_num_possible_blades();
1812924b 852
b8f7fb13
CW
853 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
854 if (!uv_blade_nr_possible_cpus(uvhub))
1812924b 855 continue;
c4c4688f 856
b8f7fb13 857 pnode = uv_blade_to_pnode(uvhub);
c4c4688f
CW
858 mmr_image =
859 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
860 /*
861 * Set the timeout period and then lock it in, in three
862 * steps; captures and locks in the period.
863 *
864 * To program the period, the SOFT_ACK_MODE must be off.
865 */
866 mmr_image &= ~((unsigned long)1 <<
6f4edd69 867 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
c4c4688f
CW
868 uv_write_global_mmr64
869 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
870 /*
871 * Set the 4-bit period.
872 */
873 mmr_image &= ~((unsigned long)0xf <<
6f4edd69 874 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
c4c4688f 875 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
6f4edd69 876 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
c4c4688f
CW
877 uv_write_global_mmr64
878 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
879 /*
880 * Subsequent reversals of the timebase bit (3) cause an
881 * immediate timeout of one or all INTD resources as
882 * indicated in bits 2:0 (7 causes all of them to timeout).
883 */
884 mmr_image |= ((unsigned long)1 <<
6f4edd69 885 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
c4c4688f
CW
886 uv_write_global_mmr64
887 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
1812924b 888 }
1812924b
CW
889}
890
b194b120 891static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
1812924b
CW
892{
893 if (*offset < num_possible_cpus())
894 return offset;
895 return NULL;
896}
897
b194b120 898static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1812924b
CW
899{
900 (*offset)++;
901 if (*offset < num_possible_cpus())
902 return offset;
903 return NULL;
904}
905
b194b120 906static void uv_ptc_seq_stop(struct seq_file *file, void *data)
1812924b
CW
907{
908}
909
b8f7fb13
CW
910static inline unsigned long long
911millisec_2_cycles(unsigned long millisec)
912{
913 unsigned long ns;
914 unsigned long long cyc;
915
916 ns = millisec * 1000;
917 cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
918 return cyc;
919}
920
1812924b 921/*
b8f7fb13
CW
922 * Display the statistics thru /proc.
923 * 'data' points to the cpu number
1812924b 924 */
b194b120 925static int uv_ptc_seq_show(struct seq_file *file, void *data)
1812924b
CW
926{
927 struct ptc_stats *stat;
928 int cpu;
929
930 cpu = *(loff_t *)data;
931
932 if (!cpu) {
933 seq_printf(file,
b8f7fb13 934 "# cpu sent stime numuvhubs numuvhubs16 numuvhubs8 ");
1812924b 935 seq_printf(file,
b8f7fb13
CW
936 "numuvhubs4 numuvhubs2 numuvhubs1 numcpus dto ");
937 seq_printf(file,
938 "retries rok resetp resett giveup sto bz throt ");
939 seq_printf(file,
940 "sw_ack recv rtime all ");
941 seq_printf(file,
942 "one mult none retry canc nocan reset rcan\n");
1812924b
CW
943 }
944 if (cpu < num_possible_cpus() && cpu_online(cpu)) {
945 stat = &per_cpu(ptcstats, cpu);
b8f7fb13
CW
946 /* source side statistics */
947 seq_printf(file,
948 "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
949 cpu, stat->s_requestor, cycles_2_us(stat->s_time),
950 stat->s_ntarguvhub, stat->s_ntarguvhub16,
951 stat->s_ntarguvhub8, stat->s_ntarguvhub4,
952 stat->s_ntarguvhub2, stat->s_ntarguvhub1,
953 stat->s_ntargcpu, stat->s_dtimeout);
954 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
955 stat->s_retry_messages, stat->s_retriesok,
956 stat->s_resets_plug, stat->s_resets_timeout,
957 stat->s_giveup, stat->s_stimeout,
958 stat->s_busy, stat->s_throttles);
959 /* destination side statistics */
960 seq_printf(file,
961 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
9674f35b 962 uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
1812924b 963 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
b8f7fb13
CW
964 stat->d_requestee, cycles_2_us(stat->d_time),
965 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
966 stat->d_nomsg, stat->d_retries, stat->d_canceled,
967 stat->d_nocanceled, stat->d_resets,
968 stat->d_rcanceled);
1812924b
CW
969 }
970
971 return 0;
972}
973
974/*
b8f7fb13 975 * -1: resetf the statistics
1812924b 976 * 0: display meaning of the statistics
b8f7fb13 977 * >0: maximum concurrent active descriptors per uvhub (throttle)
1812924b 978 */
b194b120 979static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
b4c286e6 980 size_t count, loff_t *data)
1812924b 981{
b8f7fb13
CW
982 int cpu;
983 long input_arg;
1812924b 984 char optstr[64];
b8f7fb13
CW
985 struct ptc_stats *stat;
986 struct bau_control *bcp;
1812924b 987
e7eb8726 988 if (count == 0 || count > sizeof(optstr))
cef53278 989 return -EINVAL;
1812924b
CW
990 if (copy_from_user(optstr, user, count))
991 return -EFAULT;
992 optstr[count - 1] = '\0';
b8f7fb13 993 if (strict_strtol(optstr, 10, &input_arg) < 0) {
1812924b
CW
994 printk(KERN_DEBUG "%s is invalid\n", optstr);
995 return -EINVAL;
996 }
997
b8f7fb13 998 if (input_arg == 0) {
1812924b 999 printk(KERN_DEBUG "# cpu: cpu number\n");
b8f7fb13
CW
1000 printk(KERN_DEBUG "Sender statistics:\n");
1001 printk(KERN_DEBUG
1002 "sent: number of shootdown messages sent\n");
1003 printk(KERN_DEBUG
1004 "stime: time spent sending messages\n");
1005 printk(KERN_DEBUG
1006 "numuvhubs: number of hubs targeted with shootdown\n");
1007 printk(KERN_DEBUG
1008 "numuvhubs16: number times 16 or more hubs targeted\n");
1009 printk(KERN_DEBUG
1010 "numuvhubs8: number times 8 or more hubs targeted\n");
1011 printk(KERN_DEBUG
1012 "numuvhubs4: number times 4 or more hubs targeted\n");
1013 printk(KERN_DEBUG
1014 "numuvhubs2: number times 2 or more hubs targeted\n");
1015 printk(KERN_DEBUG
1016 "numuvhubs1: number times 1 hub targeted\n");
1017 printk(KERN_DEBUG
1018 "numcpus: number of cpus targeted with shootdown\n");
1019 printk(KERN_DEBUG
1020 "dto: number of destination timeouts\n");
1021 printk(KERN_DEBUG
1022 "retries: destination timeout retries sent\n");
1023 printk(KERN_DEBUG
1024 "rok: : destination timeouts successfully retried\n");
1025 printk(KERN_DEBUG
1026 "resetp: ipi-style resource resets for plugs\n");
1027 printk(KERN_DEBUG
1028 "resett: ipi-style resource resets for timeouts\n");
1029 printk(KERN_DEBUG
1030 "giveup: fall-backs to ipi-style shootdowns\n");
1031 printk(KERN_DEBUG
1032 "sto: number of source timeouts\n");
1033 printk(KERN_DEBUG
1034 "bz: number of stay-busy's\n");
1035 printk(KERN_DEBUG
1036 "throt: number times spun in throttle\n");
1037 printk(KERN_DEBUG "Destination side statistics:\n");
1812924b 1038 printk(KERN_DEBUG
b8f7fb13 1039 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
1812924b 1040 printk(KERN_DEBUG
b8f7fb13 1041 "recv: shootdown messages received\n");
1812924b 1042 printk(KERN_DEBUG
b8f7fb13 1043 "rtime: time spent processing messages\n");
1812924b 1044 printk(KERN_DEBUG
b8f7fb13 1045 "all: shootdown all-tlb messages\n");
1812924b 1046 printk(KERN_DEBUG
b8f7fb13 1047 "one: shootdown one-tlb messages\n");
1812924b 1048 printk(KERN_DEBUG
b8f7fb13 1049 "mult: interrupts that found multiple messages\n");
1812924b 1050 printk(KERN_DEBUG
b8f7fb13 1051 "none: interrupts that found no messages\n");
1812924b 1052 printk(KERN_DEBUG
b8f7fb13 1053 "retry: number of retry messages processed\n");
1812924b 1054 printk(KERN_DEBUG
b8f7fb13 1055 "canc: number messages canceled by retries\n");
1812924b 1056 printk(KERN_DEBUG
b8f7fb13 1057 "nocan: number retries that found nothing to cancel\n");
1812924b 1058 printk(KERN_DEBUG
b8f7fb13
CW
1059 "reset: number of ipi-style reset requests processed\n");
1060 printk(KERN_DEBUG
1061 "rcan: number messages canceled by reset requests\n");
1062 } else if (input_arg == -1) {
1063 for_each_present_cpu(cpu) {
1064 stat = &per_cpu(ptcstats, cpu);
1065 memset(stat, 0, sizeof(struct ptc_stats));
1066 }
1812924b 1067 } else {
b8f7fb13
CW
1068 uv_bau_max_concurrent = input_arg;
1069 bcp = &per_cpu(bau_control, smp_processor_id());
1070 if (uv_bau_max_concurrent < 1 ||
1071 uv_bau_max_concurrent > bcp->cpus_in_uvhub) {
1072 printk(KERN_DEBUG
1073 "Error: BAU max concurrent %d; %d is invalid\n",
1074 bcp->max_concurrent, uv_bau_max_concurrent);
1075 return -EINVAL;
1076 }
1077 printk(KERN_DEBUG "Set BAU max concurrent:%d\n",
1078 uv_bau_max_concurrent);
1079 for_each_present_cpu(cpu) {
1080 bcp = &per_cpu(bau_control, cpu);
1081 bcp->max_concurrent = uv_bau_max_concurrent;
1082 }
1812924b
CW
1083 }
1084
1085 return count;
1086}
1087
1088static const struct seq_operations uv_ptc_seq_ops = {
dc163a41
IM
1089 .start = uv_ptc_seq_start,
1090 .next = uv_ptc_seq_next,
1091 .stop = uv_ptc_seq_stop,
1092 .show = uv_ptc_seq_show
1812924b
CW
1093};
1094
b194b120 1095static int uv_ptc_proc_open(struct inode *inode, struct file *file)
1812924b
CW
1096{
1097 return seq_open(file, &uv_ptc_seq_ops);
1098}
1099
1100static const struct file_operations proc_uv_ptc_operations = {
b194b120
CW
1101 .open = uv_ptc_proc_open,
1102 .read = seq_read,
1103 .write = uv_ptc_proc_write,
1104 .llseek = seq_lseek,
1105 .release = seq_release,
1812924b
CW
1106};
1107
b194b120 1108static int __init uv_ptc_init(void)
1812924b 1109{
b194b120 1110 struct proc_dir_entry *proc_uv_ptc;
1812924b
CW
1111
1112 if (!is_uv_system())
1113 return 0;
1114
10f02d11
AD
1115 proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1116 &proc_uv_ptc_operations);
1812924b
CW
1117 if (!proc_uv_ptc) {
1118 printk(KERN_ERR "unable to create %s proc entry\n",
1119 UV_PTC_BASENAME);
1120 return -EINVAL;
1121 }
1812924b
CW
1122 return 0;
1123}
1124
1812924b 1125/*
b194b120 1126 * initialize the sending side's sending buffers
1812924b 1127 */
b8f7fb13 1128static void
b194b120 1129uv_activation_descriptor_init(int node, int pnode)
1812924b
CW
1130{
1131 int i;
b8f7fb13 1132 int cpu;
1812924b 1133 unsigned long pa;
1812924b 1134 unsigned long m;
b194b120 1135 unsigned long n;
b8f7fb13
CW
1136 struct bau_desc *bau_desc;
1137 struct bau_desc *bd2;
1138 struct bau_control *bcp;
b194b120 1139
0e2595cd
CW
1140 /*
1141 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
b8f7fb13 1142 * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
0e2595cd 1143 */
b8f7fb13 1144 bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
0e2595cd 1145 UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
b8f7fb13 1146 BUG_ON(!bau_desc);
b4c286e6 1147
b8f7fb13
CW
1148 pa = uv_gpa(bau_desc); /* need the real nasid*/
1149 n = pa >> uv_nshift;
b194b120 1150 m = pa & uv_mmask;
b4c286e6 1151
9c26f52b
CW
1152 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
1153 (n << UV_DESC_BASE_PNODE_SHIFT | m));
b4c286e6 1154
0e2595cd
CW
1155 /*
1156 * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
1157 * cpu even though we only use the first one; one descriptor can
b8f7fb13 1158 * describe a broadcast to 256 uv hubs.
0e2595cd 1159 */
b8f7fb13
CW
1160 for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
1161 i++, bd2++) {
1162 memset(bd2, 0, sizeof(struct bau_desc));
1163 bd2->header.sw_ack_flag = 1;
94ca8e48 1164 /*
b8f7fb13
CW
1165 * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
1166 * in the partition. The bit map will indicate uvhub numbers,
1167 * which are 0-N in a partition. Pnodes are unique system-wide.
94ca8e48 1168 */
b8f7fb13
CW
1169 bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
1170 bd2->header.dest_subnodeid = 0x10; /* the LB */
1171 bd2->header.command = UV_NET_ENDPOINT_INTD;
1172 bd2->header.int_both = 1;
b194b120
CW
1173 /*
1174 * all others need to be set to zero:
1175 * fairness chaining multilevel count replied_to
1176 */
1177 }
b8f7fb13
CW
1178 for_each_present_cpu(cpu) {
1179 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1180 continue;
1181 bcp = &per_cpu(bau_control, cpu);
1182 bcp->descriptor_base = bau_desc;
1183 }
b194b120
CW
1184}
1185
1186/*
1187 * initialize the destination side's receiving buffers
b8f7fb13
CW
1188 * entered for each uvhub in the partition
1189 * - node is first node (kernel memory notion) on the uvhub
1190 * - pnode is the uvhub's physical identifier
b194b120 1191 */
b8f7fb13
CW
1192static void
1193uv_payload_queue_init(int node, int pnode)
b194b120 1194{
4ea3c51d 1195 int pn;
b8f7fb13 1196 int cpu;
b4c286e6 1197 char *cp;
b8f7fb13
CW
1198 unsigned long pa;
1199 struct bau_payload_queue_entry *pqp;
1200 struct bau_payload_queue_entry *pqp_malloc;
1201 struct bau_control *bcp;
1812924b 1202
dc163a41
IM
1203 pqp = (struct bau_payload_queue_entry *) kmalloc_node(
1204 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
1205 GFP_KERNEL, node);
1206 BUG_ON(!pqp);
b8f7fb13 1207 pqp_malloc = pqp;
b4c286e6 1208
b194b120
CW
1209 cp = (char *)pqp + 31;
1210 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
b8f7fb13
CW
1211
1212 for_each_present_cpu(cpu) {
1213 if (pnode != uv_cpu_to_pnode(cpu))
1214 continue;
1215 /* for every cpu on this pnode: */
1216 bcp = &per_cpu(bau_control, cpu);
1217 bcp->va_queue_first = pqp;
1218 bcp->bau_msg_head = pqp;
1219 bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
1220 }
4ea3c51d
CW
1221 /*
1222 * need the pnode of where the memory was really allocated
1223 */
1224 pa = uv_gpa(pqp);
b8f7fb13 1225 pn = pa >> uv_nshift;
b194b120
CW
1226 uv_write_global_mmr64(pnode,
1227 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
4ea3c51d 1228 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
b194b120
CW
1229 uv_physnodeaddr(pqp));
1230 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
1231 uv_physnodeaddr(pqp));
b194b120
CW
1232 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
1233 (unsigned long)
b8f7fb13
CW
1234 uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
1235 /* in effect, all msg_type's are set to MSG_NOOP */
dc163a41 1236 memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
b194b120 1237}
1812924b 1238
b194b120 1239/*
b8f7fb13 1240 * Initialization of each UV hub's structures
b194b120 1241 */
b8f7fb13 1242static void __init uv_init_uvhub(int uvhub, int vector)
b194b120 1243{
9674f35b 1244 int node;
b194b120 1245 int pnode;
b194b120 1246 unsigned long apicid;
b8f7fb13
CW
1247
1248 node = uvhub_to_first_node(uvhub);
1249 pnode = uv_blade_to_pnode(uvhub);
1250 uv_activation_descriptor_init(node, pnode);
1251 uv_payload_queue_init(node, pnode);
b194b120
CW
1252 /*
1253 * the below initialization can't be in firmware because the
1254 * messaging IRQ will be determined by the OS
1255 */
b8f7fb13 1256 apicid = uvhub_to_first_apicid(uvhub);
e38e2af1 1257 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
b8f7fb13
CW
1258 ((apicid << 32) | vector));
1259}
1260
1261/*
1262 * initialize the bau_control structure for each cpu
1263 */
1264static void uv_init_per_cpu(int nuvhubs)
1265{
1266 int i, j, k;
1267 int cpu;
1268 int pnode;
1269 int uvhub;
1270 short socket = 0;
1271 struct bau_control *bcp;
1272 struct uvhub_desc *bdp;
1273 struct socket_desc *sdp;
1274 struct bau_control *hmaster = NULL;
1275 struct bau_control *smaster = NULL;
1276 struct socket_desc {
1277 short num_cpus;
1278 short cpu_number[16];
1279 };
1280 struct uvhub_desc {
1281 short num_sockets;
1282 short num_cpus;
1283 short uvhub;
1284 short pnode;
1285 struct socket_desc socket[2];
1286 };
1287 struct uvhub_desc *uvhub_descs;
1288
1289 uvhub_descs = (struct uvhub_desc *)
1290 kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1291 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1292 for_each_present_cpu(cpu) {
1293 bcp = &per_cpu(bau_control, cpu);
1294 memset(bcp, 0, sizeof(struct bau_control));
1295 spin_lock_init(&bcp->masks_lock);
1296 bcp->max_concurrent = uv_bau_max_concurrent;
1297 pnode = uv_cpu_hub_info(cpu)->pnode;
1298 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1299 bdp = &uvhub_descs[uvhub];
1300 bdp->num_cpus++;
1301 bdp->uvhub = uvhub;
1302 bdp->pnode = pnode;
1303 /* time interval to catch a hardware stay-busy bug */
1304 bcp->timeout_interval = millisec_2_cycles(3);
1305 /* kludge: assume uv_hub.h is constant */
1306 socket = (cpu_physical_id(cpu)>>5)&1;
1307 if (socket >= bdp->num_sockets)
1308 bdp->num_sockets = socket+1;
1309 sdp = &bdp->socket[socket];
1310 sdp->cpu_number[sdp->num_cpus] = cpu;
1311 sdp->num_cpus++;
1312 }
1313 socket = 0;
1314 for_each_possible_blade(uvhub) {
1315 bdp = &uvhub_descs[uvhub];
1316 for (i = 0; i < bdp->num_sockets; i++) {
1317 sdp = &bdp->socket[i];
1318 for (j = 0; j < sdp->num_cpus; j++) {
1319 cpu = sdp->cpu_number[j];
1320 bcp = &per_cpu(bau_control, cpu);
1321 bcp->cpu = cpu;
1322 if (j == 0) {
1323 smaster = bcp;
1324 if (i == 0)
1325 hmaster = bcp;
1326 }
1327 bcp->cpus_in_uvhub = bdp->num_cpus;
1328 bcp->cpus_in_socket = sdp->num_cpus;
1329 bcp->socket_master = smaster;
1330 bcp->uvhub_master = hmaster;
1331 for (k = 0; k < DEST_Q_SIZE; k++)
1332 bcp->socket_acknowledge_count[k] = 0;
1333 bcp->uvhub_cpu =
1334 uv_cpu_hub_info(cpu)->blade_processor_id;
1335 }
1336 socket++;
1337 }
1338 }
1339 kfree(uvhub_descs);
b194b120
CW
1340}
1341
1342/*
1343 * Initialization of BAU-related structures
1344 */
1345static int __init uv_bau_init(void)
1346{
b8f7fb13
CW
1347 int uvhub;
1348 int pnode;
1349 int nuvhubs;
2c74d666 1350 int cur_cpu;
b8f7fb13
CW
1351 int vector;
1352 unsigned long mmr;
b194b120
CW
1353
1354 if (!is_uv_system())
1355 return 0;
1812924b 1356
b8f7fb13
CW
1357 if (nobau)
1358 return 0;
1359
76ba0ecd 1360 for_each_possible_cpu(cur_cpu)
eaa95840 1361 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
76ba0ecd
RR
1362 GFP_KERNEL, cpu_to_node(cur_cpu));
1363
b8f7fb13
CW
1364 uv_bau_max_concurrent = MAX_BAU_CONCURRENT;
1365 uv_nshift = uv_hub_info->m_val;
036ed8ba 1366 uv_mmask = (1UL << uv_hub_info->m_val) - 1;
b8f7fb13 1367 nuvhubs = uv_num_possible_blades();
9674f35b 1368
b8f7fb13 1369 uv_init_per_cpu(nuvhubs);
b4c286e6 1370
94ca8e48 1371 uv_partition_base_pnode = 0x7fffffff;
b8f7fb13
CW
1372 for (uvhub = 0; uvhub < nuvhubs; uvhub++)
1373 if (uv_blade_nr_possible_cpus(uvhub) &&
1374 (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
1375 uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
1376
1377 vector = UV_BAU_MESSAGE;
1378 for_each_possible_blade(uvhub)
1379 if (uv_blade_nr_possible_cpus(uvhub))
1380 uv_init_uvhub(uvhub, vector);
1381
1812924b 1382 uv_enable_timeouts();
b8f7fb13
CW
1383 alloc_intr_gate(vector, uv_bau_message_intr1);
1384
1385 for_each_possible_blade(uvhub) {
1386 pnode = uv_blade_to_pnode(uvhub);
1387 /* INIT the bau */
1388 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL,
1389 ((unsigned long)1 << 63));
1390 mmr = 1; /* should be 1 to broadcast to both sockets */
1391 uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, mmr);
1392 }
b4c286e6 1393
1812924b
CW
1394 return 0;
1395}
b8f7fb13
CW
1396core_initcall(uv_bau_init);
1397core_initcall(uv_ptc_init);