[linux-2.6-block.git] / arch / sparc / include / asm / processor_64.h

/*
 * include/asm/processor.h
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#ifndef __ASM_SPARC64_PROCESSOR_H
#define __ASM_SPARC64_PROCESSOR_H

/*
 * Sparc64 implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })

#include <asm/asi.h>
#include <asm/pstate.h>
#include <asm/ptrace.h>
#include <asm/page.h>

/* The sparc has no problems with write protection */
#define wp_works_ok 1
#define wp_works_ok__is_a_macro /* for versions in ksyms.c */

/*
 * User lives in his very own context, and cannot reference us. Note
 * that TASK_SIZE is a misnomer, it really gives maximum user virtual
 * address that the kernel will allocate out.
 *
 * XXX No longer using virtual page tables, kill this upper limit...
 */
#define VA_BITS		44
#ifndef __ASSEMBLY__
#define VPTE_SIZE	(1UL << (VA_BITS - PAGE_SHIFT + 3))
#else
#define VPTE_SIZE	(1 << (VA_BITS - PAGE_SHIFT + 3))
#endif

#define TASK_SIZE_OF(tsk) \
	(test_tsk_thread_flag(tsk,TIF_32BIT) ? \
	 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
#define TASK_SIZE \
	(test_thread_flag(TIF_32BIT) ? \
	 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
#ifdef __KERNEL__

#define STACK_TOP32	((1UL << 32UL) - PAGE_SIZE)
#define STACK_TOP64	(0x0000080000000000UL - (1UL << 32UL))

#define STACK_TOP	(test_thread_flag(TIF_32BIT) ? \
			 STACK_TOP32 : STACK_TOP64)

#define STACK_TOP_MAX	STACK_TOP64

#endif

#ifndef __ASSEMBLY__

typedef struct {
	unsigned char seg;
} mm_segment_t;

/* The Sparc processor specific thread struct. */
/* XXX This should die, everything can go into thread_info now. */
struct thread_struct {
#ifdef CONFIG_DEBUG_SPINLOCK
	/* How many spinlocks held by this thread.
	 * Used with spin lock debugging to catch tasks
	 * sleeping illegally with locks held.
	 */
	int smp_lock_count;
	unsigned int smp_lock_pc;
#else
	int dummy; /* f'in gcc bug... */
#endif
};

#endif /* !(__ASSEMBLY__) */

#ifndef CONFIG_DEBUG_SPINLOCK
#define INIT_THREAD  {			\
	0,				\
}
#else /* CONFIG_DEBUG_SPINLOCK */
#define INIT_THREAD  {					\
/* smp_lock_count, smp_lock_pc, */			\
   0,		   0,					\
}
#endif /* !(CONFIG_DEBUG_SPINLOCK) */

#ifndef __ASSEMBLY__

#include <linux/types.h>
#include <asm/fpumacro.h>

/* Return saved PC of a blocked thread. */
struct task_struct;
unsigned long thread_saved_pc(struct task_struct *);

/* On Uniprocessor, even in RMO processes see TSO semantics */
#ifdef CONFIG_SMP
#define TSTATE_INITIAL_MM	TSTATE_TSO
#else
#define TSTATE_INITIAL_MM	TSTATE_RMO
#endif

/* Do necessary setup to start up a newly executed thread. */
#define start_thread(regs, pc, sp) \
do { \
	unsigned long __asi = ASI_PNF; \
	regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
	regs->tpc = ((pc & (~3)) - 4); \
	regs->tnpc = regs->tpc + 4; \
	regs->y = 0; \
	set_thread_wstate(1 << 3); \
	if (current_thread_info()->utraps) { \
		if (*(current_thread_info()->utraps) < 2) \
			kfree(current_thread_info()->utraps); \
		else \
			(*(current_thread_info()->utraps))--; \
		current_thread_info()->utraps = NULL; \
	} \
	__asm__ __volatile__( \
	"stx		%%g0, [%0 + %2 + 0x00]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x08]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x10]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x18]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x20]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x28]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x30]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x38]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x40]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x48]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x50]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x58]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x60]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x68]\n\t" \
	"stx		%1,   [%0 + %2 + 0x70]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x78]\n\t" \
	"wrpr		%%g0, (1 << 3), %%wstate\n\t" \
	: \
	: "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
	  "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
	fprs_write(0);	\
	current_thread_info()->xfsr[0] = 0;	\
	current_thread_info()->fpsaved[0] = 0;	\
	regs->tstate &= ~TSTATE_PEF;	\
} while (0)

#define start_thread32(regs, pc, sp) \
do { \
	unsigned long __asi = ASI_PNF; \
	pc &= 0x00000000ffffffffUL; \
	sp &= 0x00000000ffffffffUL; \
	regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
	regs->tpc = ((pc & (~3)) - 4); \
	regs->tnpc = regs->tpc + 4; \
	regs->y = 0; \
	set_thread_wstate(2 << 3); \
	if (current_thread_info()->utraps) { \
		if (*(current_thread_info()->utraps) < 2) \
			kfree(current_thread_info()->utraps); \
		else \
			(*(current_thread_info()->utraps))--; \
		current_thread_info()->utraps = NULL; \
	} \
	__asm__ __volatile__( \
	"stx		%%g0, [%0 + %2 + 0x00]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x08]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x10]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x18]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x20]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x28]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x30]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x38]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x40]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x48]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x50]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x58]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x60]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x68]\n\t" \
	"stx		%1,   [%0 + %2 + 0x70]\n\t" \
	"stx		%%g0, [%0 + %2 + 0x78]\n\t" \
	"wrpr		%%g0, (2 << 3), %%wstate\n\t" \
	: \
	: "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
	  "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
	fprs_write(0);	\
	current_thread_info()->xfsr[0] = 0;	\
	current_thread_info()->fpsaved[0] = 0;	\
	regs->tstate &= ~TSTATE_PEF;	\
} while (0)

/* Free all resources held by a thread. */
#define release_thread(tsk)		do { } while (0)

unsigned long get_wchan(struct task_struct *task);

#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
#define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
#define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])

/* Please see the commentary in asm/backoff.h for a description of
 * what these instructions are doing and how they have been chosen.
 * To make a long story short, we are trying to yield the current cpu
 * strand during busy loops.
 */
#define cpu_relax()	asm volatile("\n99:\n\t"			\
				     "rd	%%ccr, %%g0\n\t"	\
				     "rd	%%ccr, %%g0\n\t"	\
				     "rd	%%ccr, %%g0\n\t"	\
				     ".section	.pause_3insn_patch,\"ax\"\n\t"\
				     ".word	99b\n\t"		\
				     "wr	%%g0, 128, %%asr27\n\t"	\
				     "nop\n\t"				\
				     "nop\n\t"				\
				     ".previous"			\
				     ::: "memory")
#define cpu_relax_lowlatency() cpu_relax()

/* Prefetch support.  This is tuned for UltraSPARC-III and later.
 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
 * a shallower prefetch queue than later chips.
 */
#define ARCH_HAS_PREFETCH
#define ARCH_HAS_PREFETCHW
#define ARCH_HAS_SPINLOCK_PREFETCH

static inline void prefetch(const void *x)
{
	/* We do not use the read prefetch mnemonic because that
	 * prefetches into the prefetch-cache which only is accessible
	 * by floating point operations in UltraSPARC-III and later.
	 * By contrast, "#one_write" prefetches into the L2 cache
	 * in shared state.
	 */
	__asm__ __volatile__("prefetch [%0], #one_write"
			     : /* no outputs */
			     : "r" (x));
}

static inline void prefetchw(const void *x)
{
	/* The most optimal prefetch to use for writes is
	 * "#n_writes".  This brings the cacheline into the
	 * L2 cache in "owned" state.
	 */
	__asm__ __volatile__("prefetch [%0], #n_writes"
			     : /* no outputs */
			     : "r" (x));
}

#define spin_lock_prefetch(x)	prefetchw(x)

#define HAVE_ARCH_PICK_MMAP_LAYOUT

int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap);

#endif /* !(__ASSEMBLY__) */

#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
Commit	Line	Data
f5e706ad	1	/*
a439fe51	2	* include/asm/processor.h
f5e706ad SR	3	*
	4	* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
	5	*/
	6
	7	#ifndef __ASM_SPARC64_PROCESSOR_H
	8	#define __ASM_SPARC64_PROCESSOR_H
	9
	10	/*
	11	* Sparc64 implementation of macro that returns current
	12	* instruction pointer ("program counter").
	13	*/
	14	#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
	15
	16	#include <asm/asi.h>
	17	#include <asm/pstate.h>
	18	#include <asm/ptrace.h>
	19	#include <asm/page.h>
	20
	21	/* The sparc has no problems with write protection */
	22	#define wp_works_ok 1
	23	#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
	24
	25	/*
	26	* User lives in his very own context, and cannot reference us. Note
	27	* that TASK_SIZE is a misnomer, it really gives maximum user virtual
	28	* address that the kernel will allocate out.
	29	*
	30	* XXX No longer using virtual page tables, kill this upper limit...
	31	*/
	32	#define VA_BITS 44
	33	#ifndef __ASSEMBLY__
	34	#define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3))
	35	#else
	36	#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3))
	37	#endif
	38
f5e706ad SR	39	#define TASK_SIZE_OF(tsk) \
f5e706ad SR	40	(test_tsk_thread_flag(tsk,TIF_32BIT) ? \
a1995a65	41	(1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
c5389831 DM	42	#define TASK_SIZE \
	43	(test_thread_flag(TIF_32BIT) ? \
	44	(1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
f5e706ad SR	45	#ifdef __KERNEL__
	46
	47	#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
	48	#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL))
	49
	50	#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
	51	STACK_TOP32 : STACK_TOP64)
	52
	53	#define STACK_TOP_MAX STACK_TOP64
	54
	55	#endif
	56
	57	#ifndef __ASSEMBLY__
	58
	59	typedef struct {
	60	unsigned char seg;
	61	} mm_segment_t;
	62
	63	/* The Sparc processor specific thread struct. */
	64	/* XXX This should die, everything can go into thread_info now. */
	65	struct thread_struct {
	66	#ifdef CONFIG_DEBUG_SPINLOCK
	67	/* How many spinlocks held by this thread.
	68	* Used with spin lock debugging to catch tasks
	69	* sleeping illegally with locks held.
	70	*/
	71	int smp_lock_count;
	72	unsigned int smp_lock_pc;
	73	#else
	74	int dummy; /* f'in gcc bug... */
	75	#endif
	76	};
	77
	78	#endif /* !(__ASSEMBLY__) */
	79
	80	#ifndef CONFIG_DEBUG_SPINLOCK
	81	#define INIT_THREAD { \
	82	0, \
	83	}
	84	#else /* CONFIG_DEBUG_SPINLOCK */
	85	#define INIT_THREAD { \
	86	/* smp_lock_count, smp_lock_pc, */ \
	87	0, 0, \
	88	}
	89	#endif /* !(CONFIG_DEBUG_SPINLOCK) */
	90
	91	#ifndef __ASSEMBLY__
	92
	93	#include <linux/types.h>
5230429a	94	#include <asm/fpumacro.h>
f5e706ad SR	95
	96	/* Return saved PC of a blocked thread. */
	97	struct task_struct;
f05a6865	98	unsigned long thread_saved_pc(struct task_struct *);
f5e706ad SR	99
	100	/* On Uniprocessor, even in RMO processes see TSO semantics */
	101	#ifdef CONFIG_SMP
	102	#define TSTATE_INITIAL_MM TSTATE_TSO
	103	#else
	104	#define TSTATE_INITIAL_MM TSTATE_RMO
	105	#endif
	106
	107	/* Do necessary setup to start up a newly executed thread. */
	108	#define start_thread(regs, pc, sp) \
	109	do { \
	110	unsigned long __asi = ASI_PNF; \
	111	regs->tstate = (regs->tstate & (TSTATE_CWP)) \| (TSTATE_INITIAL_MM\|TSTATE_IE) \| (__asi << 24UL); \
	112	regs->tpc = ((pc & (~3)) - 4); \
	113	regs->tnpc = regs->tpc + 4; \
	114	regs->y = 0; \
	115	set_thread_wstate(1 << 3); \
	116	if (current_thread_info()->utraps) { \
	117	if (*(current_thread_info()->utraps) < 2) \
	118	kfree(current_thread_info()->utraps); \
	119	else \
	120	(*(current_thread_info()->utraps))--; \
	121	current_thread_info()->utraps = NULL; \
	122	} \
	123	__asm__ __volatile__( \
	124	"stx %%g0, [%0 + %2 + 0x00]\n\t" \
	125	"stx %%g0, [%0 + %2 + 0x08]\n\t" \
	126	"stx %%g0, [%0 + %2 + 0x10]\n\t" \
	127	"stx %%g0, [%0 + %2 + 0x18]\n\t" \
	128	"stx %%g0, [%0 + %2 + 0x20]\n\t" \
	129	"stx %%g0, [%0 + %2 + 0x28]\n\t" \
	130	"stx %%g0, [%0 + %2 + 0x30]\n\t" \
	131	"stx %%g0, [%0 + %2 + 0x38]\n\t" \
	132	"stx %%g0, [%0 + %2 + 0x40]\n\t" \
	133	"stx %%g0, [%0 + %2 + 0x48]\n\t" \
	134	"stx %%g0, [%0 + %2 + 0x50]\n\t" \
	135	"stx %%g0, [%0 + %2 + 0x58]\n\t" \
	136	"stx %%g0, [%0 + %2 + 0x60]\n\t" \
	137	"stx %%g0, [%0 + %2 + 0x68]\n\t" \
	138	"stx %1, [%0 + %2 + 0x70]\n\t" \
	139	"stx %%g0, [%0 + %2 + 0x78]\n\t" \
	140	"wrpr %%g0, (1 << 3), %%wstate\n\t" \
	141	: \
	142	: "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
	143	"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
5230429a AV	144	fprs_write(0); \
	145	current_thread_info()->xfsr[0] = 0; \
	146	current_thread_info()->fpsaved[0] = 0; \
	147	regs->tstate &= ~TSTATE_PEF; \
f5e706ad SR	148	} while (0)
	149
	150	#define start_thread32(regs, pc, sp) \
	151	do { \
	152	unsigned long __asi = ASI_PNF; \
	153	pc &= 0x00000000ffffffffUL; \
	154	sp &= 0x00000000ffffffffUL; \
	155	regs->tstate = (regs->tstate & (TSTATE_CWP))\|(TSTATE_INITIAL_MM\|TSTATE_IE\|TSTATE_AM) \| (__asi << 24UL); \
	156	regs->tpc = ((pc & (~3)) - 4); \
	157	regs->tnpc = regs->tpc + 4; \
	158	regs->y = 0; \
	159	set_thread_wstate(2 << 3); \
	160	if (current_thread_info()->utraps) { \
	161	if (*(current_thread_info()->utraps) < 2) \
	162	kfree(current_thread_info()->utraps); \
	163	else \
	164	(*(current_thread_info()->utraps))--; \
	165	current_thread_info()->utraps = NULL; \
	166	} \
	167	__asm__ __volatile__( \
	168	"stx %%g0, [%0 + %2 + 0x00]\n\t" \
	169	"stx %%g0, [%0 + %2 + 0x08]\n\t" \
	170	"stx %%g0, [%0 + %2 + 0x10]\n\t" \
	171	"stx %%g0, [%0 + %2 + 0x18]\n\t" \
	172	"stx %%g0, [%0 + %2 + 0x20]\n\t" \
	173	"stx %%g0, [%0 + %2 + 0x28]\n\t" \
	174	"stx %%g0, [%0 + %2 + 0x30]\n\t" \
	175	"stx %%g0, [%0 + %2 + 0x38]\n\t" \
	176	"stx %%g0, [%0 + %2 + 0x40]\n\t" \
	177	"stx %%g0, [%0 + %2 + 0x48]\n\t" \
	178	"stx %%g0, [%0 + %2 + 0x50]\n\t" \
	179	"stx %%g0, [%0 + %2 + 0x58]\n\t" \
	180	"stx %%g0, [%0 + %2 + 0x60]\n\t" \
	181	"stx %%g0, [%0 + %2 + 0x68]\n\t" \
	182	"stx %1, [%0 + %2 + 0x70]\n\t" \
	183	"stx %%g0, [%0 + %2 + 0x78]\n\t" \
	184	"wrpr %%g0, (2 << 3), %%wstate\n\t" \
	185	: \
	186	: "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
	187	"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
5230429a AV	188	fprs_write(0); \
	189	current_thread_info()->xfsr[0] = 0; \
	190	current_thread_info()->fpsaved[0] = 0; \
	191	regs->tstate &= ~TSTATE_PEF; \
f5e706ad SR	192	} while (0)
	193
	194	/* Free all resources held by a thread. */
	195	#define release_thread(tsk) do { } while (0)
	196
f05a6865	197	unsigned long get_wchan(struct task_struct *task);
f5e706ad SR	198
	199	#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
	200	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
	201	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
	202
187818cd	203	/* Please see the commentary in asm/backoff.h for a description of
08f80073	204	* what these instructions are doing and how they have been chosen.
187818cd DM	205	* To make a long story short, we are trying to yield the current cpu
	206	* strand during busy loops.
	207	*/
e9b9eb59 DM	208	#define cpu_relax() asm volatile("\n99:\n\t" \
	209	"rd %%ccr, %%g0\n\t" \
	210	"rd %%ccr, %%g0\n\t" \
	211	"rd %%ccr, %%g0\n\t" \
187818cd	212	".section .pause_3insn_patch,\"ax\"\n\t"\
e9b9eb59 DM	213	".word 99b\n\t" \
	214	"wr %%g0, 128, %%asr27\n\t" \
	215	"nop\n\t" \
	216	"nop\n\t" \
	217	".previous" \
270c10e0	218	::: "memory")
3a6bfbc9	219	#define cpu_relax_lowlatency() cpu_relax()
f5e706ad SR	220
	221	/* Prefetch support. This is tuned for UltraSPARC-III and later.
	222	* UltraSPARC-I will treat these as nops, and UltraSPARC-II has
	223	* a shallower prefetch queue than later chips.
	224	*/
	225	#define ARCH_HAS_PREFETCH
	226	#define ARCH_HAS_PREFETCHW
	227	#define ARCH_HAS_SPINLOCK_PREFETCH
	228
	229	static inline void prefetch(const void *x)
	230	{
	231	/* We do not use the read prefetch mnemonic because that
	232	* prefetches into the prefetch-cache which only is accessible
	233	* by floating point operations in UltraSPARC-III and later.
	234	* By contrast, "#one_write" prefetches into the L2 cache
	235	* in shared state.
	236	*/
	237	__asm__ __volatile__("prefetch [%0], #one_write"
	238	: /* no outputs */
	239	: "r" (x));
	240	}
	241
	242	static inline void prefetchw(const void *x)
	243	{
	244	/* The most optimal prefetch to use for writes is
	245	* "#n_writes". This brings the cacheline into the
	246	* L2 cache in "owned" state.
	247	*/
	248	__asm__ __volatile__("prefetch [%0], #n_writes"
	249	: /* no outputs */
	250	: "r" (x));
	251	}
	252
	253	#define spin_lock_prefetch(x) prefetchw(x)
	254
	255	#define HAVE_ARCH_PICK_MMAP_LAYOUT
	256
8e9f0935 SR	257	int do_mathemu(struct pt_regs regs, struct fpustate f, bool illegal_insn_trap);
8e9f0935 SR	258
f5e706ad SR	259	#endif /* !(__ASSEMBLY__) */
	260
	261	#endif /* !(__ASM_SPARC64_PROCESSOR_H) */