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kvm: x86, powerpc: do not allow clearing largepages debugfs entry
[linux-2.6-block.git] / arch / powerpc / kvm / book3s.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
2f4cf5e4
AG		 2/*
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Alexander Graf <agraf@suse.de>
7 * Kevin Wolf <mail@kevin-wolf.de>
8 *
9 * Description:
10 * This file is derived from arch/powerpc/kvm/44x.c,
11 * by Hollis Blanchard <hollisb@us.ibm.com>.
2f4cf5e4
AG		 12 */
13
14#include <linux/kvm_host.h>
15#include <linux/err.h>
66b15db6 16#include <linux/export.h>
329d20ba 17#include <linux/slab.h>
398a76c6
AG		 18#include <linux/module.h>
19#include <linux/miscdevice.h>
d3989143
BH		 20#include <linux/gfp.h>
21#include <linux/sched.h>
22#include <linux/vmalloc.h>
23#include <linux/highmem.h>
2f4cf5e4
AG		 24
25#include <asm/reg.h>
26#include <asm/cputable.h>
27#include <asm/cacheflush.h>
7c0f6ba6 28#include <linux/uaccess.h>
2f4cf5e4
AG		 29#include <asm/io.h>
30#include <asm/kvm_ppc.h>
31#include <asm/kvm_book3s.h>
32#include <asm/mmu_context.h>
149dbdb1 33#include <asm/page.h>
5af50993 34#include <asm/xive.h>
2f4cf5e4 35
cbbc58d4 36#include "book3s.h"
c4befc58
PM		 37#include "trace.h"
38
833b45de
PB		 39#define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
40#define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
2f4cf5e4
AG		 41
42/* #define EXIT_DEBUG */
07b0907d 43
2f4cf5e4
AG		 44struct kvm_stats_debugfs_item debugfs_entries[] = {
45 { "exits", VCPU_STAT(sum_exits) },
46 { "mmio", VCPU_STAT(mmio_exits) },
47 { "sig", VCPU_STAT(signal_exits) },
48 { "sysc", VCPU_STAT(syscall_exits) },
49 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
50 { "dec", VCPU_STAT(dec_exits) },
51 { "ext_intr", VCPU_STAT(ext_intr_exits) },
52 { "queue_intr", VCPU_STAT(queue_intr) },
2a27f514
SJS		 53 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) },
54 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) },
55 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) },
f7819512 56 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
62bea5bf 57 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
2a27f514 58 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) },
3491caf2 59 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
2f4cf5e4
AG		 60 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
61 { "pf_storage", VCPU_STAT(pf_storage) },
62 { "sp_storage", VCPU_STAT(sp_storage) },
63 { "pf_instruc", VCPU_STAT(pf_instruc) },
64 { "sp_instruc", VCPU_STAT(sp_instruc) },
65 { "ld", VCPU_STAT(ld) },
66 { "ld_slow", VCPU_STAT(ld_slow) },
67 { "st", VCPU_STAT(st) },
68 { "st_slow", VCPU_STAT(st_slow) },
65e7026a
SW		 69 { "pthru_all", VCPU_STAT(pthru_all) },
70 { "pthru_host", VCPU_STAT(pthru_host) },
71 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) },
833b45de
PB		 72 { "largepages_2M", VM_STAT(num_2M_pages, .mode = 0444) },
73 { "largepages_1G", VM_STAT(num_1G_pages, .mode = 0444) },
2f4cf5e4
AG		 74 { NULL }
75};
76
c01e3f66
AG		 77void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
78{
79 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
80 ulong pc = kvmppc_get_pc(vcpu);
1006284c 81 ulong lr = kvmppc_get_lr(vcpu);
c01e3f66
AG		 82 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
83 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
1006284c
CK		 84 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
85 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
c01e3f66
AG		 86 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
87 }
88}
89EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
90
699cc876
AK		 91static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
92{
a78b55d1 93 if (!is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 94 return to_book3s(vcpu)->hior;
95 return 0;
96}
97
98static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
99 unsigned long pending_now, unsigned long old_pending)
100{
a78b55d1 101 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 102 return;
103 if (pending_now)
5deb8e7a 104 kvmppc_set_int_pending(vcpu, 1);
699cc876 105 else if (old_pending)
5deb8e7a 106 kvmppc_set_int_pending(vcpu, 0);
699cc876
AK		 107}
108
109static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
110{
111 ulong crit_raw;
112 ulong crit_r1;
113 bool crit;
114
a78b55d1 115 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 116 return false;
117
5deb8e7a 118 crit_raw = kvmppc_get_critical(vcpu);
699cc876
AK		 119 crit_r1 = kvmppc_get_gpr(vcpu, 1);
120
121 /* Truncate crit indicators in 32 bit mode */
5deb8e7a 122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
699cc876
AK		 123 crit_raw &= 0xffffffff;
124 crit_r1 &= 0xffffffff;
125 }
126
127 /* Critical section when crit == r1 */
128 crit = (crit_raw == crit_r1);
129 /* ... and we're in supervisor mode */
5deb8e7a 130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
699cc876
AK		 131
132 return crit;
133}
134
2f4cf5e4
AG		 135void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
136{
c01e3f66 137 kvmppc_unfixup_split_real(vcpu);
5deb8e7a 138 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
916ccadc 139 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
f05ed4d5 140 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
2f4cf5e4
AG		 141 vcpu->arch.mmu.reset_msr(vcpu);
142}
143
583617b7 144static int kvmppc_book3s_vec2irqprio(unsigned int vec)
2f4cf5e4
AG		 145{
146 unsigned int prio;
147
2f4cf5e4
AG		 148 switch (vec) {
149 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
150 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
151 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
152 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
153 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
154 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
155 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
156 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
157 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
158 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
159 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
160 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
161 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
162 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
163 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
616dff86 164 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
2f4cf5e4
AG		 165 default: prio = BOOK3S_IRQPRIO_MAX; break;
166 }
167
583617b7
AG		 168 return prio;
169}
170
bc5ad3f3 171void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
7706664d
AG		 172 unsigned int vec)
173{
f05ed4d5
PM		 174 unsigned long old_pending = vcpu->arch.pending_exceptions;
175
7706664d
AG		 176 clear_bit(kvmppc_book3s_vec2irqprio(vec),
177 &vcpu->arch.pending_exceptions);
9ee18b1e 178
f05ed4d5
PM		 179 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
180 old_pending);
7706664d
AG		 181}
182
583617b7
AG		 183void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
184{
185 vcpu->stat.queue_intr++;
186
187 set_bit(kvmppc_book3s_vec2irqprio(vec),
188 &vcpu->arch.pending_exceptions);
2f4cf5e4
AG		 189#ifdef EXIT_DEBUG
190 printk(KERN_INFO "Queueing interrupt %x\n", vec);
191#endif
192}
2ba9f0d8 193EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
2f4cf5e4 194
884dfb72
PM		 195void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
196{
197 /* might as well deliver this straight away */
198 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
199}
200EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
201
25a8a02d 202void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
2f4cf5e4 203{
3cf658b6
PM		 204 /* might as well deliver this straight away */
205 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
2f4cf5e4 206}
2ba9f0d8 207EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
2f4cf5e4 208
307d9279
PM		 209void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
210{
211 /* might as well deliver this straight away */
212 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
213}
214
215void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
216{
217 /* might as well deliver this straight away */
218 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
219}
220
221void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
222{
223 /* might as well deliver this straight away */
224 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
225}
226
2f4cf5e4
AG		 227void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
228{
229 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
230}
2ba9f0d8 231EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
2f4cf5e4
AG		 232
233int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
234{
44075d95 235 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
2f4cf5e4 236}
2ba9f0d8 237EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
2f4cf5e4 238
7706664d
AG		 239void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
240{
241 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
242}
2ba9f0d8 243EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
7706664d 244
2f4cf5e4
AG		 245void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
246 struct kvm_interrupt *irq)
247{
d24ea8a7
PM		 248 /*
249 * This case (KVM_INTERRUPT_SET) should never actually arise for
250 * a pseries guest (because pseries guests expect their interrupt
251 * controllers to continue asserting an external interrupt request
252 * until it is acknowledged at the interrupt controller), but is
253 * included to avoid ABI breakage and potentially for other
254 * sorts of guest.
255 *
256 * There is a subtlety here: HV KVM does not test the
257 * external_oneshot flag in the code that synthesizes
258 * external interrupts for the guest just before entering
259 * the guest. That is OK even if userspace did do a
260 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
261 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
262 * which ends up doing a smp_send_reschedule(), which will
263 * pull the guest all the way out to the host, meaning that
264 * we will call kvmppc_core_prepare_to_enter() before entering
265 * the guest again, and that will handle the external_oneshot
266 * flag correctly.
267 */
268 if (irq->irq == KVM_INTERRUPT_SET)
269 vcpu->arch.external_oneshot = 1;
270
271 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
2f4cf5e4
AG		 272}
273
4fe27d2a 274void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
18978768
AG		 275{
276 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
277}
278
8de12015
AG		 279void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
280 ulong flags)
281{
282 kvmppc_set_dar(vcpu, dar);
283 kvmppc_set_dsisr(vcpu, flags);
916ccadc 284 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
8de12015 285}
916ccadc 286EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
8de12015
AG		 287
288void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
289{
916ccadc 290 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
8de12015 291}
916ccadc 292EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
8de12015 293
5358a963
TH		 294static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
295 unsigned int priority)
2f4cf5e4
AG		 296{
297 int deliver = 1;
298 int vec = 0;
f05ed4d5 299 bool crit = kvmppc_critical_section(vcpu);
2f4cf5e4
AG		 300
301 switch (priority) {
302 case BOOK3S_IRQPRIO_DECREMENTER:
5deb8e7a 303 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 304 vec = BOOK3S_INTERRUPT_DECREMENTER;
305 break;
306 case BOOK3S_IRQPRIO_EXTERNAL:
5deb8e7a 307 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 308 vec = BOOK3S_INTERRUPT_EXTERNAL;
309 break;
310 case BOOK3S_IRQPRIO_SYSTEM_RESET:
311 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
312 break;
313 case BOOK3S_IRQPRIO_MACHINE_CHECK:
314 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
315 break;
316 case BOOK3S_IRQPRIO_DATA_STORAGE:
317 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
318 break;
319 case BOOK3S_IRQPRIO_INST_STORAGE:
320 vec = BOOK3S_INTERRUPT_INST_STORAGE;
321 break;
322 case BOOK3S_IRQPRIO_DATA_SEGMENT:
323 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
324 break;
325 case BOOK3S_IRQPRIO_INST_SEGMENT:
326 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
327 break;
328 case BOOK3S_IRQPRIO_ALIGNMENT:
329 vec = BOOK3S_INTERRUPT_ALIGNMENT;
330 break;
331 case BOOK3S_IRQPRIO_PROGRAM:
332 vec = BOOK3S_INTERRUPT_PROGRAM;
333 break;
334 case BOOK3S_IRQPRIO_VSX:
335 vec = BOOK3S_INTERRUPT_VSX;
336 break;
337 case BOOK3S_IRQPRIO_ALTIVEC:
338 vec = BOOK3S_INTERRUPT_ALTIVEC;
339 break;
340 case BOOK3S_IRQPRIO_FP_UNAVAIL:
341 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
342 break;
343 case BOOK3S_IRQPRIO_SYSCALL:
344 vec = BOOK3S_INTERRUPT_SYSCALL;
345 break;
346 case BOOK3S_IRQPRIO_DEBUG:
347 vec = BOOK3S_INTERRUPT_TRACE;
348 break;
349 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
350 vec = BOOK3S_INTERRUPT_PERFMON;
351 break;
616dff86
AG		 352 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
353 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
354 break;
2f4cf5e4
AG		 355 default:
356 deliver = 0;
357 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
358 break;
359 }
360
361#if 0
362 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
363#endif
364
365 if (deliver)
3cf658b6 366 kvmppc_inject_interrupt(vcpu, vec, 0);
2f4cf5e4
AG		 367
368 return deliver;
369}
370
17bd1580
AG		 371/*
372 * This function determines if an irqprio should be cleared once issued.
373 */
374static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
375{
376 switch (priority) {
377 case BOOK3S_IRQPRIO_DECREMENTER:
378 /* DEC interrupts get cleared by mtdec */
379 return false;
d24ea8a7
PM		 380 case BOOK3S_IRQPRIO_EXTERNAL:
381 /*
382 * External interrupts get cleared by userspace
383 * except when set by the KVM_INTERRUPT ioctl with
384 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
385 */
386 if (vcpu->arch.external_oneshot) {
387 vcpu->arch.external_oneshot = 0;
388 return true;
389 }
17bd1580
AG		 390 return false;
391 }
392
393 return true;
394}
395
a8e4ef84 396int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
2f4cf5e4
AG		 397{
398 unsigned long *pending = &vcpu->arch.pending_exceptions;
90bba358 399 unsigned long old_pending = vcpu->arch.pending_exceptions;
2f4cf5e4
AG		 400 unsigned int priority;
401
2f4cf5e4
AG		 402#ifdef EXIT_DEBUG
403 if (vcpu->arch.pending_exceptions)
404 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
405#endif
406 priority = __ffs(*pending);
ada7ba17 407 while (priority < BOOK3S_IRQPRIO_MAX) {
7706664d 408 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
17bd1580 409 clear_irqprio(vcpu, priority)) {
2f4cf5e4
AG		 410 clear_bit(priority, &vcpu->arch.pending_exceptions);
411 break;
412 }
413
414 priority = find_next_bit(pending,
415 BITS_PER_BYTE * sizeof(*pending),
416 priority + 1);
417 }
90bba358
AG		 418
419 /* Tell the guest about our interrupt status */
f05ed4d5 420 kvmppc_update_int_pending(vcpu, *pending, old_pending);
a8e4ef84
AG		 421
422 return 0;
2f4cf5e4 423}
2ba9f0d8 424EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
2f4cf5e4 425
ba049e93 426kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
93b159b4 427 bool *writable)
e8508940 428{
89b68c96
AG		 429 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
430 gfn_t gfn = gpa >> PAGE_SHIFT;
e8508940 431
5deb8e7a 432 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
bbcc9c06
BH		 433 mp_pa = (uint32_t)mp_pa;
434
e8508940 435 /* Magic page override */
89b68c96
AG		 436 gpa &= ~0xFFFULL;
437 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
e8508940 438 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
ba049e93 439 kvm_pfn_t pfn;
e8508940 440
ba049e93 441 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
e8508940 442 get_page(pfn_to_page(pfn));
93b159b4
PM		 443 if (writable)
444 *writable = true;
e8508940
AG		 445 return pfn;
446 }
447
93b159b4 448 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
e8508940 449}
89b68c96 450EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
e8508940 451
7d15c06f
AG		 452int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
453 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
2f4cf5e4 454{
7d15c06f
AG		 455 bool data = (xlid == XLATE_DATA);
456 bool iswrite = (xlrw == XLATE_WRITE);
5deb8e7a 457 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
2f4cf5e4
AG		 458 int r;
459
460 if (relocated) {
93b159b4 461 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
2f4cf5e4
AG		 462 } else {
463 pte->eaddr = eaddr;
28e83b4f 464 pte->raddr = eaddr & KVM_PAM;
3eeafd7d 465 pte->vpage = VSID_REAL | eaddr >> 12;
2f4cf5e4
AG		 466 pte->may_read = true;
467 pte->may_write = true;
468 pte->may_execute = true;
469 r = 0;
c01e3f66
AG		 470
471 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
472 !data) {
473 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
474 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
475 pte->raddr &= ~SPLIT_HACK_MASK;
476 }
2f4cf5e4
AG		 477 }
478
479 return r;
480}
481
70923603
SG		 482int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
483 enum instruction_fetch_type type, u32 *inst)
51f04726
MC		 484{
485 ulong pc = kvmppc_get_pc(vcpu);
486 int r;
487
488 if (type == INST_SC)
489 pc -= 4;
490
491 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
492 if (r == EMULATE_DONE)
493 return r;
494 else
495 return EMULATE_AGAIN;
496}
497EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
498
2f4cf5e4
AG		 499int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
500{
501 return 0;
502}
503
f61c94bb
BB		 504int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
505{
506 return 0;
507}
508
509void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
510{
511}
512
3a167bea
AK		 513int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
514 struct kvm_sregs *sregs)
515{
bcdec41c
CD		 516 int ret;
517
518 vcpu_load(vcpu);
519 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
520 vcpu_put(vcpu);
521
522 return ret;
3a167bea
AK		 523}
524
525int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
526 struct kvm_sregs *sregs)
527{
b4ef9d4e
CD		 528 int ret;
529
530 vcpu_load(vcpu);
531 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
532 vcpu_put(vcpu);
533
534 return ret;
3a167bea
AK		 535}
536
2f4cf5e4
AG		 537int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
538{
539 int i;
540
c7f38f46 541 regs->pc = kvmppc_get_pc(vcpu);
992b5b29 542 regs->cr = kvmppc_get_cr(vcpu);
c7f38f46
AG		 543 regs->ctr = kvmppc_get_ctr(vcpu);
544 regs->lr = kvmppc_get_lr(vcpu);
992b5b29 545 regs->xer = kvmppc_get_xer(vcpu);
5deb8e7a
AG		 546 regs->msr = kvmppc_get_msr(vcpu);
547 regs->srr0 = kvmppc_get_srr0(vcpu);
548 regs->srr1 = kvmppc_get_srr1(vcpu);
2f4cf5e4 549 regs->pid = vcpu->arch.pid;
5deb8e7a
AG		 550 regs->sprg0 = kvmppc_get_sprg0(vcpu);
551 regs->sprg1 = kvmppc_get_sprg1(vcpu);
552 regs->sprg2 = kvmppc_get_sprg2(vcpu);
553 regs->sprg3 = kvmppc_get_sprg3(vcpu);
554 regs->sprg4 = kvmppc_get_sprg4(vcpu);
555 regs->sprg5 = kvmppc_get_sprg5(vcpu);
556 regs->sprg6 = kvmppc_get_sprg6(vcpu);
557 regs->sprg7 = kvmppc_get_sprg7(vcpu);
2f4cf5e4
AG		 558
559 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 560 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
2f4cf5e4
AG		 561
562 return 0;
563}
564
565int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
566{
567 int i;
568
c7f38f46 569 kvmppc_set_pc(vcpu, regs->pc);
992b5b29 570 kvmppc_set_cr(vcpu, regs->cr);
c7f38f46
AG		 571 kvmppc_set_ctr(vcpu, regs->ctr);
572 kvmppc_set_lr(vcpu, regs->lr);
992b5b29 573 kvmppc_set_xer(vcpu, regs->xer);
2f4cf5e4 574 kvmppc_set_msr(vcpu, regs->msr);
5deb8e7a
AG		 575 kvmppc_set_srr0(vcpu, regs->srr0);
576 kvmppc_set_srr1(vcpu, regs->srr1);
577 kvmppc_set_sprg0(vcpu, regs->sprg0);
578 kvmppc_set_sprg1(vcpu, regs->sprg1);
579 kvmppc_set_sprg2(vcpu, regs->sprg2);
580 kvmppc_set_sprg3(vcpu, regs->sprg3);
581 kvmppc_set_sprg4(vcpu, regs->sprg4);
582 kvmppc_set_sprg5(vcpu, regs->sprg5);
583 kvmppc_set_sprg6(vcpu, regs->sprg6);
584 kvmppc_set_sprg7(vcpu, regs->sprg7);
2f4cf5e4 585
8e5b26b5
AG		 586 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
587 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
2f4cf5e4
AG		 588
589 return 0;
590}
591
2f4cf5e4
AG		 592int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
593{
594 return -ENOTSUPP;
595}
596
597int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
598{
599 return -ENOTSUPP;
600}
601
8a41ea53
MC		 602int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
603 union kvmppc_one_reg *val)
a136a8bd 604{
8a41ea53 605 int r = 0;
a8bd19ef 606 long int i;
a136a8bd 607
8a41ea53 608 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
a136a8bd
PM		 609 if (r == -EINVAL) {
610 r = 0;
8a41ea53 611 switch (id) {
a136a8bd 612 case KVM_REG_PPC_DAR:
8a41ea53 613 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
a136a8bd
PM		 614 break;
615 case KVM_REG_PPC_DSISR:
8a41ea53 616 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
a136a8bd 617 break;
a8bd19ef 618 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 619 i = id - KVM_REG_PPC_FPR0;
620 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
a8bd19ef
PM		 621 break;
622 case KVM_REG_PPC_FPSCR:
8a41ea53 623 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
a8bd19ef 624 break;
efff1912
PM		 625#ifdef CONFIG_VSX
626 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
627 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 628 i = id - KVM_REG_PPC_VSR0;
629 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
630 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
efff1912
PM		 631 } else {
632 r = -ENXIO;
633 }
634 break;
635#endif /* CONFIG_VSX */
8a41ea53
MC		 636 case KVM_REG_PPC_DEBUG_INST:
637 *val = get_reg_val(id, INS_TW);
8c32a2ea 638 break;
8b78645c
PM		 639#ifdef CONFIG_KVM_XICS
640 case KVM_REG_PPC_ICP_STATE:
5af50993 641 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
8b78645c
PM		 642 r = -ENXIO;
643 break;
644 }
03f95332 645 if (xics_on_xive())
5af50993
BH		 646 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
647 else
648 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
8b78645c
PM		 649 break;
650#endif /* CONFIG_KVM_XICS */
e4945b9d
CLG		 651#ifdef CONFIG_KVM_XIVE
652 case KVM_REG_PPC_VP_STATE:
653 if (!vcpu->arch.xive_vcpu) {
654 r = -ENXIO;
655 break;
656 }
657 if (xive_enabled())
658 r = kvmppc_xive_native_get_vp(vcpu, val);
659 else
660 r = -ENXIO;
661 break;
662#endif /* CONFIG_KVM_XIVE */
616dff86 663 case KVM_REG_PPC_FSCR:
8a41ea53 664 *val = get_reg_val(id, vcpu->arch.fscr);
616dff86 665 break;
e14e7a1e 666 case KVM_REG_PPC_TAR:
8a41ea53 667 *val = get_reg_val(id, vcpu->arch.tar);
e14e7a1e 668 break;
2e23f544 669 case KVM_REG_PPC_EBBHR:
8a41ea53 670 *val = get_reg_val(id, vcpu->arch.ebbhr);
2e23f544
AG		 671 break;
672 case KVM_REG_PPC_EBBRR:
8a41ea53 673 *val = get_reg_val(id, vcpu->arch.ebbrr);
2e23f544
AG		 674 break;
675 case KVM_REG_PPC_BESCR:
8a41ea53 676 *val = get_reg_val(id, vcpu->arch.bescr);
2e23f544 677 break;
06da28e7 678 case KVM_REG_PPC_IC:
8a41ea53 679 *val = get_reg_val(id, vcpu->arch.ic);
06da28e7 680 break;
a136a8bd
PM		 681 default:
682 r = -EINVAL;
683 break;
684 }
685 }
a136a8bd
PM		 686
687 return r;
688}
689
8a41ea53
MC		 690int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
691 union kvmppc_one_reg *val)
a136a8bd 692{
8a41ea53 693 int r = 0;
a8bd19ef 694 long int i;
a136a8bd 695
8a41ea53 696 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
a136a8bd
PM		 697 if (r == -EINVAL) {
698 r = 0;
8a41ea53 699 switch (id) {
a136a8bd 700 case KVM_REG_PPC_DAR:
8a41ea53 701 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
a136a8bd
PM		 702 break;
703 case KVM_REG_PPC_DSISR:
8a41ea53 704 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
a136a8bd 705 break;
a8bd19ef 706 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 707 i = id - KVM_REG_PPC_FPR0;
708 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
a8bd19ef
PM		 709 break;
710 case KVM_REG_PPC_FPSCR:
8a41ea53 711 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
a8bd19ef 712 break;
efff1912
PM		 713#ifdef CONFIG_VSX
714 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
715 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 716 i = id - KVM_REG_PPC_VSR0;
717 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
718 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
efff1912
PM		 719 } else {
720 r = -ENXIO;
721 }
722 break;
723#endif /* CONFIG_VSX */
8b78645c
PM		 724#ifdef CONFIG_KVM_XICS
725 case KVM_REG_PPC_ICP_STATE:
5af50993 726 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
8b78645c
PM		 727 r = -ENXIO;
728 break;
729 }
03f95332 730 if (xics_on_xive())
5af50993
BH		 731 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
732 else
733 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
8b78645c
PM		 734 break;
735#endif /* CONFIG_KVM_XICS */
e4945b9d
CLG		 736#ifdef CONFIG_KVM_XIVE
737 case KVM_REG_PPC_VP_STATE:
738 if (!vcpu->arch.xive_vcpu) {
739 r = -ENXIO;
740 break;
741 }
742 if (xive_enabled())
743 r = kvmppc_xive_native_set_vp(vcpu, val);
744 else
745 r = -ENXIO;
746 break;
747#endif /* CONFIG_KVM_XIVE */
616dff86 748 case KVM_REG_PPC_FSCR:
8a41ea53 749 vcpu->arch.fscr = set_reg_val(id, *val);
616dff86 750 break;
e14e7a1e 751 case KVM_REG_PPC_TAR:
8a41ea53 752 vcpu->arch.tar = set_reg_val(id, *val);
e14e7a1e 753 break;
2e23f544 754 case KVM_REG_PPC_EBBHR:
8a41ea53 755 vcpu->arch.ebbhr = set_reg_val(id, *val);
2e23f544
AG		 756 break;
757 case KVM_REG_PPC_EBBRR:
8a41ea53 758 vcpu->arch.ebbrr = set_reg_val(id, *val);
2e23f544
AG		 759 break;
760 case KVM_REG_PPC_BESCR:
8a41ea53 761 vcpu->arch.bescr = set_reg_val(id, *val);
2e23f544 762 break;
06da28e7 763 case KVM_REG_PPC_IC:
8a41ea53 764 vcpu->arch.ic = set_reg_val(id, *val);
06da28e7 765 break;
a136a8bd
PM		 766 default:
767 r = -EINVAL;
768 break;
769 }
770 }
771
772 return r;
773}
774
3a167bea
AK		 775void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
776{
cbbc58d4 777 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
3a167bea
AK		 778}
779
780void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
781{
cbbc58d4 782 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
3a167bea
AK		 783}
784
785void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
786{
cbbc58d4 787 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
3a167bea 788}
2ba9f0d8 789EXPORT_SYMBOL_GPL(kvmppc_set_msr);
3a167bea
AK		 790
791int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
792{
cbbc58d4 793 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
3a167bea
AK		 794}
795
2f4cf5e4
AG		 796int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
797 struct kvm_translation *tr)
798{
799 return 0;
800}
801
092d62ee
BB		 802int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
803 struct kvm_guest_debug *dbg)
804{
66b56562 805 vcpu_load(vcpu);
a59c1d9e 806 vcpu->guest_debug = dbg->control;
66b56562 807 vcpu_put(vcpu);
a59c1d9e 808 return 0;
092d62ee
BB		 809}
810
d02d4d15 811void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
dfd4d47e 812{
dfd4d47e
SW		 813 kvmppc_core_queue_dec(vcpu);
814 kvm_vcpu_kick(vcpu);
815}
3a167bea
AK		 816
817struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
818{
cbbc58d4 819 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
3a167bea
AK		 820}
821
822void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
823{
cbbc58d4 824 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
3a167bea
AK		 825}
826
827int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
828{
cbbc58d4 829 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
3a167bea
AK		 830}
831
832int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
833{
cbbc58d4 834 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
3a167bea
AK		 835}
836
5587027c 837void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
3a167bea
AK		 838 struct kvm_memory_slot *dont)
839{
cbbc58d4 840 kvm->arch.kvm_ops->free_memslot(free, dont);
3a167bea
AK		 841}
842
5587027c 843int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
3a167bea
AK		 844 unsigned long npages)
845{
cbbc58d4 846 return kvm->arch.kvm_ops->create_memslot(slot, npages);
3a167bea
AK		 847}
848
849void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
850{
cbbc58d4 851 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
3a167bea
AK		 852}
853
854int kvmppc_core_prepare_memory_region(struct kvm *kvm,
855 struct kvm_memory_slot *memslot,
09170a49 856 const struct kvm_userspace_memory_region *mem)
3a167bea 857{
cbbc58d4 858 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
3a167bea
AK		 859}
860
861void kvmppc_core_commit_memory_region(struct kvm *kvm,
09170a49 862 const struct kvm_userspace_memory_region *mem,
f36f3f28 863 const struct kvm_memory_slot *old,
f032b734
BR		 864 const struct kvm_memory_slot *new,
865 enum kvm_mr_change change)
3a167bea 866{
f032b734 867 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
3a167bea
AK		 868}
869
3a167bea
AK		 870int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
871{
cbbc58d4 872 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
3a167bea
AK		 873}
874
57128468 875int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
3a167bea 876{
57128468 877 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
3a167bea
AK		 878}
879
880int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
881{
cbbc58d4 882 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
3a167bea
AK		 883}
884
748c0e31 885int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
3a167bea 886{
cbbc58d4 887 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
748c0e31 888 return 0;
3a167bea
AK		 889}
890
891void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
892{
cbbc58d4 893 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
3a167bea
AK		 894}
895
896int kvmppc_core_init_vm(struct kvm *kvm)
897{
898
899#ifdef CONFIG_PPC64
366baf28 900 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
3a167bea 901 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
1659e27d 902 mutex_init(&kvm->arch.rtas_token_lock);
3a167bea
AK		 903#endif
904
cbbc58d4 905 return kvm->arch.kvm_ops->init_vm(kvm);
3a167bea
AK		 906}
907
908void kvmppc_core_destroy_vm(struct kvm *kvm)
909{
cbbc58d4 910 kvm->arch.kvm_ops->destroy_vm(kvm);
3a167bea
AK		 911
912#ifdef CONFIG_PPC64
913 kvmppc_rtas_tokens_free(kvm);
914 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
915#endif
5422e951
CLG		 916
917#ifdef CONFIG_KVM_XICS
918 /*
919 * Free the XIVE devices which are not directly freed by the
920 * device 'release' method
921 */
922 kfree(kvm->arch.xive_devices.native);
923 kvm->arch.xive_devices.native = NULL;
924 kfree(kvm->arch.xive_devices.xics_on_xive);
925 kvm->arch.xive_devices.xics_on_xive = NULL;
926#endif /* CONFIG_KVM_XICS */
3a167bea
AK		 927}
928
99342cf8
DG		 929int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
930{
931 unsigned long size = kvmppc_get_gpr(vcpu, 4);
932 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
933 u64 buf;
3eb4ee68 934 int srcu_idx;
99342cf8
DG		 935 int ret;
936
937 if (!is_power_of_2(size) || (size > sizeof(buf)))
938 return H_TOO_HARD;
939
3eb4ee68 940 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 941 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 942 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 943 if (ret != 0)
944 return H_TOO_HARD;
945
946 switch (size) {
947 case 1:
948 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
949 break;
950
951 case 2:
952 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
953 break;
954
955 case 4:
956 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
957 break;
958
959 case 8:
960 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
961 break;
962
963 default:
964 BUG();
965 }
966
967 return H_SUCCESS;
968}
969EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
970
971int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
972{
973 unsigned long size = kvmppc_get_gpr(vcpu, 4);
974 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
975 unsigned long val = kvmppc_get_gpr(vcpu, 6);
976 u64 buf;
3eb4ee68 977 int srcu_idx;
99342cf8
DG		 978 int ret;
979
980 switch (size) {
981 case 1:
982 *(u8 *)&buf = val;
983 break;
984
985 case 2:
986 *(__be16 *)&buf = cpu_to_be16(val);
987 break;
988
989 case 4:
990 *(__be32 *)&buf = cpu_to_be32(val);
991 break;
992
993 case 8:
994 *(__be64 *)&buf = cpu_to_be64(val);
995 break;
996
997 default:
998 return H_TOO_HARD;
999 }
1000
3eb4ee68 1001 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 1002 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 1003 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 1004 if (ret != 0)
1005 return H_TOO_HARD;
1006
1007 return H_SUCCESS;
1008}
1009EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
1010
3a167bea
AK		 1011int kvmppc_core_check_processor_compat(void)
1012{
cbbc58d4
AK		 1013 /*
1014 * We always return 0 for book3s. We check
60acc4eb 1015 * for compatibility while loading the HV
cbbc58d4
AK		 1016 * or PR module
1017 */
1018 return 0;
1019}
1020
ae2113a4
PM		 1021int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
1022{
1023 return kvm->arch.kvm_ops->hcall_implemented(hcall);
1024}
1025
5af50993
BH		 1026#ifdef CONFIG_KVM_XICS
1027int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
1028 bool line_status)
1029{
03f95332 1030 if (xics_on_xive())
5af50993
BH		 1031 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
1032 line_status);
1033 else
1034 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
1035 line_status);
1036}
1037
1038int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1039 struct kvm *kvm, int irq_source_id,
1040 int level, bool line_status)
1041{
1042 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1043 level, line_status);
1044}
1045static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1046 struct kvm *kvm, int irq_source_id, int level,
1047 bool line_status)
1048{
1049 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1050}
1051
1052int kvm_irq_map_gsi(struct kvm *kvm,
1053 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1054{
1055 entries->gsi = gsi;
1056 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1057 entries->set = kvmppc_book3s_set_irq;
1058 entries->irqchip.irqchip = 0;
1059 entries->irqchip.pin = gsi;
1060 return 1;
1061}
1062
1063int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1064{
1065 return pin;
1066}
1067
1068#endif /* CONFIG_KVM_XICS */
1069
cbbc58d4
AK		 1070static int kvmppc_book3s_init(void)
1071{
1072 int r;
1073
1074 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1075 if (r)
1076 return r;
ab78475c 1077#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 1078 r = kvmppc_book3s_init_pr();
1079#endif
cbbc58d4 1080
5af50993
BH		 1081#ifdef CONFIG_KVM_XICS
1082#ifdef CONFIG_KVM_XIVE
03f95332 1083 if (xics_on_xive()) {
5af50993
BH		 1084 kvmppc_xive_init_module();
1085 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
2ad7a27d
PM		 1086 if (kvmppc_xive_native_supported()) {
1087 kvmppc_xive_native_init_module();
1088 kvm_register_device_ops(&kvm_xive_native_ops,
1089 KVM_DEV_TYPE_XIVE);
1090 }
5af50993
BH		 1091 } else
1092#endif
1093 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1094#endif
1095 return r;
cbbc58d4
AK		 1096}
1097
1098static void kvmppc_book3s_exit(void)
1099{
5af50993 1100#ifdef CONFIG_KVM_XICS
90c73795 1101 if (xics_on_xive()) {
5af50993 1102 kvmppc_xive_exit_module();
90c73795
CLG		 1103 kvmppc_xive_native_exit_module();
1104 }
5af50993 1105#endif
ab78475c 1106#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 1107 kvmppc_book3s_exit_pr();
1108#endif
1109 kvm_exit();
3a167bea 1110}
cbbc58d4
AK		 1111
1112module_init(kvmppc_book3s_init);
1113module_exit(kvmppc_book3s_exit);
398a76c6
AG		 1114
1115/* On 32bit this is our one and only kernel module */
ab78475c 1116#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
398a76c6
AG		 1117MODULE_ALIAS_MISCDEV(KVM_MINOR);
1118MODULE_ALIAS("devname:kvm");
1119#endif
Linux 6.x block layer and io_uring tree(s)