[linux-2.6-block.git] / arch / powerpc / boot / dts / haleakala.dts

/*
 * Device Tree Source for AMCC Haleakala (405EXr)
 *
 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "amcc,haleakala";
	compatible = "amcc,haleakala", "amcc,kilauea";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		serial0 = &UART0;
		serial1 = &UART1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,405EXr";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by U-Boot */
			timebase-frequency = <0>; /* Filled in by U-Boot */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <16384>; /* 16 kB */
			d-cache-size = <16384>; /* 16 kB */
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
	};

	UIC0: interrupt-controller {
		compatible = "ibm,uic-405exr", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-405exr","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-405exr","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	plb {
		compatible = "ibm,plb-405exr", "ibm,plb4";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by U-Boot */

		SDRAM0: memory-controller {
			compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
			dcr-reg = <0x010 0x002>;
			interrupt-parent = <&UIC2>;
			interrupts = <0x5 0x4	/* ECC DED Error */ 
				      0x6 0x4>;	/* ECC SEC Error */ 
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <2>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
			interrupt-map-mask = <0xffffffff>;
		};

		POB0: opb {
			compatible = "ibm,opb-405exr", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x80000000 0x80000000 0x10000000
				  0xef600000 0xef600000 0x00a00000
				  0xf0000000 0xf0000000 0x10000000>;
			dcr-reg = <0x0a0 0x005>;
			clock-frequency = <0>; /* Filled in by U-Boot */

			EBC0: ebc {
				compatible = "ibm,ebc-405exr", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				/* ranges property is supplied by U-Boot */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "amd,s29gl512n", "cfi-flash";
					bank-width = <2>;
					reg = <0x00000000 0x00000000 0x04000000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "kernel";
						reg = <0x00000000 0x00200000>;
					};
					partition@200000 {
						label = "root";
						reg = <0x00200000 0x00200000>;
					};
					partition@400000 {
						label = "user";
						reg = <0x00400000 0x03b60000>;
					};
					partition@3f60000 {
						label = "env";
						reg = <0x03f60000 0x00040000>;
					};
					partition@3fa0000 {
						label = "u-boot";
						reg = <0x03fa0000 0x00060000>;
					};
				};
			};

			UART0: serial@ef600200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600200 0x00000008>;
				virtual-reg = <0xef600200>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1a 0x4>;
			};

			UART1: serial@ef600300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600300 0x00000008>;
				virtual-reg = <0xef600300>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1 0x4>;
			};

			IIC0: i2c@ef600400 {
				compatible = "ibm,iic-405exr", "ibm,iic";
				reg = <0xef600400 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@ef600500 {
				compatible = "ibm,iic-405exr", "ibm,iic";
				reg = <0xef600500 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x7 0x4>;
			};


			RGMII0: emac-rgmii@ef600b00 {
				compatible = "ibm,rgmii-405exr", "ibm,rgmii";
				reg = <0xef600b00 0x00000104>;
				has-mdio;
			};

			EMAC0: ethernet@ef600900 {
				linux,network-index = <0x0>;
				device_type = "network";
				compatible = "ibm,emac-405exr", "ibm,emac4sync";
				interrupt-parent = <&EMAC0>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
				reg = <0xef600900 0x000000c4>;
				local-mac-address = [000000000000]; /* Filled in by U-Boot */
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				rx-fifo-size-gige = <16384>;
				tx-fifo-size-gige = <16384>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};
		};

		PCIE0: pciex@0a0000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
			primary;
			port = <0x0>; /* port number */
			reg = <0xa0000000 0x20000000	/* Config space access */
			       0xef000000 0x00001000>;	/* Registers */
			dcr-reg = <0x040 0x020>;
			sdr-base = <0x400>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
				  0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;

			/* This drives busses 0x00 to 0x3f */
			bus-range = <0x0 0x3f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
		};
	};
};
Commit	Line	Data
a4095516 SR	1	/*
	2	* Device Tree Source for AMCC Haleakala (405EXr)
	3	*
	4	* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without
	8	* any warranty of any kind, whether express or implied.
	9	*/
	10
71f34979 DG	11	/dts-v1/;
71f34979 DG	12
a4095516 SR	13	/ {
	14	#address-cells = <1>;
	15	#size-cells = <1>;
	16	model = "amcc,haleakala";
145692a7	17	compatible = "amcc,haleakala", "amcc,kilauea";
71f34979	18	dcr-parent = <&{/cpus/cpu@0}>;
a4095516 SR	19
	20	aliases {
	21	ethernet0 = &EMAC0;
	22	serial0 = &UART0;
	23	serial1 = &UART1;
	24	};
	25
	26	cpus {
	27	#address-cells = <1>;
	28	#size-cells = <0>;
	29
	30	cpu@0 {
	31	device_type = "cpu";
	32	model = "PowerPC,405EXr";
71f34979	33	reg = <0x00000000>;
a4095516 SR	34	clock-frequency = <0>; /* Filled in by U-Boot */
a4095516 SR	35	timebase-frequency = <0>; /* Filled in by U-Boot */
71f34979 DG	36	i-cache-line-size = <32>;
	37	d-cache-line-size = <32>;
	38	i-cache-size = <16384>; /* 16 kB */
	39	d-cache-size = <16384>; /* 16 kB */
a4095516 SR	40	dcr-controller;
	41	dcr-access-method = "native";
	42	};
	43	};
	44
	45	memory {
	46	device_type = "memory";
71f34979	47	reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
a4095516 SR	48	};
	49
	50	UIC0: interrupt-controller {
	51	compatible = "ibm,uic-405exr", "ibm,uic";
	52	interrupt-controller;
	53	cell-index = <0>;
71f34979	54	dcr-reg = <0x0c0 0x009>;
a4095516 SR	55	#address-cells = <0>;
	56	#size-cells = <0>;
	57	#interrupt-cells = <2>;
	58	};
	59
	60	UIC1: interrupt-controller1 {
	61	compatible = "ibm,uic-405exr","ibm,uic";
	62	interrupt-controller;
	63	cell-index = <1>;
71f34979	64	dcr-reg = <0x0d0 0x009>;
a4095516 SR	65	#address-cells = <0>;
	66	#size-cells = <0>;
	67	#interrupt-cells = <2>;
71f34979	68	interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
a4095516 SR	69	interrupt-parent = <&UIC0>;
	70	};
	71
	72	UIC2: interrupt-controller2 {
	73	compatible = "ibm,uic-405exr","ibm,uic";
	74	interrupt-controller;
	75	cell-index = <2>;
71f34979	76	dcr-reg = <0x0e0 0x009>;
a4095516 SR	77	#address-cells = <0>;
	78	#size-cells = <0>;
	79	#interrupt-cells = <2>;
71f34979	80	interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
a4095516 SR	81	interrupt-parent = <&UIC0>;
	82	};
	83
	84	plb {
	85	compatible = "ibm,plb-405exr", "ibm,plb4";
	86	#address-cells = <1>;
	87	#size-cells = <1>;
	88	ranges;
	89	clock-frequency = <0>; /* Filled in by U-Boot */
	90
	91	SDRAM0: memory-controller {
94ce1c58	92	compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
71f34979	93	dcr-reg = <0x010 0x002>;
94ce1c58 GE	94	interrupt-parent = <&UIC2>;
	95	interrupts = <0x5 0x4 /* ECC DED Error */
	96	0x6 0x4>; /* ECC SEC Error */
a4095516 SR	97	};
	98
	99	MAL0: mcmal {
	100	compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
71f34979	101	dcr-reg = <0x180 0x062>;
a4095516 SR	102	num-tx-chans = <2>;
	103	num-rx-chans = <2>;
	104	interrupt-parent = <&MAL0>;
71f34979	105	interrupts = <0x0 0x1 0x2 0x3 0x4>;
a4095516 SR	106	#interrupt-cells = <1>;
	107	#address-cells = <0>;
	108	#size-cells = <0>;
71f34979 DG	109	interrupt-map = </TXEOB/ 0x0 &UIC0 0xa 0x4
	110	/RXEOB/ 0x1 &UIC0 0xb 0x4
	111	/SERR/ 0x2 &UIC1 0x0 0x4
	112	/TXDE/ 0x3 &UIC1 0x1 0x4
	113	/RXDE/ 0x4 &UIC1 0x2 0x4>;
	114	interrupt-map-mask = <0xffffffff>;
a4095516 SR	115	};
	116
	117	POB0: opb {
	118	compatible = "ibm,opb-405exr", "ibm,opb";
	119	#address-cells = <1>;
	120	#size-cells = <1>;
71f34979 DG	121	ranges = <0x80000000 0x80000000 0x10000000
	122	0xef600000 0xef600000 0x00a00000
	123	0xf0000000 0xf0000000 0x10000000>;
	124	dcr-reg = <0x0a0 0x005>;
a4095516 SR	125	clock-frequency = <0>; /* Filled in by U-Boot */
	126
	127	EBC0: ebc {
	128	compatible = "ibm,ebc-405exr", "ibm,ebc";
71f34979	129	dcr-reg = <0x012 0x002>;
a4095516 SR	130	#address-cells = <2>;
	131	#size-cells = <1>;
	132	clock-frequency = <0>; /* Filled in by U-Boot */
	133	/* ranges property is supplied by U-Boot */
71f34979	134	interrupts = <0x5 0x1>;
a4095516 SR	135	interrupt-parent = <&UIC1>;
	136
	137	nor_flash@0,0 {
	138	compatible = "amd,s29gl512n", "cfi-flash";
	139	bank-width = <2>;
71f34979	140	reg = <0x00000000 0x00000000 0x04000000>;
a4095516 SR	141	#address-cells = <1>;
	142	#size-cells = <1>;
	143	partition@0 {
	144	label = "kernel";
71f34979	145	reg = <0x00000000 0x00200000>;
a4095516 SR	146	};
	147	partition@200000 {
	148	label = "root";
71f34979	149	reg = <0x00200000 0x00200000>;
a4095516 SR	150	};
	151	partition@400000 {
	152	label = "user";
71f34979	153	reg = <0x00400000 0x03b60000>;
a4095516 SR	154	};
	155	partition@3f60000 {
	156	label = "env";
71f34979	157	reg = <0x03f60000 0x00040000>;
a4095516 SR	158	};
	159	partition@3fa0000 {
	160	label = "u-boot";
71f34979	161	reg = <0x03fa0000 0x00060000>;
a4095516 SR	162	};
	163	};
	164	};
	165
	166	UART0: serial@ef600200 {
	167	device_type = "serial";
	168	compatible = "ns16550";
71f34979 DG	169	reg = <0xef600200 0x00000008>;
71f34979 DG	170	virtual-reg = <0xef600200>;
a4095516 SR	171	clock-frequency = <0>; /* Filled in by U-Boot */
	172	current-speed = <0>;
	173	interrupt-parent = <&UIC0>;
71f34979	174	interrupts = <0x1a 0x4>;
a4095516 SR	175	};
	176
	177	UART1: serial@ef600300 {
	178	device_type = "serial";
	179	compatible = "ns16550";
71f34979 DG	180	reg = <0xef600300 0x00000008>;
71f34979 DG	181	virtual-reg = <0xef600300>;
a4095516 SR	182	clock-frequency = <0>; /* Filled in by U-Boot */
	183	current-speed = <0>;
	184	interrupt-parent = <&UIC0>;
71f34979	185	interrupts = <0x1 0x4>;
a4095516 SR	186	};
	187
	188	IIC0: i2c@ef600400 {
	189	compatible = "ibm,iic-405exr", "ibm,iic";
71f34979	190	reg = <0xef600400 0x00000014>;
a4095516	191	interrupt-parent = <&UIC0>;
71f34979	192	interrupts = <0x2 0x4>;
a4095516 SR	193	};
	194
	195	IIC1: i2c@ef600500 {
	196	compatible = "ibm,iic-405exr", "ibm,iic";
71f34979	197	reg = <0xef600500 0x00000014>;
a4095516	198	interrupt-parent = <&UIC0>;
71f34979	199	interrupts = <0x7 0x4>;
a4095516 SR	200	};
	201
	202
	203	RGMII0: emac-rgmii@ef600b00 {
	204	compatible = "ibm,rgmii-405exr", "ibm,rgmii";
71f34979	205	reg = <0xef600b00 0x00000104>;
a4095516 SR	206	has-mdio;
	207	};
	208
	209	EMAC0: ethernet@ef600900 {
71f34979	210	linux,network-index = <0x0>;
a4095516	211	device_type = "network";
05781ccd	212	compatible = "ibm,emac-405exr", "ibm,emac4sync";
a4095516	213	interrupt-parent = <&EMAC0>;
71f34979	214	interrupts = <0x0 0x1>;
a4095516 SR	215	#interrupt-cells = <1>;
	216	#address-cells = <0>;
	217	#size-cells = <0>;
71f34979 DG	218	interrupt-map = </Status/ 0x0 &UIC0 0x18 0x4
71f34979 DG	219	/Wake/ 0x1 &UIC1 0x1d 0x4>;
05781ccd	220	reg = <0xef600900 0x000000c4>;
a4095516 SR	221	local-mac-address = [000000000000]; /* Filled in by U-Boot */
	222	mal-device = <&MAL0>;
	223	mal-tx-channel = <0>;
	224	mal-rx-channel = <0>;
	225	cell-index = <0>;
71f34979 DG	226	max-frame-size = <9000>;
	227	rx-fifo-size = <4096>;
	228	tx-fifo-size = <2048>;
835ad8e7 DM	229	rx-fifo-size-gige = <16384>;
835ad8e7 DM	230	tx-fifo-size-gige = <16384>;
a4095516	231	phy-mode = "rgmii";
71f34979	232	phy-map = <0x00000000>;
a4095516 SR	233	rgmii-device = <&RGMII0>;
	234	rgmii-channel = <0>;
	235	has-inverted-stacr-oc;
	236	has-new-stacr-staopc;
	237	};
	238	};
	239
	240	PCIE0: pciex@0a0000000 {
	241	device_type = "pci";
	242	#interrupt-cells = <1>;
	243	#size-cells = <2>;
	244	#address-cells = <3>;
e33eb074	245	compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
a4095516	246	primary;
71f34979 DG	247	port = <0x0>; /* port number */
	248	reg = <0xa0000000 0x20000000 /* Config space access */
	249	0xef000000 0x00001000>; /* Registers */
	250	dcr-reg = <0x040 0x020>;
	251	sdr-base = <0x400>;
a4095516 SR	252
	253	/* Outbound ranges, one memory and one IO,
	254	* later cannot be changed
	255	*/
71f34979 DG	256	ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
71f34979 DG	257	0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
a4095516 SR	258
a4095516 SR	259	/* Inbound 2GB range starting at 0 */
71f34979	260	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
a4095516 SR	261
a4095516 SR	262	/* This drives busses 0x00 to 0x3f */
71f34979	263	bus-range = <0x0 0x3f>;
a4095516 SR	264
	265	/* Legacy interrupts (note the weird polarity, the bridge seems
	266	* to invert PCIe legacy interrupts).
	267	* We are de-swizzling here because the numbers are actually for
	268	* port of the root complex virtual P2P bridge. But I want
	269	* to avoid putting a node for it in the tree, so the numbers
	270	* below are basically de-swizzled numbers.
	271	* The real slot is on idsel 0, so the swizzling is 1:1
	272	*/
71f34979	273	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
a4095516	274	interrupt-map = <
71f34979 DG	275	0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
	276	0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
	277	0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
	278	0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
a4095516 SR	279	};
	280	};
	281	};