[linux-2.6-block.git] / arch / parisc / kernel / smp.c

/*
** SMP Support
**
** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
** 
** Lots of stuff stolen from arch/alpha/kernel/smp.c
** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
**
** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
** -grant (1/12/2001)
**
**	This program is free software; you can redistribute it and/or modify
**	it under the terms of the GNU General Public License as published by
**      the Free Software Foundation; either version 2 of the License, or
**      (at your option) any later version.
*/
#include <linux/types.h>
#include <linux/spinlock.h>

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/kernel_stat.h>
#include <linux/mm.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/ftrace.h>

#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/current.h>
#include <asm/delay.h>
#include <asm/tlbflush.h>

#include <asm/io.h>
#include <asm/irq.h>		/* for CPU_IRQ_REGION and friends */
#include <asm/mmu_context.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/unistd.h>
#include <asm/cacheflush.h>

#undef DEBUG_SMP
#ifdef DEBUG_SMP
static int smp_debug_lvl = 0;
#define smp_debug(lvl, printargs...)		\
		if (lvl >= smp_debug_lvl)	\
			printk(printargs);
#else
#define smp_debug(lvl, ...)	do { } while(0)
#endif /* DEBUG_SMP */

volatile struct task_struct *smp_init_current_idle_task;

/* track which CPU is booting */
static volatile int cpu_now_booting __cpuinitdata;

static int parisc_max_cpus __cpuinitdata = 1;

static DEFINE_PER_CPU(spinlock_t, ipi_lock);

enum ipi_message_type {
	IPI_NOP=0,
	IPI_RESCHEDULE=1,
	IPI_CALL_FUNC,
	IPI_CALL_FUNC_SINGLE,
	IPI_CPU_START,
	IPI_CPU_STOP,
	IPI_CPU_TEST
};


/********** SMP inter processor interrupt and communication routines */

#undef PER_CPU_IRQ_REGION
#ifdef PER_CPU_IRQ_REGION
/* XXX REVISIT Ignore for now.
**    *May* need this "hook" to register IPI handler
**    once we have perCPU ExtIntr switch tables.
*/
static void
ipi_init(int cpuid)
{
#error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region

	if(cpu_online(cpuid) )
	{
		switch_to_idle_task(current);
	}

	return;
}
#endif


/*
** Yoink this CPU from the runnable list... 
**
*/
static void
halt_processor(void) 
{
	/* REVISIT : redirect I/O Interrupts to another CPU? */
	/* REVISIT : does PM *know* this CPU isn't available? */
	set_cpu_online(smp_processor_id(), false);
	local_irq_disable();
	for (;;)
		;
}


irqreturn_t __irq_entry
ipi_interrupt(int irq, void *dev_id) 
{
	int this_cpu = smp_processor_id();
	struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu);
	unsigned long ops;
	unsigned long flags;

	/* Count this now; we may make a call that never returns. */
	p->ipi_count++;

	mb();	/* Order interrupt and bit testing. */

	for (;;) {
		spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
		spin_lock_irqsave(lock, flags);
		ops = p->pending_ipi;
		p->pending_ipi = 0;
		spin_unlock_irqrestore(lock, flags);

		mb(); /* Order bit clearing and data access. */

		if (!ops)
		    break;

		while (ops) {
			unsigned long which = ffz(~ops);

			ops &= ~(1 << which);

			switch (which) {
			case IPI_NOP:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
				break;
				
			case IPI_RESCHEDULE:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
				/*
				 * Reschedule callback.  Everything to be
				 * done is done by the interrupt return path.
				 */
				break;

			case IPI_CALL_FUNC:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
				generic_smp_call_function_interrupt();
				break;

			case IPI_CALL_FUNC_SINGLE:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
				generic_smp_call_function_single_interrupt();
				break;

			case IPI_CPU_START:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
				break;

			case IPI_CPU_STOP:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
				halt_processor();
				break;

			case IPI_CPU_TEST:
				smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
				break;

			default:
				printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
					this_cpu, which);
				return IRQ_NONE;
			} /* Switch */
		/* let in any pending interrupts */
		local_irq_enable();
		local_irq_disable();
		} /* while (ops) */
	}
	return IRQ_HANDLED;
}


static inline void
ipi_send(int cpu, enum ipi_message_type op)
{
	struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu);
	spinlock_t *lock = &per_cpu(ipi_lock, cpu);
	unsigned long flags;

	spin_lock_irqsave(lock, flags);
	p->pending_ipi |= 1 << op;
	gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa);
	spin_unlock_irqrestore(lock, flags);
}

static void
send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op)
{
	int cpu;

	for_each_cpu(cpu, mask)
		ipi_send(cpu, op);
}

static inline void
send_IPI_single(int dest_cpu, enum ipi_message_type op)
{
	BUG_ON(dest_cpu == NO_PROC_ID);

	ipi_send(dest_cpu, op);
}

static inline void
send_IPI_allbutself(enum ipi_message_type op)
{
	int i;
	
	for_each_online_cpu(i) {
		if (i != smp_processor_id())
			send_IPI_single(i, op);
	}
}


inline void 
smp_send_stop(void)	{ send_IPI_allbutself(IPI_CPU_STOP); }

static inline void
smp_send_start(void)	{ send_IPI_allbutself(IPI_CPU_START); }

void 
smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }

void
smp_send_all_nop(void)
{
	send_IPI_allbutself(IPI_NOP);
}

void arch_send_call_function_ipi_mask(const struct cpumask *mask)
{
	send_IPI_mask(mask, IPI_CALL_FUNC);
}

void arch_send_call_function_single_ipi(int cpu)
{
	send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
}

/*
 * Flush all other CPU's tlb and then mine.  Do this with on_each_cpu()
 * as we want to ensure all TLB's flushed before proceeding.
 */

void
smp_flush_tlb_all(void)
{
	on_each_cpu(flush_tlb_all_local, NULL, 1);
}

/*
 * Called by secondaries to update state and initialize CPU registers.
 */
static void __init
smp_cpu_init(int cpunum)
{
	extern int init_per_cpu(int);  /* arch/parisc/kernel/processor.c */
	extern void init_IRQ(void);    /* arch/parisc/kernel/irq.c */
	extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */

	/* Set modes and Enable floating point coprocessor */
	(void) init_per_cpu(cpunum);

	disable_sr_hashing();

	mb();

	/* Well, support 2.4 linux scheme as well. */
	if (cpu_isset(cpunum, cpu_online_map))
	{
		extern void machine_halt(void); /* arch/parisc.../process.c */

		printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
		machine_halt();
	}  
	set_cpu_online(cpunum, true);

	/* Initialise the idle task for this CPU */
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;
	BUG_ON(current->mm);
	enter_lazy_tlb(&init_mm, current);

	init_IRQ();   /* make sure no IRQs are enabled or pending */
	start_cpu_itimer();
}


/*
 * Slaves start using C here. Indirectly called from smp_slave_stext.
 * Do what start_kernel() and main() do for boot strap processor (aka monarch)
 */
void __init smp_callin(void)
{
	int slave_id = cpu_now_booting;

	smp_cpu_init(slave_id);
	preempt_disable();

	flush_cache_all_local(); /* start with known state */
	flush_tlb_all_local(NULL);

	local_irq_enable();  /* Interrupts have been off until now */

	cpu_idle();      /* Wait for timer to schedule some work */

	/* NOTREACHED */
	panic("smp_callin() AAAAaaaaahhhh....\n");
}

/*
 * Bring one cpu online.
 */
int __cpuinit smp_boot_one_cpu(int cpuid)
{
	const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
	struct task_struct *idle;
	long timeout;

	/* 
	 * Create an idle task for this CPU.  Note the address wed* give 
	 * to kernel_thread is irrelevant -- it's going to start
	 * where OS_BOOT_RENDEVZ vector in SAL says to start.  But
	 * this gets all the other task-y sort of data structures set
	 * up like we wish.   We need to pull the just created idle task 
	 * off the run queue and stuff it into the init_tasks[] array.  
	 * Sheesh . . .
	 */

	idle = fork_idle(cpuid);
	if (IS_ERR(idle))
		panic("SMP: fork failed for CPU:%d", cpuid);

	task_thread_info(idle)->cpu = cpuid;

	/* Let _start know what logical CPU we're booting
	** (offset into init_tasks[],cpu_data[])
	*/
	cpu_now_booting = cpuid;

	/* 
	** boot strap code needs to know the task address since
	** it also contains the process stack.
	*/
	smp_init_current_idle_task = idle ;
	mb();

	printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa);

	/*
	** This gets PDC to release the CPU from a very tight loop.
	**
	** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
	** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which 
	** is executed after receiving the rendezvous signal (an interrupt to 
	** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the 
	** contents of memory are valid."
	*/
	gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa);
	mb();

	/* 
	 * OK, wait a bit for that CPU to finish staggering about. 
	 * Slave will set a bit when it reaches smp_cpu_init().
	 * Once the "monarch CPU" sees the bit change, it can move on.
	 */
	for (timeout = 0; timeout < 10000; timeout++) {
		if(cpu_online(cpuid)) {
			/* Which implies Slave has started up */
			cpu_now_booting = 0;
			smp_init_current_idle_task = NULL;
			goto alive ;
		}
		udelay(100);
		barrier();
	}

	put_task_struct(idle);
	idle = NULL;

	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
	return -1;

alive:
	/* Remember the Slave data */
	smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
		cpuid, timeout * 100);
	return 0;
}

void __init smp_prepare_boot_cpu(void)
{
	int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;

	/* Setup BSP mappings */
	printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);

	set_cpu_online(bootstrap_processor, true);
	set_cpu_present(bootstrap_processor, true);
}


/*
** inventory.c:do_inventory() hasn't yet been run and thus we
** don't 'discover' the additional CPUs until later.
*/
void __init smp_prepare_cpus(unsigned int max_cpus)
{
	int cpu;

	for_each_possible_cpu(cpu)
		spin_lock_init(&per_cpu(ipi_lock, cpu));

	init_cpu_present(cpumask_of(0));

	parisc_max_cpus = max_cpus;
	if (!max_cpus)
		printk(KERN_INFO "SMP mode deactivated.\n");
}


void smp_cpus_done(unsigned int cpu_max)
{
	return;
}


int __cpuinit __cpu_up(unsigned int cpu)
{
	if (cpu != 0 && cpu < parisc_max_cpus)
		smp_boot_one_cpu(cpu);

	return cpu_online(cpu) ? 0 : -ENOSYS;
}

#ifdef CONFIG_PROC_FS
int __init
setup_profiling_timer(unsigned int multiplier)
{
	return -EINVAL;
}
#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	** SMP Support
	3	**
	4	** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
	5	** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
	6	** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
	7	**
	8	** Lots of stuff stolen from arch/alpha/kernel/smp.c
	9	** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
	10	**
7022672e	11	** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
1da177e4 LT	12	** -grant (1/12/2001)
	13	**
	14	** This program is free software; you can redistribute it and/or modify
	15	** it under the terms of the GNU General Public License as published by
	16	** the Free Software Foundation; either version 2 of the License, or
	17	** (at your option) any later version.
	18	*/
1da177e4 LT	19	#include <linux/types.h>
1da177e4 LT	20	#include <linux/spinlock.h>
1da177e4 LT	21
	22	#include <linux/kernel.h>
	23	#include <linux/module.h>
	24	#include <linux/sched.h>
	25	#include <linux/init.h>
	26	#include <linux/interrupt.h>
	27	#include <linux/smp.h>
	28	#include <linux/kernel_stat.h>
	29	#include <linux/mm.h>
4e950f6f	30	#include <linux/err.h>
1da177e4 LT	31	#include <linux/delay.h>
1da177e4 LT	32	#include <linux/bitops.h>
d75f054a	33	#include <linux/ftrace.h>
1da177e4 LT	34
	35	#include <asm/system.h>
	36	#include <asm/atomic.h>
	37	#include <asm/current.h>
	38	#include <asm/delay.h>
1b2425e3	39	#include <asm/tlbflush.h>
1da177e4 LT	40
	41	#include <asm/io.h>
	42	#include <asm/irq.h> /* for CPU_IRQ_REGION and friends */
	43	#include <asm/mmu_context.h>
	44	#include <asm/page.h>
	45	#include <asm/pgtable.h>
	46	#include <asm/pgalloc.h>
	47	#include <asm/processor.h>
	48	#include <asm/ptrace.h>
	49	#include <asm/unistd.h>
	50	#include <asm/cacheflush.h>
	51
5492a0f0 KM	52	#undef DEBUG_SMP
	53	#ifdef DEBUG_SMP
	54	static int smp_debug_lvl = 0;
	55	#define smp_debug(lvl, printargs...) \
	56	if (lvl >= smp_debug_lvl) \
	57	printk(printargs);
	58	#else
ef017beb	59	#define smp_debug(lvl, ...) do { } while(0)
5492a0f0	60	#endif /* DEBUG_SMP */
1da177e4	61
1da177e4 LT	62	volatile struct task_struct *smp_init_current_idle_task;
1da177e4 LT	63
ef017beb HD	64	/* track which CPU is booting */
ef017beb HD	65	static volatile int cpu_now_booting __cpuinitdata;
1da177e4	66
ef017beb	67	static int parisc_max_cpus __cpuinitdata = 1;
1da177e4	68
6ad6c424	69	static DEFINE_PER_CPU(spinlock_t, ipi_lock);
1da177e4	70
1da177e4 LT	71	enum ipi_message_type {
	72	IPI_NOP=0,
	73	IPI_RESCHEDULE=1,
	74	IPI_CALL_FUNC,
dbcf4787	75	IPI_CALL_FUNC_SINGLE,
1da177e4 LT	76	IPI_CPU_START,
	77	IPI_CPU_STOP,
	78	IPI_CPU_TEST
	79	};
	80
	81
	82	/********** SMP inter processor interrupt and communication routines */
	83
	84	#undef PER_CPU_IRQ_REGION
	85	#ifdef PER_CPU_IRQ_REGION
	86	/* XXX REVISIT Ignore for now.
	87	** May need this "hook" to register IPI handler
	88	** once we have perCPU ExtIntr switch tables.
	89	*/
	90	static void
	91	ipi_init(int cpuid)
	92	{
1da177e4 LT	93	#error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region
	94
	95	if(cpu_online(cpuid) )
	96	{
	97	switch_to_idle_task(current);
	98	}
	99
	100	return;
	101	}
	102	#endif
	103
	104
	105	/*
	106	** Yoink this CPU from the runnable list...
	107	**
	108	*/
	109	static void
	110	halt_processor(void)
	111	{
1da177e4 LT	112	/* REVISIT : redirect I/O Interrupts to another CPU? */
1da177e4 LT	113	/* REVISIT : does PM know this CPU isn't available? */
9bc181d8	114	set_cpu_online(smp_processor_id(), false);
1da177e4 LT	115	local_irq_disable();
	116	for (;;)
	117	;
1da177e4 LT	118	}
	119
	120
d75f054a	121	irqreturn_t __irq_entry
c7753f18	122	ipi_interrupt(int irq, void *dev_id)
1da177e4 LT	123	{
1da177e4 LT	124	int this_cpu = smp_processor_id();
ef017beb	125	struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu);
1da177e4 LT	126	unsigned long ops;
	127	unsigned long flags;
	128
	129	/* Count this now; we may make a call that never returns. */
	130	p->ipi_count++;
	131
	132	mb(); /* Order interrupt and bit testing. */
	133
	134	for (;;) {
3c97b5e9 KM	135	spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
3c97b5e9 KM	136	spin_lock_irqsave(lock, flags);
1da177e4 LT	137	ops = p->pending_ipi;
1da177e4 LT	138	p->pending_ipi = 0;
3c97b5e9	139	spin_unlock_irqrestore(lock, flags);
1da177e4 LT	140
	141	mb(); /* Order bit clearing and data access. */
	142
	143	if (!ops)
	144	break;
	145
	146	while (ops) {
	147	unsigned long which = ffz(~ops);
	148
d911aed8 JB	149	ops &= ~(1 << which);
d911aed8 JB	150
1da177e4	151	switch (which) {
d911aed8	152	case IPI_NOP:
5492a0f0	153	smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
d911aed8 JB	154	break;
d911aed8 JB	155
1da177e4	156	case IPI_RESCHEDULE:
5492a0f0	157	smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
1da177e4 LT	158	/*
	159	* Reschedule callback. Everything to be
	160	* done is done by the interrupt return path.
	161	*/
	162	break;
	163
	164	case IPI_CALL_FUNC:
5492a0f0	165	smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
dbcf4787 JA	166	generic_smp_call_function_interrupt();
	167	break;
	168
	169	case IPI_CALL_FUNC_SINGLE:
	170	smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
	171	generic_smp_call_function_single_interrupt();
1da177e4 LT	172	break;
	173
	174	case IPI_CPU_START:
5492a0f0	175	smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
1da177e4 LT	176	break;
	177
	178	case IPI_CPU_STOP:
5492a0f0	179	smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
1da177e4	180	halt_processor();
1da177e4 LT	181	break;
	182
	183	case IPI_CPU_TEST:
5492a0f0	184	smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
1da177e4 LT	185	break;
	186
	187	default:
	188	printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
	189	this_cpu, which);
1da177e4 LT	190	return IRQ_NONE;
1da177e4 LT	191	} /* Switch */
7085689e JB	192	/* let in any pending interrupts */
	193	local_irq_enable();
	194	local_irq_disable();
1da177e4 LT	195	} /* while (ops) */
	196	}
	197	return IRQ_HANDLED;
	198	}
	199
	200
	201	static inline void
	202	ipi_send(int cpu, enum ipi_message_type op)
	203	{
ef017beb	204	struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu);
3c97b5e9	205	spinlock_t *lock = &per_cpu(ipi_lock, cpu);
1da177e4 LT	206	unsigned long flags;
1da177e4 LT	207
3c97b5e9	208	spin_lock_irqsave(lock, flags);
1da177e4	209	p->pending_ipi \|= 1 << op;
ef017beb	210	gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa);
3c97b5e9	211	spin_unlock_irqrestore(lock, flags);
1da177e4 LT	212	}
1da177e4 LT	213
dbcf4787	214	static void
91887a36	215	send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op)
dbcf4787 JA	216	{
	217	int cpu;
	218
91887a36	219	for_each_cpu(cpu, mask)
dbcf4787 JA	220	ipi_send(cpu, op);
dbcf4787 JA	221	}
1da177e4 LT	222
	223	static inline void
	224	send_IPI_single(int dest_cpu, enum ipi_message_type op)
	225	{
7f2347a4	226	BUG_ON(dest_cpu == NO_PROC_ID);
1da177e4 LT	227
	228	ipi_send(dest_cpu, op);
	229	}
	230
	231	static inline void
	232	send_IPI_allbutself(enum ipi_message_type op)
	233	{
	234	int i;
	235
394e3902 AM	236	for_each_online_cpu(i) {
394e3902 AM	237	if (i != smp_processor_id())
1da177e4 LT	238	send_IPI_single(i, op);
	239	}
	240	}
	241
	242
	243	inline void
	244	smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); }
	245
	246	static inline void
	247	smp_send_start(void) { send_IPI_allbutself(IPI_CPU_START); }
	248
	249	void
	250	smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }
	251
d911aed8 JB	252	void
	253	smp_send_all_nop(void)
	254	{
	255	send_IPI_allbutself(IPI_NOP);
	256	}
	257
91887a36	258	void arch_send_call_function_ipi_mask(const struct cpumask *mask)
1da177e4	259	{
dbcf4787	260	send_IPI_mask(mask, IPI_CALL_FUNC);
1da177e4 LT	261	}
1da177e4 LT	262
dbcf4787 JA	263	void arch_send_call_function_single_ipi(int cpu)
	264	{
	265	send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
	266	}
1da177e4 LT	267
	268	/*
	269	* Flush all other CPU's tlb and then mine. Do this with on_each_cpu()
	270	* as we want to ensure all TLB's flushed before proceeding.
	271	*/
	272
1da177e4 LT	273	void
	274	smp_flush_tlb_all(void)
	275	{
15c8b6c1	276	on_each_cpu(flush_tlb_all_local, NULL, 1);
1da177e4 LT	277	}
1da177e4 LT	278
1da177e4 LT	279	/*
	280	* Called by secondaries to update state and initialize CPU registers.
	281	*/
	282	static void __init
	283	smp_cpu_init(int cpunum)
	284	{
56f335c8	285	extern int init_per_cpu(int); /* arch/parisc/kernel/processor.c */
1da177e4	286	extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */
56f335c8	287	extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */
1da177e4 LT	288
	289	/* Set modes and Enable floating point coprocessor */
	290	(void) init_per_cpu(cpunum);
	291
	292	disable_sr_hashing();
	293
	294	mb();
	295
	296	/* Well, support 2.4 linux scheme as well. */
9bc181d8	297	if (cpu_isset(cpunum, cpu_online_map))
1da177e4 LT	298	{
	299	extern void machine_halt(void); /* arch/parisc.../process.c */
	300
	301	printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
	302	machine_halt();
	303	}
9bc181d8	304	set_cpu_online(cpunum, true);
1da177e4 LT	305
	306	/* Initialise the idle task for this CPU */
	307	atomic_inc(&init_mm.mm_count);
	308	current->active_mm = &init_mm;
7f2347a4	309	BUG_ON(current->mm);
1da177e4 LT	310	enter_lazy_tlb(&init_mm, current);
1da177e4 LT	311
7022672e	312	init_IRQ(); /* make sure no IRQs are enabled or pending */
56f335c8	313	start_cpu_itimer();
1da177e4 LT	314	}
	315
	316
	317	/*
	318	* Slaves start using C here. Indirectly called from smp_slave_stext.
	319	* Do what start_kernel() and main() do for boot strap processor (aka monarch)
	320	*/
	321	void __init smp_callin(void)
	322	{
	323	int slave_id = cpu_now_booting;
1da177e4 LT	324
1da177e4 LT	325	smp_cpu_init(slave_id);
5bfb5d69	326	preempt_disable();
1da177e4	327
1da177e4	328	flush_cache_all_local(); /* start with known state */
1b2425e3	329	flush_tlb_all_local(NULL);
1da177e4 LT	330
	331	local_irq_enable(); /* Interrupts have been off until now */
	332
	333	cpu_idle(); /* Wait for timer to schedule some work */
	334
	335	/* NOTREACHED */
	336	panic("smp_callin() AAAAaaaaahhhh....\n");
	337	}
	338
	339	/*
	340	* Bring one cpu online.
	341	*/
8dff980f	342	int __cpuinit smp_boot_one_cpu(int cpuid)
1da177e4	343	{
ef017beb	344	const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
1da177e4 LT	345	struct task_struct *idle;
	346	long timeout;
	347
	348	/*
	349	* Create an idle task for this CPU. Note the address wed* give
	350	* to kernel_thread is irrelevant -- it's going to start
	351	* where OS_BOOT_RENDEVZ vector in SAL says to start. But
	352	* this gets all the other task-y sort of data structures set
	353	* up like we wish. We need to pull the just created idle task
	354	* off the run queue and stuff it into the init_tasks[] array.
	355	* Sheesh . . .
	356	*/
	357
	358	idle = fork_idle(cpuid);
	359	if (IS_ERR(idle))
	360	panic("SMP: fork failed for CPU:%d", cpuid);
	361
40f1f0de	362	task_thread_info(idle)->cpu = cpuid;
1da177e4 LT	363
	364	/* Let _start know what logical CPU we're booting
	365	** (offset into init_tasks[],cpu_data[])
	366	*/
	367	cpu_now_booting = cpuid;
	368
	369	/*
	370	** boot strap code needs to know the task address since
	371	** it also contains the process stack.
	372	*/
	373	smp_init_current_idle_task = idle ;
	374	mb();
	375
ef017beb	376	printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa);
1da177e4 LT	377
	378	/*
	379	** This gets PDC to release the CPU from a very tight loop.
	380	**
	381	** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
	382	** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which
	383	** is executed after receiving the rendezvous signal (an interrupt to
	384	** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the
	385	** contents of memory are valid."
	386	*/
ef017beb	387	gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa);
1da177e4 LT	388	mb();
	389
	390	/*
	391	* OK, wait a bit for that CPU to finish staggering about.
	392	* Slave will set a bit when it reaches smp_cpu_init().
	393	* Once the "monarch CPU" sees the bit change, it can move on.
	394	*/
	395	for (timeout = 0; timeout < 10000; timeout++) {
	396	if(cpu_online(cpuid)) {
	397	/* Which implies Slave has started up */
	398	cpu_now_booting = 0;
	399	smp_init_current_idle_task = NULL;
	400	goto alive ;
	401	}
	402	udelay(100);
	403	barrier();
	404	}
	405
	406	put_task_struct(idle);
	407	idle = NULL;
	408
	409	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
	410	return -1;
	411
	412	alive:
	413	/* Remember the Slave data */
5492a0f0	414	smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
1da177e4	415	cpuid, timeout * 100);
1da177e4 LT	416	return 0;
	417	}
	418
ef017beb	419	void __init smp_prepare_boot_cpu(void)
1da177e4	420	{
ef017beb	421	int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;
1da177e4	422
1da177e4	423	/* Setup BSP mappings */
ef017beb	424	printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);
1da177e4	425
9bc181d8 RR	426	set_cpu_online(bootstrap_processor, true);
9bc181d8 RR	427	set_cpu_present(bootstrap_processor, true);
1da177e4 LT	428	}
	429
	430
	431
	432	/*
	433	** inventory.c:do_inventory() hasn't yet been run and thus we
7022672e	434	** don't 'discover' the additional CPUs until later.
1da177e4 LT	435	*/
	436	void __init smp_prepare_cpus(unsigned int max_cpus)
	437	{
6ad6c424 TG	438	int cpu;
	439
	440	for_each_possible_cpu(cpu)
	441	spin_lock_init(&per_cpu(ipi_lock, cpu));
	442
9bc181d8	443	init_cpu_present(cpumask_of(0));
1da177e4 LT	444
	445	parisc_max_cpus = max_cpus;
	446	if (!max_cpus)
	447	printk(KERN_INFO "SMP mode deactivated.\n");
	448	}
	449
	450
	451	void smp_cpus_done(unsigned int cpu_max)
	452	{
	453	return;
	454	}
	455
	456
b282b6f8	457	int __cpuinit __cpu_up(unsigned int cpu)
1da177e4 LT	458	{
	459	if (cpu != 0 && cpu < parisc_max_cpus)
	460	smp_boot_one_cpu(cpu);
	461
	462	return cpu_online(cpu) ? 0 : -ENOSYS;
	463	}
	464
1da177e4 LT	465	#ifdef CONFIG_PROC_FS
	466	int __init
	467	setup_profiling_timer(unsigned int multiplier)
	468	{
	469	return -EINVAL;
	470	}
	471	#endif