[linux-2.6-block.git] / arch / mips / include / asm / pgtable.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2003 Ralf Baechle
 */
#ifndef _ASM_PGTABLE_H
#define _ASM_PGTABLE_H

#include <linux/mm_types.h>
#include <linux/mmzone.h>
#ifdef CONFIG_32BIT
#include <asm/pgtable-32.h>
#endif
#ifdef CONFIG_64BIT
#include <asm/pgtable-64.h>
#endif

#include <asm/io.h>
#include <asm/pgtable-bits.h>

struct mm_struct;
struct vm_area_struct;

#define PAGE_NONE	__pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \
				 _page_cachable_default)
#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \
				 _page_cachable_default)
#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_READ | \
				 _page_cachable_default)
#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
				 _PAGE_GLOBAL | _page_cachable_default)
#define PAGE_KERNEL_NC	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
				 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
#define PAGE_USERIO	__pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
				 _page_cachable_default)
#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
			__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)

/*
 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
 * execute, and consider it to be the same as read. Also, write
 * permissions imply read permissions. This is the closest we can get
 * by reasonable means..
 */

/*
 * Dummy values to fill the table in mmap.c
 * The real values will be generated at runtime
 */
#define __P000 __pgprot(0)
#define __P001 __pgprot(0)
#define __P010 __pgprot(0)
#define __P011 __pgprot(0)
#define __P100 __pgprot(0)
#define __P101 __pgprot(0)
#define __P110 __pgprot(0)
#define __P111 __pgprot(0)

#define __S000 __pgprot(0)
#define __S001 __pgprot(0)
#define __S010 __pgprot(0)
#define __S011 __pgprot(0)
#define __S100 __pgprot(0)
#define __S101 __pgprot(0)
#define __S110 __pgprot(0)
#define __S111 __pgprot(0)

extern unsigned long _page_cachable_default;

/*
 * ZERO_PAGE is a global shared page that is always zero; used
 * for zero-mapped memory areas etc..
 */

extern unsigned long empty_zero_page;
extern unsigned long zero_page_mask;

#define ZERO_PAGE(vaddr) \
	(virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
#define __HAVE_COLOR_ZERO_PAGE

extern void paging_init(void);

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define pmd_phys(pmd)		virt_to_phys((void *)pmd_val(pmd))

#define __pmd_page(pmd)		(pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
#ifndef CONFIG_TRANSPARENT_HUGEPAGE
#define pmd_page(pmd)		__pmd_page(pmd)
#endif /* CONFIG_TRANSPARENT_HUGEPAGE  */

#define pmd_page_vaddr(pmd)	pmd_val(pmd)

#define htw_stop()							\
do {									\
	unsigned long flags;						\
									\
	if (cpu_has_htw) {						\
		local_irq_save(flags);					\
		if(!raw_current_cpu_data.htw_seq++) {			\
			write_c0_pwctl(read_c0_pwctl() &		\
				       ~(1 << MIPS_PWCTL_PWEN_SHIFT));	\
			back_to_back_c0_hazard();			\
		}							\
		local_irq_restore(flags);				\
	}								\
} while(0)

#define htw_start()							\
do {									\
	unsigned long flags;						\
									\
	if (cpu_has_htw) {						\
		local_irq_save(flags);					\
		if (!--raw_current_cpu_data.htw_seq) {			\
			write_c0_pwctl(read_c0_pwctl() |		\
				       (1 << MIPS_PWCTL_PWEN_SHIFT));	\
			back_to_back_c0_hazard();			\
		}							\
		local_irq_restore(flags);				\
	}								\
} while(0)

#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)

#define pte_none(pte)		(!(((pte).pte_high) & ~_PAGE_GLOBAL))
#define pte_present(pte)	((pte).pte_low & _PAGE_PRESENT)

static inline void set_pte(pte_t *ptep, pte_t pte)
{
	ptep->pte_high = pte.pte_high;
	smp_wmb();
	ptep->pte_low = pte.pte_low;

	if (pte.pte_high & _PAGE_GLOBAL) {
		pte_t *buddy = ptep_buddy(ptep);
		/*
		 * Make sure the buddy is global too (if it's !none,
		 * it better already be global)
		 */
		if (pte_none(*buddy))
			buddy->pte_high |= _PAGE_GLOBAL;
	}
}
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)

static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	pte_t null = __pte(0);

	htw_stop();
	/* Preserve global status for the pair */
	if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
		null.pte_high = _PAGE_GLOBAL;

	set_pte_at(mm, addr, ptep, null);
	htw_start();
}
#else

#define pte_none(pte)		(!(pte_val(pte) & ~_PAGE_GLOBAL))
#define pte_present(pte)	(pte_val(pte) & _PAGE_PRESENT)

/*
 * Certain architectures need to do special things when pte's
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 */
static inline void set_pte(pte_t *ptep, pte_t pteval)
{
	*ptep = pteval;
#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	if (pte_val(pteval) & _PAGE_GLOBAL) {
		pte_t *buddy = ptep_buddy(ptep);
		/*
		 * Make sure the buddy is global too (if it's !none,
		 * it better already be global)
		 */
#ifdef CONFIG_SMP
		/*
		 * For SMP, multiple CPUs can race, so we need to do
		 * this atomically.
		 */
#ifdef CONFIG_64BIT
#define LL_INSN "lld"
#define SC_INSN "scd"
#else /* CONFIG_32BIT */
#define LL_INSN "ll"
#define SC_INSN "sc"
#endif
		unsigned long page_global = _PAGE_GLOBAL;
		unsigned long tmp;

		__asm__ __volatile__ (
			"	.set	push\n"
			"	.set	noreorder\n"
			"1:	" LL_INSN "	%[tmp], %[buddy]\n"
			"	bnez	%[tmp], 2f\n"
			"	 or	%[tmp], %[tmp], %[global]\n"
			"	" SC_INSN "	%[tmp], %[buddy]\n"
			"	beqz	%[tmp], 1b\n"
			"	 nop\n"
			"2:\n"
			"	.set pop"
			: [buddy] "+m" (buddy->pte),
			  [tmp] "=&r" (tmp)
			: [global] "r" (page_global));
#else /* !CONFIG_SMP */
		if (pte_none(*buddy))
			pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
#endif /* CONFIG_SMP */
	}
#endif
}
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)

static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	htw_stop();
#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	/* Preserve global status for the pair */
	if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
		set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
	else
#endif
		set_pte_at(mm, addr, ptep, __pte(0));
	htw_start();
}
#endif

/*
 * (pmds are folded into puds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)

#ifndef __PAGETABLE_PMD_FOLDED
/*
 * (puds are folded into pgds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
#endif

#define PGD_T_LOG2	(__builtin_ffs(sizeof(pgd_t)) - 1)
#define PMD_T_LOG2	(__builtin_ffs(sizeof(pmd_t)) - 1)
#define PTE_T_LOG2	(__builtin_ffs(sizeof(pte_t)) - 1)

/*
 * We used to declare this array with size but gcc 3.3 and older are not able
 * to find that this expression is a constant, so the size is dropped.
 */
extern pgd_t swapper_pg_dir[];

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
static inline int pte_write(pte_t pte)	{ return pte.pte_low & _PAGE_WRITE; }
static inline int pte_dirty(pte_t pte)	{ return pte.pte_low & _PAGE_MODIFIED; }
static inline int pte_young(pte_t pte)	{ return pte.pte_low & _PAGE_ACCESSED; }

static inline pte_t pte_wrprotect(pte_t pte)
{
	pte.pte_low  &= ~_PAGE_WRITE;
	pte.pte_high &= ~_PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkclean(pte_t pte)
{
	pte.pte_low  &= ~_PAGE_MODIFIED;
	pte.pte_high &= ~_PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkold(pte_t pte)
{
	pte.pte_low  &= ~_PAGE_ACCESSED;
	pte.pte_high &= ~_PAGE_SILENT_READ;
	return pte;
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	pte.pte_low |= _PAGE_WRITE;
	if (pte.pte_low & _PAGE_MODIFIED)
		pte.pte_high |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	pte.pte_low |= _PAGE_MODIFIED;
	if (pte.pte_low & _PAGE_WRITE)
		pte.pte_high |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	pte.pte_low |= _PAGE_ACCESSED;
	if (pte.pte_low & _PAGE_READ)
		pte.pte_high |= _PAGE_SILENT_READ;
	return pte;
}
#else
static inline int pte_write(pte_t pte)	{ return pte_val(pte) & _PAGE_WRITE; }
static inline int pte_dirty(pte_t pte)	{ return pte_val(pte) & _PAGE_MODIFIED; }
static inline int pte_young(pte_t pte)	{ return pte_val(pte) & _PAGE_ACCESSED; }

static inline pte_t pte_wrprotect(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
	return pte;
}

static inline pte_t pte_mkclean(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
	return pte;
}

static inline pte_t pte_mkold(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
	return pte;
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	pte_val(pte) |= _PAGE_WRITE;
	if (pte_val(pte) & _PAGE_MODIFIED)
		pte_val(pte) |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	pte_val(pte) |= _PAGE_MODIFIED;
	if (pte_val(pte) & _PAGE_WRITE)
		pte_val(pte) |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	pte_val(pte) |= _PAGE_ACCESSED;
#ifdef CONFIG_CPU_MIPSR2
	if (!(pte_val(pte) & _PAGE_NO_READ))
		pte_val(pte) |= _PAGE_SILENT_READ;
	else
#endif
	if (pte_val(pte) & _PAGE_READ)
		pte_val(pte) |= _PAGE_SILENT_READ;
	return pte;
}

#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
static inline int pte_huge(pte_t pte)	{ return pte_val(pte) & _PAGE_HUGE; }

static inline pte_t pte_mkhuge(pte_t pte)
{
	pte_val(pte) |= _PAGE_HUGE;
	return pte;
}
#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
#endif
static inline int pte_special(pte_t pte)	{ return 0; }
static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }

/*
 * Macro to make mark a page protection value as "uncacheable".	 Note
 * that "protection" is really a misnomer here as the protection value
 * contains the memory attribute bits, dirty bits, and various other
 * bits as well.
 */
#define pgprot_noncached pgprot_noncached

static inline pgprot_t pgprot_noncached(pgprot_t _prot)
{
	unsigned long prot = pgprot_val(_prot);

	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;

	return __pgprot(prot);
}

static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
{
	unsigned long prot = pgprot_val(_prot);

	/* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
	prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;

	return __pgprot(prot);
}

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))

#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	pte.pte_low  &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
	pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
	pte.pte_low  |= pgprot_val(newprot) & ~_PFNX_MASK;
	pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK;
	return pte;
}
#else
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
}
#endif


extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
	pte_t pte);
extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
	pte_t pte);

static inline void update_mmu_cache(struct vm_area_struct *vma,
	unsigned long address, pte_t *ptep)
{
	pte_t pte = *ptep;
	__update_tlb(vma, address, pte);
	__update_cache(vma, address, pte);
}

static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
	unsigned long address, pmd_t *pmdp)
{
	pte_t pte = *(pte_t *)pmdp;

	__update_tlb(vma, address, pte);
}

#define kern_addr_valid(addr)	(1)

#ifdef CONFIG_PHYS_ADDR_T_64BIT
extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);

static inline int io_remap_pfn_range(struct vm_area_struct *vma,
		unsigned long vaddr,
		unsigned long pfn,
		unsigned long size,
		pgprot_t prot)
{
	phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
	return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
}
#define io_remap_pfn_range io_remap_pfn_range
#endif

#ifdef CONFIG_TRANSPARENT_HUGEPAGE

extern int has_transparent_hugepage(void);

static inline int pmd_trans_huge(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_HUGE);
}

static inline pmd_t pmd_mkhuge(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_HUGE;

	return pmd;
}

static inline int pmd_trans_splitting(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_SPLITTING);
}

static inline pmd_t pmd_mksplitting(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_SPLITTING;

	return pmd;
}

extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
		       pmd_t *pmdp, pmd_t pmd);

#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
/* Extern to avoid header file madness */
extern void pmdp_splitting_flush(struct vm_area_struct *vma,
					unsigned long address,
					pmd_t *pmdp);

#define __HAVE_ARCH_PMD_WRITE
static inline int pmd_write(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_WRITE);
}

static inline pmd_t pmd_wrprotect(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
	return pmd;
}

static inline pmd_t pmd_mkwrite(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_WRITE;
	if (pmd_val(pmd) & _PAGE_MODIFIED)
		pmd_val(pmd) |= _PAGE_SILENT_WRITE;

	return pmd;
}

static inline int pmd_dirty(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_MODIFIED);
}

static inline pmd_t pmd_mkclean(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
	return pmd;
}

static inline pmd_t pmd_mkdirty(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_MODIFIED;
	if (pmd_val(pmd) & _PAGE_WRITE)
		pmd_val(pmd) |= _PAGE_SILENT_WRITE;

	return pmd;
}

static inline int pmd_young(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_ACCESSED);
}

static inline pmd_t pmd_mkold(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);

	return pmd;
}

static inline pmd_t pmd_mkyoung(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_ACCESSED;

#ifdef CONFIG_CPU_MIPSR2
	if (!(pmd_val(pmd) & _PAGE_NO_READ))
		pmd_val(pmd) |= _PAGE_SILENT_READ;
	else
#endif
	if (pmd_val(pmd) & _PAGE_READ)
		pmd_val(pmd) |= _PAGE_SILENT_READ;

	return pmd;
}

/* Extern to avoid header file madness */
extern pmd_t mk_pmd(struct page *page, pgprot_t prot);

static inline unsigned long pmd_pfn(pmd_t pmd)
{
	return pmd_val(pmd) >> _PFN_SHIFT;
}

static inline struct page *pmd_page(pmd_t pmd)
{
	if (pmd_trans_huge(pmd))
		return pfn_to_page(pmd_pfn(pmd));

	return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
}

static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
{
	pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot);
	return pmd;
}

static inline pmd_t pmd_mknotpresent(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);

	return pmd;
}

/*
 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
 * different prototype.
 */
#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
					    unsigned long address, pmd_t *pmdp)
{
	pmd_t old = *pmdp;

	pmd_clear(pmdp);

	return old;
}

#endif /* CONFIG_TRANSPARENT_HUGEPAGE */

#include <asm-generic/pgtable.h>

/*
 * uncached accelerated TLB map for video memory access
 */
#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
#define __HAVE_PHYS_MEM_ACCESS_PROT

struct file;
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
		unsigned long size, pgprot_t vma_prot);
int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
		unsigned long size, pgprot_t *vma_prot);
#endif

/*
 * We provide our own get_unmapped area to cope with the virtual aliasing
 * constraints placed on us by the cache architecture.
 */
#define HAVE_ARCH_UNMAPPED_AREA
#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN

/*
 * No page table caches to initialise
 */
#define pgtable_cache_init()	do { } while (0)

#endif /* _ASM_PGTABLE_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 2003 Ralf Baechle
	7	*/
	8	#ifndef _ASM_PGTABLE_H
	9	#define _ASM_PGTABLE_H
	10
5bbea36a	11	#include <linux/mm_types.h>
970d032f	12	#include <linux/mmzone.h>
875d43e7	13	#ifdef CONFIG_32BIT
1da177e4 LT	14	#include <asm/pgtable-32.h>
1da177e4 LT	15	#endif
875d43e7	16	#ifdef CONFIG_64BIT
1da177e4 LT	17	#include <asm/pgtable-64.h>
	18	#endif
	19
f10fae02	20	#include <asm/io.h>
1da177e4 LT	21	#include <asm/pgtable-bits.h>
1da177e4 LT	22
8c65b4a6 TS	23	struct mm_struct;
	24	struct vm_area_struct;
	25
1da177e4	26	#define PAGE_NONE __pgprot(_PAGE_PRESENT \| _CACHE_CACHABLE_NONCOHERENT)
be0c37c9	27	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_WRITE \| _PAGE_READ \| \
35133692	28	_page_cachable_default)
be0c37c9 SH	29	#define PAGE_COPY __pgprot(_PAGE_PRESENT \| _PAGE_READ \| _PAGE_NO_EXEC \| \
	30	_page_cachable_default)
	31	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_READ \| \
35133692	32	_page_cachable_default)
1da177e4	33	#define PAGE_KERNEL __pgprot(_PAGE_PRESENT \| __READABLE \| __WRITEABLE \| \
35133692	34	_PAGE_GLOBAL \| _page_cachable_default)
e2a9e5ad PB	35	#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT \| __READABLE \| __WRITEABLE \| \
e2a9e5ad PB	36	_PAGE_GLOBAL \| _CACHE_CACHABLE_NONCOHERENT)
be0c37c9	37	#define PAGE_USERIO __pgprot(_PAGE_PRESENT \| _PAGE_READ \| _PAGE_WRITE \| \
35133692	38	_page_cachable_default)
1da177e4 LT	39	#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT \| __READABLE \| \
	40	__WRITEABLE \| _PAGE_GLOBAL \| _CACHE_UNCACHED)
	41
	42	/*
6dd9344c DD	43	* If _PAGE_NO_EXEC is not defined, we can't do page protection for
	44	* execute, and consider it to be the same as read. Also, write
	45	* permissions imply read permissions. This is the closest we can get
	46	* by reasonable means..
1da177e4	47	*/
1da177e4	48
35133692 CD	49	/*
	50	* Dummy values to fill the table in mmap.c
	51	* The real values will be generated at runtime
	52	*/
	53	#define __P000 __pgprot(0)
	54	#define __P001 __pgprot(0)
	55	#define __P010 __pgprot(0)
	56	#define __P011 __pgprot(0)
	57	#define __P100 __pgprot(0)
	58	#define __P101 __pgprot(0)
	59	#define __P110 __pgprot(0)
	60	#define __P111 __pgprot(0)
	61
	62	#define __S000 __pgprot(0)
	63	#define __S001 __pgprot(0)
	64	#define __S010 __pgprot(0)
	65	#define __S011 __pgprot(0)
	66	#define __S100 __pgprot(0)
	67	#define __S101 __pgprot(0)
	68	#define __S110 __pgprot(0)
	69	#define __S111 __pgprot(0)
	70
	71	extern unsigned long _page_cachable_default;
1da177e4 LT	72
	73	/*
	74	* ZERO_PAGE is a global shared page that is always zero; used
	75	* for zero-mapped memory areas etc..
	76	*/
	77
	78	extern unsigned long empty_zero_page;
	79	extern unsigned long zero_page_mask;
	80
	81	#define ZERO_PAGE(vaddr) \
99e3b942	82	(virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
816422ad	83	#define __HAVE_COLOR_ZERO_PAGE
62eede62	84
1da177e4 LT	85	extern void paging_init(void);
	86
	87	/*
	88	* Conversion functions: convert a page and protection to a page entry,
	89	* and a page entry and page directory to the page they refer to.
	90	*/
c9d06962	91	#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
970d032f RB	92
	93	#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
	94	#ifndef CONFIG_TRANSPARENT_HUGEPAGE
	95	#define pmd_page(pmd) __pmd_page(pmd)
	96	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
	97
46a82b2d	98	#define pmd_page_vaddr(pmd) pmd_val(pmd)
1da177e4	99
f1014d1b MC	100	#define htw_stop() \
f1014d1b MC	101	do { \
ed4cbc81 MC	102	unsigned long flags; \
ed4cbc81 MC	103	\
461d1597	104	if (cpu_has_htw) { \
ed4cbc81 MC	105	local_irq_save(flags); \
	106	if(!raw_current_cpu_data.htw_seq++) { \
	107	write_c0_pwctl(read_c0_pwctl() & \
	108	~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
	109	back_to_back_c0_hazard(); \
	110	} \
	111	local_irq_restore(flags); \
461d1597	112	} \
f1014d1b MC	113	} while(0)
	114
	115	#define htw_start() \
	116	do { \
ed4cbc81 MC	117	unsigned long flags; \
ed4cbc81 MC	118	\
f1014d1b	119	if (cpu_has_htw) { \
ed4cbc81 MC	120	local_irq_save(flags); \
	121	if (!--raw_current_cpu_data.htw_seq) { \
	122	write_c0_pwctl(read_c0_pwctl() \| \
	123	(1 << MIPS_PWCTL_PWEN_SHIFT)); \
	124	back_to_back_c0_hazard(); \
	125	} \
	126	local_irq_restore(flags); \
f1014d1b MC	127	} \
	128	} while(0)
	129
34adb28d	130	#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891	131
c5b36783	132	#define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
6e953891 SS	133	#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
6e953891 SS	134
1da177e4 LT	135	static inline void set_pte(pte_t *ptep, pte_t pte)
	136	{
	137	ptep->pte_high = pte.pte_high;
	138	smp_wmb();
	139	ptep->pte_low = pte.pte_low;
1da177e4	140
c5b36783	141	if (pte.pte_high & _PAGE_GLOBAL) {
1da177e4 LT	142	pte_t *buddy = ptep_buddy(ptep);
	143	/*
	144	* Make sure the buddy is global too (if it's !none,
	145	* it better already be global)
	146	*/
c5b36783	147	if (pte_none(*buddy))
6e953891	148	buddy->pte_high \|= _PAGE_GLOBAL;
1da177e4 LT	149	}
1da177e4 LT	150	}
5b9593f3	151	#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
1da177e4 LT	152
	153	static inline void pte_clear(struct mm_struct mm, unsigned long addr, pte_t ptep)
	154	{
6e953891 SS	155	pte_t null = __pte(0);
6e953891 SS	156
fde3538a	157	htw_stop();
1da177e4	158	/* Preserve global status for the pair */
c5b36783 SH	159	if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
c5b36783 SH	160	null.pte_high = _PAGE_GLOBAL;
6e953891 SS	161
6e953891 SS	162	set_pte_at(mm, addr, ptep, null);
fde3538a	163	htw_start();
1da177e4 LT	164	}
1da177e4 LT	165	#else
6e953891 SS	166
	167	#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
	168	#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
	169
1da177e4 LT	170	/*
	171	* Certain architectures need to do special things when pte's
	172	* within a page table are directly modified. Thus, the following
	173	* hook is made available.
	174	*/
	175	static inline void set_pte(pte_t *ptep, pte_t pteval)
	176	{
	177	*ptep = pteval;
	178	#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	179	if (pte_val(pteval) & _PAGE_GLOBAL) {
	180	pte_t *buddy = ptep_buddy(ptep);
	181	/*
	182	* Make sure the buddy is global too (if it's !none,
	183	* it better already be global)
	184	*/
46011e6e DD	185	#ifdef CONFIG_SMP
	186	/*
	187	* For SMP, multiple CPUs can race, so we need to do
	188	* this atomically.
	189	*/
	190	#ifdef CONFIG_64BIT
	191	#define LL_INSN "lld"
	192	#define SC_INSN "scd"
	193	#else /* CONFIG_32BIT */
	194	#define LL_INSN "ll"
	195	#define SC_INSN "sc"
	196	#endif
	197	unsigned long page_global = _PAGE_GLOBAL;
	198	unsigned long tmp;
	199
	200	__asm__ __volatile__ (
	201	" .set push\n"
	202	" .set noreorder\n"
	203	"1: " LL_INSN " %[tmp], %[buddy]\n"
	204	" bnez %[tmp], 2f\n"
	205	" or %[tmp], %[tmp], %[global]\n"
	206	" " SC_INSN " %[tmp], %[buddy]\n"
	207	" beqz %[tmp], 1b\n"
	208	" nop\n"
	209	"2:\n"
	210	" .set pop"
	211	: [buddy] "+m" (buddy->pte),
	212	[tmp] "=&r" (tmp)
	213	: [global] "r" (page_global));
	214	#else /* !CONFIG_SMP */
1da177e4 LT	215	if (pte_none(*buddy))
1da177e4 LT	216	pte_val(buddy) = pte_val(buddy) \| _PAGE_GLOBAL;
46011e6e	217	#endif /* CONFIG_SMP */
1da177e4 LT	218	}
	219	#endif
	220	}
5b9593f3	221	#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
1da177e4 LT	222
	223	static inline void pte_clear(struct mm_struct mm, unsigned long addr, pte_t ptep)
	224	{
fde3538a	225	htw_stop();
1da177e4 LT	226	#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	227	/* Preserve global status for the pair */
	228	if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
	229	set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
	230	else
	231	#endif
	232	set_pte_at(mm, addr, ptep, __pte(0));
fde3538a	233	htw_start();
1da177e4 LT	234	}
	235	#endif
	236
	237	/*
c6e8b587	238	* (pmds are folded into puds so this doesn't get actually called,
1da177e4 LT	239	* but the define is needed for a generic inline function.)
	240	*/
	241	#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
c6e8b587	242
325f8a0a	243	#ifndef __PAGETABLE_PMD_FOLDED
c6e8b587 RB	244	/*
	245	* (puds are folded into pgds so this doesn't get actually called,
	246	* but the define is needed for a generic inline function.)
	247	*/
	248	#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
	249	#endif
1da177e4	250
5ff97472 RB	251	#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
	252	#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
	253	#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
1da177e4	254
9975e77d RB	255	/*
	256	* We used to declare this array with size but gcc 3.3 and older are not able
	257	* to find that this expression is a constant, so the size is dropped.
	258	*/
	259	extern pgd_t swapper_pg_dir[];
1da177e4 LT	260
	261	/*
	262	* The following only work if pte_present() is true.
	263	* Undefined behaviour if not..
	264	*/
34adb28d	265	#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891 SS	266	static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
	267	static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
	268	static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
6e953891	269
1da177e4 LT	270	static inline pte_t pte_wrprotect(pte_t pte)
1da177e4 LT	271	{
c5b36783	272	pte.pte_low &= ~_PAGE_WRITE;
6e953891	273	pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4 LT	274	return pte;
	275	}
	276
1da177e4 LT	277	static inline pte_t pte_mkclean(pte_t pte)
1da177e4 LT	278	{
c5b36783	279	pte.pte_low &= ~_PAGE_MODIFIED;
6e953891	280	pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4 LT	281	return pte;
	282	}
	283
	284	static inline pte_t pte_mkold(pte_t pte)
	285	{
c5b36783	286	pte.pte_low &= ~_PAGE_ACCESSED;
6e953891	287	pte.pte_high &= ~_PAGE_SILENT_READ;
1da177e4 LT	288	return pte;
	289	}
	290
	291	static inline pte_t pte_mkwrite(pte_t pte)
	292	{
6e953891	293	pte.pte_low \|= _PAGE_WRITE;
c5b36783	294	if (pte.pte_low & _PAGE_MODIFIED)
6e953891	295	pte.pte_high \|= _PAGE_SILENT_WRITE;
1da177e4 LT	296	return pte;
	297	}
	298
1da177e4 LT	299	static inline pte_t pte_mkdirty(pte_t pte)
1da177e4 LT	300	{
6e953891	301	pte.pte_low \|= _PAGE_MODIFIED;
c5b36783	302	if (pte.pte_low & _PAGE_WRITE)
6e953891	303	pte.pte_high \|= _PAGE_SILENT_WRITE;
1da177e4 LT	304	return pte;
	305	}
	306
	307	static inline pte_t pte_mkyoung(pte_t pte)
	308	{
6e953891	309	pte.pte_low \|= _PAGE_ACCESSED;
c5b36783	310	if (pte.pte_low & _PAGE_READ)
6e953891	311	pte.pte_high \|= _PAGE_SILENT_READ;
1da177e4 LT	312	return pte;
	313	}
	314	#else
1da177e4 LT	315	static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
	316	static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
	317	static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
1da177e4 LT	318
	319	static inline pte_t pte_wrprotect(pte_t pte)
	320	{
	321	pte_val(pte) &= ~(_PAGE_WRITE \| _PAGE_SILENT_WRITE);
	322	return pte;
	323	}
	324
1da177e4 LT	325	static inline pte_t pte_mkclean(pte_t pte)
1da177e4 LT	326	{
77a5c593	327	pte_val(pte) &= ~(_PAGE_MODIFIED \| _PAGE_SILENT_WRITE);
1da177e4 LT	328	return pte;
	329	}
	330
	331	static inline pte_t pte_mkold(pte_t pte)
	332	{
77a5c593	333	pte_val(pte) &= ~(_PAGE_ACCESSED \| _PAGE_SILENT_READ);
1da177e4 LT	334	return pte;
	335	}
	336
	337	static inline pte_t pte_mkwrite(pte_t pte)
	338	{
	339	pte_val(pte) \|= _PAGE_WRITE;
	340	if (pte_val(pte) & _PAGE_MODIFIED)
	341	pte_val(pte) \|= _PAGE_SILENT_WRITE;
	342	return pte;
	343	}
	344
1da177e4 LT	345	static inline pte_t pte_mkdirty(pte_t pte)
	346	{
	347	pte_val(pte) \|= _PAGE_MODIFIED;
	348	if (pte_val(pte) & _PAGE_WRITE)
	349	pte_val(pte) \|= _PAGE_SILENT_WRITE;
	350	return pte;
	351	}
	352
	353	static inline pte_t pte_mkyoung(pte_t pte)
	354	{
	355	pte_val(pte) \|= _PAGE_ACCESSED;
be0c37c9 SH	356	#ifdef CONFIG_CPU_MIPSR2
	357	if (!(pte_val(pte) & _PAGE_NO_READ))
	358	pte_val(pte) \|= _PAGE_SILENT_READ;
	359	else
	360	#endif
	361	if (pte_val(pte) & _PAGE_READ)
	362	pte_val(pte) \|= _PAGE_SILENT_READ;
1da177e4 LT	363	return pte;
1da177e4 LT	364	}
dd794392	365
05f9883a	366	#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
dd794392 DD	367	static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
	368
	369	static inline pte_t pte_mkhuge(pte_t pte)
	370	{
	371	pte_val(pte) \|= _PAGE_HUGE;
	372	return pte;
	373	}
05f9883a	374	#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
1da177e4	375	#endif
7e675137 NP	376	static inline int pte_special(pte_t pte) { return 0; }
7e675137 NP	377	static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
1da177e4 LT	378
1da177e4 LT	379	/*
70342287	380	* Macro to make mark a page protection value as "uncacheable". Note
1da177e4 LT	381	* that "protection" is really a misnomer here as the protection value
	382	* contains the memory attribute bits, dirty bits, and various other
	383	* bits as well.
	384	*/
	385	#define pgprot_noncached pgprot_noncached
	386
	387	static inline pgprot_t pgprot_noncached(pgprot_t _prot)
	388	{
	389	unsigned long prot = pgprot_val(_prot);
	390
	391	prot = (prot & ~_CACHE_MASK) \| _CACHE_UNCACHED;
	392
	393	return __pgprot(prot);
	394	}
	395
4b050ba7 MC	396	static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
	397	{
	398	unsigned long prot = pgprot_val(_prot);
	399
	400	/* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
	401	prot = (prot & ~_CACHE_MASK) \| cpu_data[0].writecombine;
	402
	403	return __pgprot(prot);
	404	}
	405
1da177e4 LT	406	/*
	407	* Conversion functions: convert a page and protection to a page entry,
	408	* and a page entry and page directory to the page they refer to.
	409	*/
	410	#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
	411
34adb28d	412	#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
1da177e4 LT	413	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4 LT	414	{
c5b36783	415	pte.pte_low &= (_PAGE_MODIFIED \| _PAGE_ACCESSED \| _PFNX_MASK);
77a5c593	416	pte.pte_high &= (_PFN_MASK \| _CACHE_MASK);
c5b36783 SH	417	pte.pte_low \|= pgprot_val(newprot) & ~_PFNX_MASK;
c5b36783 SH	418	pte.pte_high \|= pgprot_val(newprot) & ~_PFN_MASK;
1da177e4 LT	419	return pte;
	420	}
	421	#else
	422	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
	423	{
	424	return __pte((pte_val(pte) & _PAGE_CHG_MASK) \| pgprot_val(newprot));
	425	}
	426	#endif
	427
	428
	429	extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
	430	pte_t pte);
5b9593f3 LP	431	extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
5b9593f3 LP	432	pte_t pte);
1da177e4 LT	433
1da177e4 LT	434	static inline void update_mmu_cache(struct vm_area_struct *vma,
4b3073e1	435	unsigned long address, pte_t *ptep)
1da177e4	436	{
4b3073e1	437	pte_t pte = *ptep;
1da177e4	438	__update_tlb(vma, address, pte);
5b9593f3	439	__update_cache(vma, address, pte);
1da177e4 LT	440	}
1da177e4 LT	441
970d032f RB	442	static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
	443	unsigned long address, pmd_t *pmdp)
	444	{
	445	pte_t pte = (pte_t )pmdp;
	446
	447	__update_tlb(vma, address, pte);
	448	}
	449
1da177e4	450	#define kern_addr_valid(addr) (1)
1da177e4	451
34adb28d	452	#ifdef CONFIG_PHYS_ADDR_T_64BIT
1da177e4 LT	453	extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
1da177e4 LT	454
1da177e4 LT	455	static inline int io_remap_pfn_range(struct vm_area_struct *vma,
	456	unsigned long vaddr,
	457	unsigned long pfn,
	458	unsigned long size,
	459	pgprot_t prot)
	460	{
15d45cce	461	phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
ac5d8c02	462	return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
1da177e4	463	}
40d158e6	464	#define io_remap_pfn_range io_remap_pfn_range
1da177e4 LT	465	#endif
1da177e4 LT	466
970d032f RB	467	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
	468
	469	extern int has_transparent_hugepage(void);
	470
	471	static inline int pmd_trans_huge(pmd_t pmd)
	472	{
	473	return !!(pmd_val(pmd) & _PAGE_HUGE);
	474	}
	475
	476	static inline pmd_t pmd_mkhuge(pmd_t pmd)
	477	{
	478	pmd_val(pmd) \|= _PAGE_HUGE;
	479
	480	return pmd;
	481	}
	482
	483	static inline int pmd_trans_splitting(pmd_t pmd)
	484	{
	485	return !!(pmd_val(pmd) & _PAGE_SPLITTING);
	486	}
	487
	488	static inline pmd_t pmd_mksplitting(pmd_t pmd)
	489	{
	490	pmd_val(pmd) \|= _PAGE_SPLITTING;
	491
	492	return pmd;
	493	}
	494
	495	extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
	496	pmd_t *pmdp, pmd_t pmd);
	497
	498	#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
	499	/* Extern to avoid header file madness */
	500	extern void pmdp_splitting_flush(struct vm_area_struct *vma,
	501	unsigned long address,
	502	pmd_t *pmdp);
	503
	504	#define __HAVE_ARCH_PMD_WRITE
	505	static inline int pmd_write(pmd_t pmd)
	506	{
	507	return !!(pmd_val(pmd) & _PAGE_WRITE);
	508	}
	509
	510	static inline pmd_t pmd_wrprotect(pmd_t pmd)
	511	{
	512	pmd_val(pmd) &= ~(_PAGE_WRITE \| _PAGE_SILENT_WRITE);
	513	return pmd;
	514	}
	515
	516	static inline pmd_t pmd_mkwrite(pmd_t pmd)
	517	{
	518	pmd_val(pmd) \|= _PAGE_WRITE;
	519	if (pmd_val(pmd) & _PAGE_MODIFIED)
	520	pmd_val(pmd) \|= _PAGE_SILENT_WRITE;
	521
	522	return pmd;
	523	}
	524
	525	static inline int pmd_dirty(pmd_t pmd)
	526	{
	527	return !!(pmd_val(pmd) & _PAGE_MODIFIED);
	528	}
	529
	530	static inline pmd_t pmd_mkclean(pmd_t pmd)
531	{
532	pmd_val(pmd) &= ~(_PAGE_MODIFIED \| _PAGE_SILENT_WRITE);
533	return pmd;
534	}
535
536	static inline pmd_t pmd_mkdirty(pmd_t pmd)
537	{
538	pmd_val(pmd) \|= _PAGE_MODIFIED;
539	if (pmd_val(pmd) & _PAGE_WRITE)
540	pmd_val(pmd) \|= _PAGE_SILENT_WRITE;
541
542	return pmd;
543	}
544
545	static inline int pmd_young(pmd_t pmd)
546	{
547	return !!(pmd_val(pmd) & _PAGE_ACCESSED);
548	}
549
550	static inline pmd_t pmd_mkold(pmd_t pmd)
551	{
552	pmd_val(pmd) &= ~(_PAGE_ACCESSED\|_PAGE_SILENT_READ);
553
554	return pmd;
555	}
556
557	static inline pmd_t pmd_mkyoung(pmd_t pmd)
558	{
559	pmd_val(pmd) \|= _PAGE_ACCESSED;
560
be0c37c9 SH	561	#ifdef CONFIG_CPU_MIPSR2
	562	if (!(pmd_val(pmd) & _PAGE_NO_READ))
	563	pmd_val(pmd) \|= _PAGE_SILENT_READ;
	564	else
	565	#endif
	566	if (pmd_val(pmd) & _PAGE_READ)
	567	pmd_val(pmd) \|= _PAGE_SILENT_READ;
970d032f RB	568
	569	return pmd;
	570	}
	571
	572	/* Extern to avoid header file madness */
	573	extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
	574
	575	static inline unsigned long pmd_pfn(pmd_t pmd)
	576	{
	577	return pmd_val(pmd) >> _PFN_SHIFT;
	578	}
	579
	580	static inline struct page *pmd_page(pmd_t pmd)
	581	{
	582	if (pmd_trans_huge(pmd))
	583	return pfn_to_page(pmd_pfn(pmd));
	584
	585	return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
	586	}
	587
	588	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
	589	{
	590	pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) \| pgprot_val(newprot);
	591	return pmd;
	592	}
	593
	594	static inline pmd_t pmd_mknotpresent(pmd_t pmd)
	595	{
	596	pmd_val(pmd) &= ~(_PAGE_PRESENT \| _PAGE_VALID \| _PAGE_DIRTY);
	597
	598	return pmd;
	599	}
	600
	601	/*
8809aa2d	602	* The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
970d032f RB	603	* different prototype.
970d032f RB	604	*/
8809aa2d AK	605	#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
	606	static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
	607	unsigned long address, pmd_t *pmdp)
970d032f RB	608	{
	609	pmd_t old = *pmdp;
	610
	611	pmd_clear(pmdp);
	612
	613	return old;
	614	}
	615
	616	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
	617
1da177e4 LT	618	#include <asm-generic/pgtable.h>
1da177e4 LT	619
22f1fdfd WZ	620	/*
	621	* uncached accelerated TLB map for video memory access
	622	*/
	623	#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
	624	#define __HAVE_PHYS_MEM_ACCESS_PROT
	625
	626	struct file;
	627	pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
	628	unsigned long size, pgprot_t vma_prot);
	629	int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
	630	unsigned long size, pgprot_t *vma_prot);
	631	#endif
	632
1da177e4 LT	633	/*
	634	* We provide our own get_unmapped area to cope with the virtual aliasing
	635	* constraints placed on us by the cache architecture.
	636	*/
	637	#define HAVE_ARCH_UNMAPPED_AREA
d0be89f6	638	#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1da177e4 LT	639
	640	/*
	641	* No page table caches to initialise
	642	*/
	643	#define pgtable_cache_init() do { } while (0)
	644
	645	#endif /* _ASM_PGTABLE_H */