Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski...
[linux-2.6-block.git] / arch / mips / bcm47xx / sprom.c
CommitLineData
019eee2e
HM
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4 * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6 * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <bcm47xx.h>
103c0bf3
HM
30#include <linux/if_ether.h>
31#include <linux/etherdevice.h>
019eee2e
HM
32
33static void create_key(const char *prefix, const char *postfix,
34 const char *name, char *buf, int len)
35{
36 if (prefix && postfix)
37 snprintf(buf, len, "%s%s%s", prefix, name, postfix);
38 else if (prefix)
39 snprintf(buf, len, "%s%s", prefix, name);
40 else if (postfix)
41 snprintf(buf, len, "%s%s", name, postfix);
42 else
43 snprintf(buf, len, "%s", name);
44}
45
b8ebbaff
HM
46static int get_nvram_var(const char *prefix, const char *postfix,
47 const char *name, char *buf, int len, bool fallback)
48{
49 char key[40];
50 int err;
51
52 create_key(prefix, postfix, name, key, sizeof(key));
53
111bd981 54 err = bcm47xx_nvram_getenv(key, buf, len);
ee7e2f3c 55 if (fallback && err == -ENOENT && prefix) {
b8ebbaff 56 create_key(NULL, postfix, name, key, sizeof(key));
111bd981 57 err = bcm47xx_nvram_getenv(key, buf, len);
b8ebbaff
HM
58 }
59 return err;
60}
61
019eee2e 62#define NVRAM_READ_VAL(type) \
2f94acde
RM
63static void nvram_read_ ## type(const char *prefix, \
64 const char *postfix, const char *name, \
65 type *val, type allset, bool fallback) \
019eee2e
HM
66{ \
67 char buf[100]; \
019eee2e
HM
68 int err; \
69 type var; \
70 \
b8ebbaff
HM
71 err = get_nvram_var(prefix, postfix, name, buf, sizeof(buf), \
72 fallback); \
019eee2e
HM
73 if (err < 0) \
74 return; \
924ffb7d 75 err = kstrto ## type(strim(buf), 0, &var); \
019eee2e 76 if (err) { \
b8ebbaff
HM
77 pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
78 prefix, name, postfix, buf, err); \
019eee2e
HM
79 return; \
80 } \
81 if (allset && var == allset) \
82 return; \
83 *val = var; \
84}
85
86NVRAM_READ_VAL(u8)
87NVRAM_READ_VAL(s8)
88NVRAM_READ_VAL(u16)
89NVRAM_READ_VAL(u32)
90
91#undef NVRAM_READ_VAL
92
93static void nvram_read_u32_2(const char *prefix, const char *name,
b8ebbaff 94 u16 *val_lo, u16 *val_hi, bool fallback)
019eee2e
HM
95{
96 char buf[100];
019eee2e
HM
97 int err;
98 u32 val;
99
b8ebbaff 100 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
019eee2e
HM
101 if (err < 0)
102 return;
924ffb7d 103 err = kstrtou32(strim(buf), 0, &val);
019eee2e 104 if (err) {
b8ebbaff
HM
105 pr_warn("can not parse nvram name %s%s with value %s got %i\n",
106 prefix, name, buf, err);
019eee2e
HM
107 return;
108 }
109 *val_lo = (val & 0x0000FFFFU);
110 *val_hi = (val & 0xFFFF0000U) >> 16;
111}
112
113static void nvram_read_leddc(const char *prefix, const char *name,
b8ebbaff
HM
114 u8 *leddc_on_time, u8 *leddc_off_time,
115 bool fallback)
019eee2e
HM
116{
117 char buf[100];
019eee2e
HM
118 int err;
119 u32 val;
120
b8ebbaff 121 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
019eee2e
HM
122 if (err < 0)
123 return;
924ffb7d 124 err = kstrtou32(strim(buf), 0, &val);
019eee2e 125 if (err) {
b8ebbaff
HM
126 pr_warn("can not parse nvram name %s%s with value %s got %i\n",
127 prefix, name, buf, err);
019eee2e
HM
128 return;
129 }
130
131 if (val == 0xffff || val == 0xffffffff)
132 return;
133
134 *leddc_on_time = val & 0xff;
135 *leddc_off_time = (val >> 16) & 0xff;
136}
137
341097f1
RM
138static void bcm47xx_nvram_parse_macaddr(char *buf, u8 macaddr[6])
139{
140 if (strchr(buf, ':'))
141 sscanf(buf, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &macaddr[0],
142 &macaddr[1], &macaddr[2], &macaddr[3], &macaddr[4],
143 &macaddr[5]);
144 else if (strchr(buf, '-'))
145 sscanf(buf, "%hhx-%hhx-%hhx-%hhx-%hhx-%hhx", &macaddr[0],
146 &macaddr[1], &macaddr[2], &macaddr[3], &macaddr[4],
147 &macaddr[5]);
148 else
149 pr_warn("Can not parse mac address: %s\n", buf);
150}
151
019eee2e 152static void nvram_read_macaddr(const char *prefix, const char *name,
710d86f8 153 u8 val[6], bool fallback)
019eee2e
HM
154{
155 char buf[100];
019eee2e
HM
156 int err;
157
b8ebbaff 158 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
019eee2e
HM
159 if (err < 0)
160 return;
b8ebbaff 161
710d86f8 162 bcm47xx_nvram_parse_macaddr(buf, val);
019eee2e
HM
163}
164
165static void nvram_read_alpha2(const char *prefix, const char *name,
710d86f8 166 char val[2], bool fallback)
019eee2e
HM
167{
168 char buf[10];
019eee2e
HM
169 int err;
170
b8ebbaff 171 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
019eee2e
HM
172 if (err < 0)
173 return;
174 if (buf[0] == '0')
175 return;
176 if (strlen(buf) > 2) {
b8ebbaff 177 pr_warn("alpha2 is too long %s\n", buf);
019eee2e
HM
178 return;
179 }
710d86f8 180 memcpy(val, buf, 2);
019eee2e
HM
181}
182
d55a52cc
RM
183/* This is one-function-only macro, it uses local "sprom" variable! */
184#define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
185 if (_revmask & BIT(sprom->revision)) \
186 nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
187 _allset, _fallback)
188/*
189 * Special version of filling function that can be safely called for any SPROM
190 * revision. For every NVRAM to SPROM mapping it contains bitmask of revisions
191 * for which the mapping is valid.
192 * It obviously requires some hexadecimal/bitmasks knowledge, but allows
193 * writing cleaner code (easy revisions handling).
194 * Note that while SPROM revision 0 was never used, we still keep BIT(0)
195 * reserved for it, just to keep numbering sane.
196 */
197static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
198 const char *prefix, bool fallback)
199{
200 const char *pre = prefix;
201 bool fb = fallback;
202
590605c6
RM
203 /* Broadcom extracts it for rev 8+ but it was found on 2 and 4 too */
204 ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback);
205
d55a52cc 206 ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
1387fe7d
RM
207 ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb);
208 ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb);
209 ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb);
e754dfcf
RM
210 ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
211 ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
d55a52cc 212 ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
e754dfcf
RM
213 ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
214 ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
215
216 ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
217 ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
218 ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
219 ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
220
221 ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
222 ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
223 ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
224 ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
225 ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
226
227 ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
228 ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
229 ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
230 ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
231 ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
232 ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
233 ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
234
235 ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
236 ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
237 ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
238 ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
239 ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
240 ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
241 ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
242 ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
243 ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
244 ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
245 ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
246 ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
247 ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
248
249 ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
250 ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
251 ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
252 ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
253 ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
254 ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
255 ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
256 ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
257 ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
258 ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
259 ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
260 ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
261 ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
262 ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
263 ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
264 ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
265 ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
266 ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
267 ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
268 ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
269 ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
270 ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
271 ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
272 ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
273 ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
274 ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
275 ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
276 ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
277 ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
278 ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
279 ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
280 ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
281 ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
282 ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
283 ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
284 ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
285 ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
286 ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
287 ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
288 ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
289 ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
290 ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
291 ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
292
293 ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
294 ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
295 ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
296 ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
297 ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
298 ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
299 ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
300 ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
301 ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
302 ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
303 ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
304 ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
305 ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
306 ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
307 ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
308 ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
309 ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
310
311 ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
312 ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
313 ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
314 ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
315 ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
316 ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
317 ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
318 ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
319 ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
320 ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
321 ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
322 ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
323 ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
324 ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
325 ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
326 ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
327 ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
328 ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
329 ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
330 ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
331 ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
332 ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
333 ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
334 ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
335 ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
336 ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
337 ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
338 ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
339 ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
340 ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
341 ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
342 ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
343 ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
344 ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
345 ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
346 ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
347 ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
348 ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
349 ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
350 ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
351 ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
352
353 ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
354 ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
355 ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
356 ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
357 ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
358 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
359 ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
360 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
361 ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
362 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
363 ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
364 ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
365 ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
366 ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
367 ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
368 ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
369 ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
370 ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
371 ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
372 ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
373 ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
374 ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
375 ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
376 ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
377 ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
378
379 /* TODO: rev 11 support */
380 ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
381 ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
382 ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
383 ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
384 ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
385 ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
386 ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
387 ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
388 ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
389 ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
390 ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
391 ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
392 ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
393 ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
394 ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
395
396 ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
397 ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
398
399 /* TODO: rev 11 support */
400 ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
401 ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
402 ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
403 ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
404 ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
405 ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
406 ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
407 ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
408 ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
409 ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
410 ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
411 ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
412 ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
413 ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
414 ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
d55a52cc
RM
415}
416#undef ENTRY /* It's specififc, uses local variable, don't use it (again). */
417
019eee2e 418static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
b8ebbaff 419 const char *prefix, bool fallback)
019eee2e
HM
420{
421 char postfix[2];
422 int i;
423
424 for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
2f94acde
RM
425 struct ssb_sprom_core_pwr_info *pwr_info;
426
427 pwr_info = &sprom->core_pwr_info[i];
428
019eee2e
HM
429 snprintf(postfix, sizeof(postfix), "%i", i);
430 nvram_read_u8(prefix, postfix, "maxp2ga",
b8ebbaff 431 &pwr_info->maxpwr_2g, 0, fallback);
019eee2e 432 nvram_read_u8(prefix, postfix, "itt2ga",
b8ebbaff 433 &pwr_info->itssi_2g, 0, fallback);
019eee2e 434 nvram_read_u8(prefix, postfix, "itt5ga",
b8ebbaff 435 &pwr_info->itssi_5g, 0, fallback);
019eee2e 436 nvram_read_u16(prefix, postfix, "pa2gw0a",
b8ebbaff 437 &pwr_info->pa_2g[0], 0, fallback);
019eee2e 438 nvram_read_u16(prefix, postfix, "pa2gw1a",
b8ebbaff 439 &pwr_info->pa_2g[1], 0, fallback);
019eee2e 440 nvram_read_u16(prefix, postfix, "pa2gw2a",
b8ebbaff 441 &pwr_info->pa_2g[2], 0, fallback);
019eee2e 442 nvram_read_u8(prefix, postfix, "maxp5ga",
b8ebbaff 443 &pwr_info->maxpwr_5g, 0, fallback);
019eee2e 444 nvram_read_u8(prefix, postfix, "maxp5gha",
b8ebbaff 445 &pwr_info->maxpwr_5gh, 0, fallback);
019eee2e 446 nvram_read_u8(prefix, postfix, "maxp5gla",
b8ebbaff 447 &pwr_info->maxpwr_5gl, 0, fallback);
019eee2e 448 nvram_read_u16(prefix, postfix, "pa5gw0a",
b8ebbaff 449 &pwr_info->pa_5g[0], 0, fallback);
019eee2e 450 nvram_read_u16(prefix, postfix, "pa5gw1a",
b8ebbaff 451 &pwr_info->pa_5g[1], 0, fallback);
019eee2e 452 nvram_read_u16(prefix, postfix, "pa5gw2a",
b8ebbaff 453 &pwr_info->pa_5g[2], 0, fallback);
019eee2e 454 nvram_read_u16(prefix, postfix, "pa5glw0a",
b8ebbaff 455 &pwr_info->pa_5gl[0], 0, fallback);
019eee2e 456 nvram_read_u16(prefix, postfix, "pa5glw1a",
b8ebbaff 457 &pwr_info->pa_5gl[1], 0, fallback);
019eee2e 458 nvram_read_u16(prefix, postfix, "pa5glw2a",
b8ebbaff 459 &pwr_info->pa_5gl[2], 0, fallback);
019eee2e 460 nvram_read_u16(prefix, postfix, "pa5ghw0a",
b8ebbaff 461 &pwr_info->pa_5gh[0], 0, fallback);
019eee2e 462 nvram_read_u16(prefix, postfix, "pa5ghw1a",
b8ebbaff 463 &pwr_info->pa_5gh[1], 0, fallback);
019eee2e 464 nvram_read_u16(prefix, postfix, "pa5ghw2a",
b8ebbaff 465 &pwr_info->pa_5gh[2], 0, fallback);
019eee2e
HM
466 }
467}
468
469static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
b8ebbaff 470 const char *prefix, bool fallback)
019eee2e
HM
471{
472 char postfix[2];
473 int i;
474
475 for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
2f94acde
RM
476 struct ssb_sprom_core_pwr_info *pwr_info;
477
478 pwr_info = &sprom->core_pwr_info[i];
479
019eee2e
HM
480 snprintf(postfix, sizeof(postfix), "%i", i);
481 nvram_read_u16(prefix, postfix, "pa2gw3a",
b8ebbaff 482 &pwr_info->pa_2g[3], 0, fallback);
019eee2e 483 nvram_read_u16(prefix, postfix, "pa5gw3a",
b8ebbaff 484 &pwr_info->pa_5g[3], 0, fallback);
019eee2e 485 nvram_read_u16(prefix, postfix, "pa5glw3a",
b8ebbaff 486 &pwr_info->pa_5gl[3], 0, fallback);
019eee2e 487 nvram_read_u16(prefix, postfix, "pa5ghw3a",
b8ebbaff 488 &pwr_info->pa_5gh[3], 0, fallback);
019eee2e
HM
489 }
490}
491
103c0bf3
HM
492static bool bcm47xx_is_valid_mac(u8 *mac)
493{
494 return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
495}
496
497static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
498{
499 u8 *oui = mac + ETH_ALEN/2 - 1;
500 u8 *p = mac + ETH_ALEN - 1;
501
502 do {
503 (*p) += num;
504 if (*p > num)
505 break;
506 p--;
507 num = 1;
508 } while (p != oui);
509
510 if (p == oui) {
511 pr_err("unable to fetch mac address\n");
512 return -ENOENT;
513 }
514 return 0;
515}
516
517static int mac_addr_used = 2;
518
b8ebbaff
HM
519static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
520 const char *prefix, bool fallback)
019eee2e 521{
6e122ac0
RM
522 bool fb = fallback;
523
710d86f8 524 nvram_read_macaddr(prefix, "et0macaddr", sprom->et0mac, fallback);
b8ebbaff
HM
525 nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0,
526 fallback);
527 nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0,
528 fallback);
529
710d86f8 530 nvram_read_macaddr(prefix, "et1macaddr", sprom->et1mac, fallback);
b8ebbaff
HM
531 nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0,
532 fallback);
533 nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0,
534 fallback);
535
6e122ac0
RM
536 nvram_read_macaddr(prefix, "et2macaddr", sprom->et2mac, fb);
537 nvram_read_u8(prefix, NULL, "et2mdcport", &sprom->et2mdcport, 0, fb);
538 nvram_read_u8(prefix, NULL, "et2phyaddr", &sprom->et2phyaddr, 0, fb);
539
710d86f8
IM
540 nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
541 nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
103c0bf3
HM
542
543 /* The address prefix 00:90:4C is used by Broadcom in their initial
2f94acde
RM
544 * configuration. When a mac address with the prefix 00:90:4C is used
545 * all devices from the same series are sharing the same mac address.
546 * To prevent mac address collisions we replace them with a mac address
547 * based on the base address.
548 */
103c0bf3
HM
549 if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
550 u8 mac[6];
551
552 nvram_read_macaddr(NULL, "et0macaddr", mac, false);
553 if (bcm47xx_is_valid_mac(mac)) {
554 int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
555
556 if (!err) {
557 ether_addr_copy(sprom->il0mac, mac);
558 mac_addr_used++;
559 }
560 }
561 }
019eee2e
HM
562}
563
b8ebbaff
HM
564static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
565 bool fallback)
5d24ceab 566{
5d24ceab 567 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
b8ebbaff 568 &sprom->boardflags_hi, fallback);
5d24ceab 569 nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
b8ebbaff 570 &sprom->boardflags2_hi, fallback);
5d24ceab
HM
571}
572
b8ebbaff
HM
573void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
574 bool fallback)
019eee2e 575{
b8ebbaff
HM
576 bcm47xx_fill_sprom_ethernet(sprom, prefix, fallback);
577 bcm47xx_fill_board_data(sprom, prefix, fallback);
019eee2e 578
b8ebbaff 579 nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0, fallback);
019eee2e 580
590605c6
RM
581 /* Entries requiring custom functions */
582 nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
583 if (sprom->revision >= 3)
584 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
585 &sprom->leddc_off_time, fallback);
586
019eee2e 587 switch (sprom->revision) {
019eee2e
HM
588 case 4:
589 case 5:
b8ebbaff
HM
590 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
591 bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
019eee2e
HM
592 break;
593 case 8:
019eee2e 594 case 9:
b8ebbaff 595 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
019eee2e 596 break;
019eee2e 597 }
d55a52cc
RM
598
599 bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
019eee2e 600}
a9bba182 601
a59da8fb
RM
602#if defined(CONFIG_BCM47XX_SSB)
603static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
604{
605 char prefix[10];
606
daa7ce02
RM
607 switch (bus->bustype) {
608 case SSB_BUSTYPE_SSB:
609 bcm47xx_fill_sprom(out, NULL, false);
610 return 0;
611 case SSB_BUSTYPE_PCI:
a59da8fb
RM
612 memset(out, 0, sizeof(struct ssb_sprom));
613 snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
614 bus->host_pci->bus->number + 1,
615 PCI_SLOT(bus->host_pci->devfn));
616 bcm47xx_fill_sprom(out, prefix, false);
617 return 0;
daa7ce02 618 default:
d548ca6b 619 pr_warn("Unable to fill SPROM for given bustype.\n");
a59da8fb
RM
620 return -EINVAL;
621 }
622}
623#endif
624
625#if defined(CONFIG_BCM47XX_BCMA)
9a6a2b96
RM
626/*
627 * Having many NVRAM entries for PCI devices led to repeating prefixes like
628 * pci/1/1/ all the time and wasting flash space. So at some point Broadcom
629 * decided to introduce prefixes like 0: 1: 2: etc.
630 * If we find e.g. devpath0=pci/2/1 or devpath0=pci/2/1/ we should use 0:
631 * instead of pci/2/1/.
632 */
633static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
634{
635 size_t prefix_len = strlen(prefix);
636 size_t short_len = prefix_len - 1;
637 char nvram_var[10];
638 char buf[20];
639 int i;
640
641 /* Passed prefix has to end with a slash */
642 if (prefix_len <= 0 || prefix[prefix_len - 1] != '/')
643 return;
644
645 for (i = 0; i < 3; i++) {
646 if (snprintf(nvram_var, sizeof(nvram_var), "devpath%d", i) <= 0)
647 continue;
648 if (bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf)) < 0)
649 continue;
650 if (!strcmp(buf, prefix) ||
651 (short_len && strlen(buf) == short_len && !strncmp(buf, prefix, short_len))) {
652 snprintf(prefix, prefix_size, "%d:", i);
653 return;
654 }
655 }
656}
657
a59da8fb
RM
658static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
659{
26238994 660 struct bcma_boardinfo *binfo = &bus->boardinfo;
a59da8fb 661 struct bcma_device *core;
26238994
RM
662 char buf[10];
663 char *prefix;
664 bool fallback = false;
a59da8fb
RM
665
666 switch (bus->hosttype) {
667 case BCMA_HOSTTYPE_PCI:
668 memset(out, 0, sizeof(struct ssb_sprom));
3d1f664a
RM
669 /* On BCM47XX all PCI buses share the same domain */
670 if (config_enabled(CONFIG_BCM47XX))
671 snprintf(buf, sizeof(buf), "pci/%u/%u/",
672 bus->host_pci->bus->number + 1,
673 PCI_SLOT(bus->host_pci->devfn));
674 else
675 snprintf(buf, sizeof(buf), "pci/%u/%u/",
676 pci_domain_nr(bus->host_pci->bus) + 1,
677 bus->host_pci->bus->number);
26238994
RM
678 bcm47xx_sprom_apply_prefix_alias(buf, sizeof(buf));
679 prefix = buf;
680 break;
a59da8fb
RM
681 case BCMA_HOSTTYPE_SOC:
682 memset(out, 0, sizeof(struct ssb_sprom));
683 core = bcma_find_core(bus, BCMA_CORE_80211);
684 if (core) {
26238994 685 snprintf(buf, sizeof(buf), "sb/%u/",
a59da8fb 686 core->core_index);
26238994
RM
687 prefix = buf;
688 fallback = true;
a59da8fb 689 } else {
26238994 690 prefix = NULL;
a59da8fb 691 }
26238994 692 break;
a59da8fb 693 default:
d548ca6b 694 pr_warn("Unable to fill SPROM for given bustype.\n");
a59da8fb
RM
695 return -EINVAL;
696 }
26238994
RM
697
698 nvram_read_u16(prefix, NULL, "boardvendor", &binfo->vendor, 0, true);
699 if (!binfo->vendor)
700 binfo->vendor = SSB_BOARDVENDOR_BCM;
701 nvram_read_u16(prefix, NULL, "boardtype", &binfo->type, 0, true);
702
703 bcm47xx_fill_sprom(out, prefix, fallback);
704
705 return 0;
a59da8fb
RM
706}
707#endif
708
709/*
710 * On bcm47xx we need to register SPROM fallback handler very early, so we can't
711 * use anything like platform device / driver for this.
712 */
713void bcm47xx_sprom_register_fallbacks(void)
714{
715#if defined(CONFIG_BCM47XX_SSB)
716 if (ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom_ssb))
748ac56b 717 pr_warn("Failed to register ssb SPROM handler\n");
a59da8fb
RM
718#endif
719
720#if defined(CONFIG_BCM47XX_BCMA)
721 if (bcma_arch_register_fallback_sprom(&bcm47xx_get_sprom_bcma))
748ac56b 722 pr_warn("Failed to register bcma SPROM handler\n");
a59da8fb
RM
723#endif
724}