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[IA64] Enable preadv2 and pwritev2 syscalls for ia64
[linux-2.6-block.git] / arch / ia64 / kernel / entry.S
CommitLineData
1da177e4 1/*
f30c2269 2 * arch/ia64/kernel/entry.S
1da177e4
LT		 3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16/*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
4df8d22b
IY		 25/*
26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
27 * VA Linux Systems Japan K.K.
28 * pv_ops.
29 */
1da177e4
LT		 30/*
31 * Global (preserved) predicate usage on syscall entry/exit path:
32 *
33 * pKStk: See entry.h.
34 * pUStk: See entry.h.
35 * pSys: See entry.h.
36 * pNonSys: !pSys
37 */
38
1da177e4
LT		 39
40#include <asm/asmmacro.h>
41#include <asm/cache.h>
42#include <asm/errno.h>
43#include <asm/kregs.h>
39e01cb8 44#include <asm/asm-offsets.h>
1da177e4
LT		 45#include <asm/pgtable.h>
46#include <asm/percpu.h>
47#include <asm/processor.h>
48#include <asm/thread_info.h>
49#include <asm/unistd.h>
d3e75ff1 50#include <asm/ftrace.h>
1da177e4
LT		 51
52#include "minstate.h"
53
54 /*
55 * execve() is special because in case of success, we need to
56 * setup a null register window frame.
57 */
58ENTRY(ia64_execve)
59 /*
60 * Allocate 8 input registers since ptrace() may clobber them
61 */
62 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
71b4ecc3 63 alloc loc1=ar.pfs,8,2,3,0
1da177e4
LT		 64 mov loc0=rp
65 .body
66 mov out0=in0 // filename
67 ;; // stop bit between alloc and call
68 mov out1=in1 // argv
69 mov out2=in2 // envp
1da177e4
LT		 70 br.call.sptk.many rp=sys_execve
71.ret0:
1da177e4
LT		 72 cmp4.ge p6,p7=r8,r0
73 mov ar.pfs=loc1 // restore ar.pfs
74 sxt4 r8=r8 // return 64-bit result
75 ;;
76 stf.spill [sp]=f0
1da177e4
LT		 77 mov rp=loc0
78(p6) mov ar.pfs=r0 // clear ar.pfs on success
79(p7) br.ret.sptk.many rp
80
81 /*
82 * In theory, we'd have to zap this state only to prevent leaking of
83 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
84 * this executes in less than 20 cycles even on Itanium, so it's not worth
85 * optimizing for...).
86 */
87 mov ar.unat=0; mov ar.lc=0
88 mov r4=0; mov f2=f0; mov b1=r0
89 mov r5=0; mov f3=f0; mov b2=r0
90 mov r6=0; mov f4=f0; mov b3=r0
91 mov r7=0; mov f5=f0; mov b4=r0
92 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
93 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
94 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
95 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
96 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
97 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
98 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
1da177e4
LT		 99 br.ret.sptk.many rp
100END(ia64_execve)
101
102/*
103 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
104 * u64 tls)
105 */
106GLOBAL_ENTRY(sys_clone2)
107 /*
108 * Allocate 8 input registers since ptrace() may clobber them
109 */
110 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
111 alloc r16=ar.pfs,8,2,6,0
112 DO_SAVE_SWITCH_STACK
113 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
114 mov loc0=rp
115 mov loc1=r16 // save ar.pfs across do_fork
116 .body
117 mov out1=in1
e80d6661 118 mov out2=in2
1da177e4 119 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
e80d6661 120 mov out3=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
1da177e4
LT		 121 ;;
122(p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
e80d6661 123 mov out4=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
1da177e4
LT		 124 mov out0=in0 // out0 = clone_flags
125 br.call.sptk.many rp=do_fork
126.ret1: .restore sp
127 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
128 mov ar.pfs=loc1
129 mov rp=loc0
130 br.ret.sptk.many rp
131END(sys_clone2)
132
133/*
134 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
135 * Deprecated. Use sys_clone2() instead.
136 */
137GLOBAL_ENTRY(sys_clone)
138 /*
139 * Allocate 8 input registers since ptrace() may clobber them
140 */
141 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
142 alloc r16=ar.pfs,8,2,6,0
143 DO_SAVE_SWITCH_STACK
144 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
145 mov loc0=rp
146 mov loc1=r16 // save ar.pfs across do_fork
147 .body
148 mov out1=in1
e80d6661 149 mov out2=16 // stacksize (compensates for 16-byte scratch area)
1da177e4 150 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
e80d6661 151 mov out3=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
1da177e4
LT		 152 ;;
153(p6) st8 [r2]=in4 // store TLS in r13 (tp)
e80d6661 154 mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
1da177e4
LT		 155 mov out0=in0 // out0 = clone_flags
156 br.call.sptk.many rp=do_fork
157.ret2: .restore sp
158 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
159 mov ar.pfs=loc1
160 mov rp=loc0
161 br.ret.sptk.many rp
162END(sys_clone)
163
164/*
165 * prev_task <- ia64_switch_to(struct task_struct *next)
166 * With Ingo's new scheduler, interrupts are disabled when this routine gets
167 * called. The code starting at .map relies on this. The rest of the code
168 * doesn't care about the interrupt masking status.
169 */
e55645ec 170GLOBAL_ENTRY(ia64_switch_to)
1da177e4
LT		 171 .prologue
172 alloc r16=ar.pfs,1,0,0,0
173 DO_SAVE_SWITCH_STACK
174 .body
175
176 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
177 movl r25=init_task
178 mov r27=IA64_KR(CURRENT_STACK)
179 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
180 dep r20=0,in0,61,3 // physical address of "next"
181 ;;
182 st8 [r22]=sp // save kernel stack pointer of old task
183 shr.u r26=r20,IA64_GRANULE_SHIFT
184 cmp.eq p7,p6=r25,in0
185 ;;
186 /*
187 * If we've already mapped this task's page, we can skip doing it again.
188 */
189(p6) cmp.eq p7,p6=r26,r27
190(p6) br.cond.dpnt .map
191 ;;
192.done:
1da177e4 193 ld8 sp=[r21] // load kernel stack pointer of new task
4df8d22b 194 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
1da177e4
LT		 195 mov r8=r13 // return pointer to previously running task
196 mov r13=in0 // set "current" pointer
197 ;;
198 DO_LOAD_SWITCH_STACK
199
200#ifdef CONFIG_SMP
201 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
202#endif
203 br.ret.sptk.many rp // boogie on out in new context
204
205.map:
4df8d22b 206 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
1da177e4
LT		 207 movl r25=PAGE_KERNEL
208 ;;
209 srlz.d
210 or r23=r25,r20 // construct PA | page properties
211 mov r25=IA64_GRANULE_SHIFT<<2
212 ;;
4df8d22b
IY		 213 MOV_TO_ITIR(p0, r25, r8)
214 MOV_TO_IFA(in0, r8) // VA of next task...
1da177e4
LT		 215 ;;
216 mov r25=IA64_TR_CURRENT_STACK
4df8d22b 217 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
1da177e4
LT		 218 ;;
219 itr.d dtr[r25]=r23 // wire in new mapping...
4df8d22b 220 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
1da177e4 221 br.cond.sptk .done
e55645ec 222END(ia64_switch_to)
1da177e4
LT		 223
224/*
225 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
226 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
227 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
228 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
229 * problem. Also, we don't need to specify unwind information for preserved registers
230 * that are not modified in save_switch_stack as the right unwind information is already
231 * specified at the call-site of save_switch_stack.
232 */
233
234/*
235 * save_switch_stack:
236 * - r16 holds ar.pfs
237 * - b7 holds address to return to
238 * - rp (b0) holds return address to save
239 */
240GLOBAL_ENTRY(save_switch_stack)
241 .prologue
242 .altrp b7
243 flushrs // flush dirty regs to backing store (must be first in insn group)
244 .save @priunat,r17
245 mov r17=ar.unat // preserve caller's
246 .body
247#ifdef CONFIG_ITANIUM
248 adds r2=16+128,sp
249 adds r3=16+64,sp
250 adds r14=SW(R4)+16,sp
251 ;;
252 st8.spill [r14]=r4,16 // spill r4
253 lfetch.fault.excl.nt1 [r3],128
254 ;;
255 lfetch.fault.excl.nt1 [r2],128
256 lfetch.fault.excl.nt1 [r3],128
257 ;;
258 lfetch.fault.excl [r2]
259 lfetch.fault.excl [r3]
260 adds r15=SW(R5)+16,sp
261#else
262 add r2=16+3*128,sp
263 add r3=16,sp
264 add r14=SW(R4)+16,sp
265 ;;
266 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
267 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
268 ;;
269 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
270 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
271 ;;
272 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
273 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
274 adds r15=SW(R5)+16,sp
275#endif
276 ;;
277 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
278 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
279 add r2=SW(F2)+16,sp // r2 = &sw->f2
280 ;;
281 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
282 mov.m r18=ar.fpsr // preserve fpsr
283 add r3=SW(F3)+16,sp // r3 = &sw->f3
284 ;;
285 stf.spill [r2]=f2,32
286 mov.m r19=ar.rnat
287 mov r21=b0
288
289 stf.spill [r3]=f3,32
290 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
291 mov r22=b1
292 ;;
293 // since we're done with the spills, read and save ar.unat:
294 mov.m r29=ar.unat
295 mov.m r20=ar.bspstore
296 mov r23=b2
297 stf.spill [r2]=f4,32
298 stf.spill [r3]=f5,32
299 mov r24=b3
300 ;;
301 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
302 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
303 mov r25=b4
304 mov r26=b5
305 ;;
306 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
307 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
308 mov r21=ar.lc // I-unit
309 stf.spill [r2]=f12,32
310 stf.spill [r3]=f13,32
311 ;;
312 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
313 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
314 stf.spill [r2]=f14,32
315 stf.spill [r3]=f15,32
316 ;;
317 st8 [r14]=r26 // save b5
318 st8 [r15]=r21 // save ar.lc
319 stf.spill [r2]=f16,32
320 stf.spill [r3]=f17,32
321 ;;
322 stf.spill [r2]=f18,32
323 stf.spill [r3]=f19,32
324 ;;
325 stf.spill [r2]=f20,32
326 stf.spill [r3]=f21,32
327 ;;
328 stf.spill [r2]=f22,32
329 stf.spill [r3]=f23,32
330 ;;
331 stf.spill [r2]=f24,32
332 stf.spill [r3]=f25,32
333 ;;
334 stf.spill [r2]=f26,32
335 stf.spill [r3]=f27,32
336 ;;
337 stf.spill [r2]=f28,32
338 stf.spill [r3]=f29,32
339 ;;
340 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
341 stf.spill [r3]=f31,SW(PR)-SW(F31)
342 add r14=SW(CALLER_UNAT)+16,sp
343 ;;
344 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
345 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
346 mov r21=pr
347 ;;
348 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
349 st8 [r3]=r21 // save predicate registers
350 ;;
351 st8 [r2]=r20 // save ar.bspstore
352 st8 [r14]=r18 // save fpsr
353 mov ar.rsc=3 // put RSE back into eager mode, pl 0
354 br.cond.sptk.many b7
355END(save_switch_stack)
356
357/*
358 * load_switch_stack:
359 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
360 * - b7 holds address to return to
361 * - must not touch r8-r11
362 */
4df8d22b 363GLOBAL_ENTRY(load_switch_stack)
1da177e4
LT		 364 .prologue
365 .altrp b7
366
367 .body
368 lfetch.fault.nt1 [sp]
369 adds r2=SW(AR_BSPSTORE)+16,sp
370 adds r3=SW(AR_UNAT)+16,sp
371 mov ar.rsc=0 // put RSE into enforced lazy mode
372 adds r14=SW(CALLER_UNAT)+16,sp
373 adds r15=SW(AR_FPSR)+16,sp
374 ;;
375 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
376 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
377 ;;
378 ld8 r21=[r2],16 // restore b0
379 ld8 r22=[r3],16 // restore b1
380 ;;
381 ld8 r23=[r2],16 // restore b2
382 ld8 r24=[r3],16 // restore b3
383 ;;
384 ld8 r25=[r2],16 // restore b4
385 ld8 r26=[r3],16 // restore b5
386 ;;
387 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
388 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
389 ;;
390 ld8 r28=[r2] // restore pr
391 ld8 r30=[r3] // restore rnat
392 ;;
393 ld8 r18=[r14],16 // restore caller's unat
394 ld8 r19=[r15],24 // restore fpsr
395 ;;
396 ldf.fill f2=[r14],32
397 ldf.fill f3=[r15],32
398 ;;
399 ldf.fill f4=[r14],32
400 ldf.fill f5=[r15],32
401 ;;
402 ldf.fill f12=[r14],32
403 ldf.fill f13=[r15],32
404 ;;
405 ldf.fill f14=[r14],32
406 ldf.fill f15=[r15],32
407 ;;
408 ldf.fill f16=[r14],32
409 ldf.fill f17=[r15],32
410 ;;
411 ldf.fill f18=[r14],32
412 ldf.fill f19=[r15],32
413 mov b0=r21
414 ;;
415 ldf.fill f20=[r14],32
416 ldf.fill f21=[r15],32
417 mov b1=r22
418 ;;
419 ldf.fill f22=[r14],32
420 ldf.fill f23=[r15],32
421 mov b2=r23
422 ;;
423 mov ar.bspstore=r27
424 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
425 mov b3=r24
426 ;;
427 ldf.fill f24=[r14],32
428 ldf.fill f25=[r15],32
429 mov b4=r25
430 ;;
431 ldf.fill f26=[r14],32
432 ldf.fill f27=[r15],32
433 mov b5=r26
434 ;;
435 ldf.fill f28=[r14],32
436 ldf.fill f29=[r15],32
437 mov ar.pfs=r16
438 ;;
439 ldf.fill f30=[r14],32
440 ldf.fill f31=[r15],24
441 mov ar.lc=r17
442 ;;
443 ld8.fill r4=[r14],16
444 ld8.fill r5=[r15],16
445 mov pr=r28,-1
446 ;;
447 ld8.fill r6=[r14],16
448 ld8.fill r7=[r15],16
449
450 mov ar.unat=r18 // restore caller's unat
451 mov ar.rnat=r30 // must restore after bspstore but before rsc!
452 mov ar.fpsr=r19 // restore fpsr
453 mov ar.rsc=3 // put RSE back into eager mode, pl 0
454 br.cond.sptk.many b7
455END(load_switch_stack)
456
383f2835
CK		 457GLOBAL_ENTRY(prefetch_stack)
458 add r14 = -IA64_SWITCH_STACK_SIZE, sp
459 add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
460 ;;
461 ld8 r16 = [r15] // load next's stack pointer
462 lfetch.fault.excl [r14], 128
463 ;;
464 lfetch.fault.excl [r14], 128
465 lfetch.fault [r16], 128
466 ;;
467 lfetch.fault.excl [r14], 128
468 lfetch.fault [r16], 128
469 ;;
470 lfetch.fault.excl [r14], 128
471 lfetch.fault [r16], 128
472 ;;
473 lfetch.fault.excl [r14], 128
474 lfetch.fault [r16], 128
475 ;;
476 lfetch.fault [r16], 128
477 br.ret.sptk.many rp
24b8e0cc 478END(prefetch_stack)
383f2835 479
1da177e4
LT		 480 /*
481 * Invoke a system call, but do some tracing before and after the call.
482 * We MUST preserve the current register frame throughout this routine
483 * because some system calls (such as ia64_execve) directly
484 * manipulate ar.pfs.
485 */
486GLOBAL_ENTRY(ia64_trace_syscall)
487 PT_REGS_UNWIND_INFO(0)
488 /*
489 * We need to preserve the scratch registers f6-f11 in case the system
490 * call is sigreturn.
491 */
492 adds r16=PT(F6)+16,sp
493 adds r17=PT(F7)+16,sp
494 ;;
495 stf.spill [r16]=f6,32
496 stf.spill [r17]=f7,32
497 ;;
498 stf.spill [r16]=f8,32
499 stf.spill [r17]=f9,32
500 ;;
501 stf.spill [r16]=f10
502 stf.spill [r17]=f11
503 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
f14488cc
SL		 504 cmp.lt p6,p0=r8,r0 // check tracehook
505 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
506 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
507 mov r10=0
508(p6) br.cond.sptk strace_error // syscall failed ->
1da177e4
LT		 509 adds r16=PT(F6)+16,sp
510 adds r17=PT(F7)+16,sp
511 ;;
512 ldf.fill f6=[r16],32
513 ldf.fill f7=[r17],32
514 ;;
515 ldf.fill f8=[r16],32
516 ldf.fill f9=[r17],32
517 ;;
518 ldf.fill f10=[r16]
519 ldf.fill f11=[r17]
520 // the syscall number may have changed, so re-load it and re-calculate the
521 // syscall entry-point:
522 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
523 ;;
524 ld8 r15=[r15]
525 mov r3=NR_syscalls - 1
526 ;;
527 adds r15=-1024,r15
528 movl r16=sys_call_table
529 ;;
530 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
531 cmp.leu p6,p7=r15,r3
532 ;;
533(p6) ld8 r20=[r20] // load address of syscall entry point
534(p7) movl r20=sys_ni_syscall
535 ;;
536 mov b6=r20
537 br.call.sptk.many rp=b6 // do the syscall
538.strace_check_retval:
539 cmp.lt p6,p0=r8,r0 // syscall failed?
540 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
541 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
542 mov r10=0
543(p6) br.cond.sptk strace_error // syscall failed ->
544 ;; // avoid RAW on r10
545.strace_save_retval:
546.mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
547.mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
548 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
6f6d7582
JS		 549.ret3:
550(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
38477ad7 551(pUStk) rsm psr.i // disable interrupts
4df8d22b 552 br.cond.sptk ia64_work_pending_syscall_end
1da177e4
LT		 553
554strace_error:
555 ld8 r3=[r2] // load pt_regs.r8
556 sub r9=0,r8 // negate return value to get errno value
557 ;;
558 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
559 adds r3=16,r2 // r3=&pt_regs.r10
560 ;;
561(p6) mov r10=-1
562(p6) mov r8=r9
563 br.cond.sptk .strace_save_retval
564END(ia64_trace_syscall)
565
566 /*
567 * When traced and returning from sigreturn, we invoke syscall_trace but then
568 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
569 */
570GLOBAL_ENTRY(ia64_strace_leave_kernel)
571 PT_REGS_UNWIND_INFO(0)
572{ /*
573 * Some versions of gas generate bad unwind info if the first instruction of a
574 * procedure doesn't go into the first slot of a bundle. This is a workaround.
575 */
576 nop.m 0
577 nop.i 0
578 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
579}
580.ret4: br.cond.sptk ia64_leave_kernel
581END(ia64_strace_leave_kernel)
582
54d496c3
AV		 583ENTRY(call_payload)
584 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0)
585 /* call the kernel_thread payload; fn is in r4, arg - in r5 */
586 alloc loc1=ar.pfs,0,3,1,0
587 mov loc0=rp
588 mov loc2=gp
589 mov out0=r5 // arg
590 ld8 r14 = [r4], 8 // fn.address
591 ;;
592 mov b6 = r14
593 ld8 gp = [r4] // fn.gp
594 ;;
595 br.call.sptk.many rp=b6 // fn(arg)
596.ret12: mov gp=loc2
597 mov rp=loc0
598 mov ar.pfs=loc1
599 /* ... and if it has returned, we are going to userland */
600 cmp.ne pKStk,pUStk=r0,r0
601 br.ret.sptk.many rp
602END(call_payload)
603
1da177e4
LT		 604GLOBAL_ENTRY(ia64_ret_from_clone)
605 PT_REGS_UNWIND_INFO(0)
606{ /*
607 * Some versions of gas generate bad unwind info if the first instruction of a
608 * procedure doesn't go into the first slot of a bundle. This is a workaround.
609 */
610 nop.m 0
611 nop.i 0
612 /*
613 * We need to call schedule_tail() to complete the scheduling process.
614 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
615 * address of the previously executing task.
616 */
617 br.call.sptk.many rp=ia64_invoke_schedule_tail
618}
619.ret8:
54d496c3 620(pKStk) br.call.sptk.many rp=call_payload
1da177e4
LT		 621 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
622 ;;
623 ld4 r2=[r2]
624 ;;
625 mov r8=0
626 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
627 ;;
628 cmp.ne p6,p0=r2,r0
629(p6) br.cond.spnt .strace_check_retval
630 ;; // added stop bits to prevent r8 dependency
631END(ia64_ret_from_clone)
632 // fall through
633GLOBAL_ENTRY(ia64_ret_from_syscall)
634 PT_REGS_UNWIND_INFO(0)
635 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
636 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
637 mov r10=r0 // clear error indication in r10
638(p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
639END(ia64_ret_from_syscall)
640 // fall through
4df8d22b 641
1da177e4
LT		 642/*
643 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
644 * need to switch to bank 0 and doesn't restore the scratch registers.
645 * To avoid leaking kernel bits, the scratch registers are set to
646 * the following known-to-be-safe values:
647 *
648 * r1: restored (global pointer)
649 * r2: cleared
650 * r3: 1 (when returning to user-level)
651 * r8-r11: restored (syscall return value(s))
652 * r12: restored (user-level stack pointer)
653 * r13: restored (user-level thread pointer)
c03f058f 654 * r14: set to __kernel_syscall_via_epc
1da177e4
LT		 655 * r15: restored (syscall #)
656 * r16-r17: cleared
657 * r18: user-level b6
658 * r19: cleared
659 * r20: user-level ar.fpsr
660 * r21: user-level b0
661 * r22: cleared
662 * r23: user-level ar.bspstore
663 * r24: user-level ar.rnat
664 * r25: user-level ar.unat
665 * r26: user-level ar.pfs
666 * r27: user-level ar.rsc
667 * r28: user-level ip
668 * r29: user-level psr
669 * r30: user-level cfm
670 * r31: user-level pr
671 * f6-f11: cleared
672 * pr: restored (user-level pr)
673 * b0: restored (user-level rp)
674 * b6: restored
c03f058f 675 * b7: set to __kernel_syscall_via_epc
1da177e4
LT		 676 * ar.unat: restored (user-level ar.unat)
677 * ar.pfs: restored (user-level ar.pfs)
678 * ar.rsc: restored (user-level ar.rsc)
679 * ar.rnat: restored (user-level ar.rnat)
680 * ar.bspstore: restored (user-level ar.bspstore)
681 * ar.fpsr: restored (user-level ar.fpsr)
682 * ar.ccv: cleared
683 * ar.csd: cleared
684 * ar.ssd: cleared
685 */
e55645ec 686GLOBAL_ENTRY(ia64_leave_syscall)
1da177e4
LT		 687 PT_REGS_UNWIND_INFO(0)
688 /*
689 * work.need_resched etc. mustn't get changed by this CPU before it returns to
690 * user- or fsys-mode, hence we disable interrupts early on.
691 *
692 * p6 controls whether current_thread_info()->flags needs to be check for
693 * extra work. We always check for extra work when returning to user-level.
694 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
695 * is 0. After extra work processing has been completed, execution
4df8d22b 696 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
1da177e4
LT		 697 * needs to be redone.
698 */
699#ifdef CONFIG_PREEMPT
4df8d22b 700 RSM_PSR_I(p0, r2, r18) // disable interrupts
1da177e4
LT		 701 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
702(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
703 ;;
704 .pred.rel.mutex pUStk,pKStk
705(pKStk) ld4 r21=[r20] // r21 <- preempt_count
706(pUStk) mov r21=0 // r21 <- 0
707 ;;
708 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
709#else /* !CONFIG_PREEMPT */
4df8d22b 710 RSM_PSR_I(pUStk, r2, r18)
1da177e4
LT		 711 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
712(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
713#endif
e55645ec
LR		 714.global ia64_work_processed_syscall;
715ia64_work_processed_syscall:
abf917cd 716#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd 717 adds r2=PT(LOADRS)+16,r12
94752a79 718 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
b64f34cd
HS		 719 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
720 ;;
721(p6) ld4 r31=[r18] // load current_thread_info()->flags
722 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
723 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
724 ;;
725#else
1da177e4
LT		 726 adds r2=PT(LOADRS)+16,r12
727 adds r3=PT(AR_BSPSTORE)+16,r12
728 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
729 ;;
730(p6) ld4 r31=[r18] // load current_thread_info()->flags
731 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
96e01749 732 nop.i 0
1da177e4 733 ;;
b64f34cd 734#endif
87e522a0 735 mov r16=ar.bsp // M2 get existing backing store pointer
1da177e4
LT		 736 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
737(p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
738 ;;
87e522a0 739 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
1da177e4
LT		 740(p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
741(p6) br.cond.spnt .work_pending_syscall
742 ;;
743 // start restoring the state saved on the kernel stack (struct pt_regs):
744 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
745 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
87e522a0 746(pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
1da177e4
LT		 747 ;;
748 invala // M0|1 invalidate ALAT
4df8d22b 749 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
c03f058f 750 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
1da177e4 751
c03f058f
DMT		 752 ld8 r29=[r2],16 // M0|1 load cr.ipsr
753 ld8 r28=[r3],16 // M0|1 load cr.iip
abf917cd 754#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd
HS		 755(pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
756 ;;
757 ld8 r30=[r2],16 // M0|1 load cr.ifs
758 ld8 r25=[r3],16 // M0|1 load ar.unat
759(pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
760 ;;
761#else
c03f058f 762 mov r22=r0 // A clear r22
1da177e4
LT		 763 ;;
764 ld8 r30=[r2],16 // M0|1 load cr.ifs
1da177e4 765 ld8 r25=[r3],16 // M0|1 load ar.unat
87e522a0 766(pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
1da177e4 767 ;;
b64f34cd 768#endif
1da177e4 769 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
4df8d22b 770 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
87e522a0 771 nop 0
1da177e4 772 ;;
c03f058f
DMT		 773 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
774 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
775 mov f6=f0 // F clear f6
1da177e4 776 ;;
c03f058f
DMT		 777 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
778 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
779 mov f7=f0 // F clear f7
1da177e4 780 ;;
c03f058f
DMT		 781 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
782 ld8.fill r1=[r3],16 // M0|1 load r1
783(pUStk) mov r17=1 // A
1da177e4 784 ;;
abf917cd 785#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd
HS		 786(pUStk) st1 [r15]=r17 // M2|3
787#else
c03f058f 788(pUStk) st1 [r14]=r17 // M2|3
b64f34cd 789#endif
c03f058f
DMT		 790 ld8.fill r13=[r3],16 // M0|1
791 mov f8=f0 // F clear f8
1da177e4 792 ;;
c03f058f
DMT		 793 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
794 ld8.fill r15=[r3] // M0|1 restore r15
795 mov b6=r18 // I0 restore b6
30325d17 796
a0776ec8 797 LOAD_PHYS_STACK_REG_SIZE(r17)
c03f058f
DMT		 798 mov f9=f0 // F clear f9
799(pKStk) br.cond.dpnt.many skip_rbs_switch // B
87e522a0 800
c03f058f
DMT		 801 srlz.d // M0 ensure interruption collection is off (for cover)
802 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
4df8d22b 803 COVER // B add current frame into dirty partition & set cr.ifs
1da177e4 804 ;;
abf917cd 805#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd
HS		 806 mov r19=ar.bsp // M2 get new backing store pointer
807 st8 [r14]=r22 // M save time at leave
808 mov f10=f0 // F clear f10
809
810 mov r22=r0 // A clear r22
811 movl r14=__kernel_syscall_via_epc // X
812 ;;
813#else
c03f058f
DMT		 814 mov r19=ar.bsp // M2 get new backing store pointer
815 mov f10=f0 // F clear f10
96e01749
DMT		 816
817 nop.m 0
c03f058f 818 movl r14=__kernel_syscall_via_epc // X
1da177e4 819 ;;
b64f34cd 820#endif
c03f058f
DMT		 821 mov.m ar.csd=r0 // M2 clear ar.csd
822 mov.m ar.ccv=r0 // M2 clear ar.ccv
823 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
1da177e4 824
c03f058f
DMT		 825 mov.m ar.ssd=r0 // M2 clear ar.ssd
826 mov f11=f0 // F clear f11
827 br.cond.sptk.many rbs_switch // B
e55645ec 828END(ia64_leave_syscall)
1da177e4 829
e55645ec 830GLOBAL_ENTRY(ia64_leave_kernel)
1da177e4
LT		 831 PT_REGS_UNWIND_INFO(0)
832 /*
833 * work.need_resched etc. mustn't get changed by this CPU before it returns to
834 * user- or fsys-mode, hence we disable interrupts early on.
835 *
836 * p6 controls whether current_thread_info()->flags needs to be check for
837 * extra work. We always check for extra work when returning to user-level.
838 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
839 * is 0. After extra work processing has been completed, execution
840 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
841 * needs to be redone.
842 */
843#ifdef CONFIG_PREEMPT
4df8d22b 844 RSM_PSR_I(p0, r17, r31) // disable interrupts
1da177e4
LT		 845 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
846(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
847 ;;
848 .pred.rel.mutex pUStk,pKStk
849(pKStk) ld4 r21=[r20] // r21 <- preempt_count
850(pUStk) mov r21=0 // r21 <- 0
851 ;;
852 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
853#else
4df8d22b 854 RSM_PSR_I(pUStk, r17, r31)
1da177e4
LT		 855 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
856(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
857#endif
858.work_processed_kernel:
859 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
860 ;;
861(p6) ld4 r31=[r17] // load current_thread_info()->flags
862 adds r21=PT(PR)+16,r12
863 ;;
864
865 lfetch [r21],PT(CR_IPSR)-PT(PR)
866 adds r2=PT(B6)+16,r12
867 adds r3=PT(R16)+16,r12
868 ;;
869 lfetch [r21]
870 ld8 r28=[r2],8 // load b6
871 adds r29=PT(R24)+16,r12
872
873 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
874 adds r30=PT(AR_CCV)+16,r12
875(p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
876 ;;
877 ld8.fill r24=[r29]
878 ld8 r15=[r30] // load ar.ccv
879(p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
880 ;;
881 ld8 r29=[r2],16 // load b7
882 ld8 r30=[r3],16 // load ar.csd
883(p6) br.cond.spnt .work_pending
884 ;;
885 ld8 r31=[r2],16 // load ar.ssd
886 ld8.fill r8=[r3],16
887 ;;
888 ld8.fill r9=[r2],16
889 ld8.fill r10=[r3],PT(R17)-PT(R10)
890 ;;
891 ld8.fill r11=[r2],PT(R18)-PT(R11)
892 ld8.fill r17=[r3],16
893 ;;
894 ld8.fill r18=[r2],16
895 ld8.fill r19=[r3],16
896 ;;
897 ld8.fill r20=[r2],16
898 ld8.fill r21=[r3],16
899 mov ar.csd=r30
900 mov ar.ssd=r31
901 ;;
4df8d22b 902 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
1da177e4
LT		 903 invala // invalidate ALAT
904 ;;
905 ld8.fill r22=[r2],24
906 ld8.fill r23=[r3],24
907 mov b6=r28
908 ;;
909 ld8.fill r25=[r2],16
910 ld8.fill r26=[r3],16
911 mov b7=r29
912 ;;
913 ld8.fill r27=[r2],16
914 ld8.fill r28=[r3],16
915 ;;
916 ld8.fill r29=[r2],16
917 ld8.fill r30=[r3],24
918 ;;
919 ld8.fill r31=[r2],PT(F9)-PT(R31)
920 adds r3=PT(F10)-PT(F6),r3
921 ;;
922 ldf.fill f9=[r2],PT(F6)-PT(F9)
923 ldf.fill f10=[r3],PT(F8)-PT(F10)
924 ;;
925 ldf.fill f6=[r2],PT(F7)-PT(F6)
926 ;;
927 ldf.fill f7=[r2],PT(F11)-PT(F7)
928 ldf.fill f8=[r3],32
929 ;;
e7e965fa 930 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1da177e4
LT		 931 mov ar.ccv=r15
932 ;;
933 ldf.fill f11=[r2]
4df8d22b 934 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
1da177e4
LT		 935 ;;
936(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
937 adds r16=PT(CR_IPSR)+16,r12
938 adds r17=PT(CR_IIP)+16,r12
939
abf917cd 940#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd 941 .pred.rel.mutex pUStk,pKStk
4df8d22b 942 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
94752a79 943 MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
b64f34cd
HS		 944 nop.i 0
945 ;;
946#else
4df8d22b 947 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
1da177e4
LT		 948 nop.i 0
949 nop.i 0
950 ;;
b64f34cd 951#endif
1da177e4
LT		 952 ld8 r29=[r16],16 // load cr.ipsr
953 ld8 r28=[r17],16 // load cr.iip
954 ;;
955 ld8 r30=[r16],16 // load cr.ifs
956 ld8 r25=[r17],16 // load ar.unat
957 ;;
958 ld8 r26=[r16],16 // load ar.pfs
959 ld8 r27=[r17],16 // load ar.rsc
960 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
961 ;;
962 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
963 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
964 ;;
965 ld8 r31=[r16],16 // load predicates
966 ld8 r21=[r17],16 // load b0
967 ;;
968 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
969 ld8.fill r1=[r17],16 // load r1
970 ;;
971 ld8.fill r12=[r16],16
972 ld8.fill r13=[r17],16
abf917cd 973#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd
HS		 974(pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
975#else
1da177e4 976(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
b64f34cd 977#endif
1da177e4
LT		 978 ;;
979 ld8 r20=[r16],16 // ar.fpsr
980 ld8.fill r15=[r17],16
abf917cd 981#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd
HS		 982(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
983#endif
1da177e4
LT		 984 ;;
985 ld8.fill r14=[r16],16
986 ld8.fill r2=[r17]
987(pUStk) mov r17=1
988 ;;
abf917cd 989#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
b64f34cd
HS		 990 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
991 // mib : mov add br -> mib : ld8 add br
992 // bbb_ : br nop cover;; mbb_ : mov br cover;;
993 //
994 // no one require bsp in r16 if (pKStk) branch is selected.
995(pUStk) st8 [r3]=r22 // save time at leave
996(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
997 shr.u r18=r19,16 // get byte size of existing "dirty" partition
998 ;;
999 ld8.fill r3=[r16] // deferred
1000 LOAD_PHYS_STACK_REG_SIZE(r17)
1001(pKStk) br.cond.dpnt skip_rbs_switch
1002 mov r16=ar.bsp // get existing backing store pointer
1003#else
1da177e4
LT		 1004 ld8.fill r3=[r16]
1005(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1006 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1007 ;;
1008 mov r16=ar.bsp // get existing backing store pointer
a0776ec8 1009 LOAD_PHYS_STACK_REG_SIZE(r17)
1da177e4 1010(pKStk) br.cond.dpnt skip_rbs_switch
b64f34cd 1011#endif
1da177e4
LT		 1012
1013 /*
1014 * Restore user backing store.
1015 *
1016 * NOTE: alloc, loadrs, and cover can't be predicated.
1017 */
1018(pNonSys) br.cond.dpnt dont_preserve_current_frame
4df8d22b 1019 COVER // add current frame into dirty partition and set cr.ifs
1da177e4
LT		 1020 ;;
1021 mov r19=ar.bsp // get new backing store pointer
87e522a0 1022rbs_switch:
1da177e4
LT		 1023 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1024 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1025 ;;
1026 sub r19=r19,r16 // calculate total byte size of dirty partition
1027 add r18=64,r18 // don't force in0-in7 into memory...
1028 ;;
1029 shl r19=r19,16 // shift size of dirty partition into loadrs position
1030 ;;
1031dont_preserve_current_frame:
1032 /*
1033 * To prevent leaking bits between the kernel and user-space,
1034 * we must clear the stacked registers in the "invalid" partition here.
1035 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1036 * 5 registers/cycle on McKinley).
1037 */
1038# define pRecurse p6
1039# define pReturn p7
1040#ifdef CONFIG_ITANIUM
1041# define Nregs 10
1042#else
1043# define Nregs 14
1044#endif
1045 alloc loc0=ar.pfs,2,Nregs-2,2,0
1046 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1047 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1048 ;;
1049 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1050 shladd in0=loc1,3,r17
1051 mov in1=0
1052 ;;
1053 TEXT_ALIGN(32)
1054rse_clear_invalid:
1055#ifdef CONFIG_ITANIUM
1056 // cycle 0
1057 { .mii
1058 alloc loc0=ar.pfs,2,Nregs-2,2,0
1059 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1060 add out0=-Nregs*8,in0
1061}{ .mfb
1062 add out1=1,in1 // increment recursion count
1063 nop.f 0
1064 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1065 ;;
1066}{ .mfi // cycle 1
1067 mov loc1=0
1068 nop.f 0
1069 mov loc2=0
1070}{ .mib
1071 mov loc3=0
1072 mov loc4=0
1073(pRecurse) br.call.sptk.many b0=rse_clear_invalid
1074
1075}{ .mfi // cycle 2
1076 mov loc5=0
1077 nop.f 0
1078 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1079}{ .mib
1080 mov loc6=0
1081 mov loc7=0
1082(pReturn) br.ret.sptk.many b0
1083}
1084#else /* !CONFIG_ITANIUM */
1085 alloc loc0=ar.pfs,2,Nregs-2,2,0
1086 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1087 add out0=-Nregs*8,in0
1088 add out1=1,in1 // increment recursion count
1089 mov loc1=0
1090 mov loc2=0
1091 ;;
1092 mov loc3=0
1093 mov loc4=0
1094 mov loc5=0
1095 mov loc6=0
1096 mov loc7=0
9ec1a7ad 1097(pRecurse) br.call.dptk.few b0=rse_clear_invalid
1da177e4
LT		 1098 ;;
1099 mov loc8=0
1100 mov loc9=0
1101 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1102 mov loc10=0
1103 mov loc11=0
9ec1a7ad 1104(pReturn) br.ret.dptk.many b0
1da177e4
LT		 1105#endif /* !CONFIG_ITANIUM */
1106# undef pRecurse
1107# undef pReturn
1108 ;;
1109 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1110 ;;
1111 loadrs
1112 ;;
1113skip_rbs_switch:
1114 mov ar.unat=r25 // M2
1115(pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1116(pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1117 ;;
1118(pUStk) mov ar.bspstore=r23 // M2
1119(pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1120(pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1121 ;;
4df8d22b 1122 MOV_TO_IPSR(p0, r29, r25) // M2
1da177e4
LT		 1123 mov ar.pfs=r26 // I0
1124(pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1125
4df8d22b 1126 MOV_TO_IFS(p9, r30, r25)// M2
1da177e4
LT		 1127 mov b0=r21 // I0
1128(pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1129
1130 mov ar.fpsr=r20 // M2
4df8d22b 1131 MOV_TO_IIP(r28, r25) // M2
1da177e4
LT		 1132 nop 0
1133 ;;
1134(pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1135 nop 0
1136(pLvSys)mov r2=r0
1137
1138 mov ar.rsc=r27 // M2
1139 mov pr=r31,-1 // I0
4df8d22b 1140 RFI // B
1da177e4
LT		 1141
1142 /*
1143 * On entry:
1144 * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1145 * r31 = current->thread_info->flags
1146 * On exit:
1147 * p6 = TRUE if work-pending-check needs to be redone
3633c730
HS		 1148 *
1149 * Interrupts are disabled on entry, reenabled depend on work, and
1150 * disabled on exit.
1da177e4
LT		 1151 */
1152.work_pending_syscall:
1153 add r2=-8,r2
1154 add r3=-8,r3
1155 ;;
1156 st8 [r2]=r8
1157 st8 [r3]=r10
1158.work_pending:
2e513fe4 1159 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
1da177e4 1160(p6) br.cond.sptk.few .notify
aa0d5326 1161 br.call.spnt.many rp=preempt_schedule_irq
2e513fe4 1162.ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
e55645ec 1163(pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end
2e513fe4 1164 br.cond.sptk.many .work_processed_kernel
1da177e4
LT		 1165
1166.notify:
1167(pUStk) br.call.spnt.many rp=notify_resume_user
2e513fe4 1168.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
e55645ec 1169(pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end
2e513fe4 1170 br.cond.sptk.many .work_processed_kernel
1da177e4 1171
e55645ec
LR		 1172.global ia64_work_pending_syscall_end;
1173ia64_work_pending_syscall_end:
1da177e4
LT		 1174 adds r2=PT(R8)+16,r12
1175 adds r3=PT(R10)+16,r12
1176 ;;
1177 ld8 r8=[r2]
1178 ld8 r10=[r3]
e55645ec
LR		 1179 br.cond.sptk.many ia64_work_processed_syscall
1180END(ia64_leave_kernel)
1da177e4
LT		 1181
1182ENTRY(handle_syscall_error)
1183 /*
1184 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1185 * lead us to mistake a negative return value as a failed syscall. Those syscall
1186 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1187 * pt_regs.r8 is zero, we assume that the call completed successfully.
1188 */
1189 PT_REGS_UNWIND_INFO(0)
1190 ld8 r3=[r2] // load pt_regs.r8
1191 ;;
1192 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1193 ;;
1194(p7) mov r10=-1
1195(p7) sub r8=0,r8 // negate return value to get errno
1196 br.cond.sptk ia64_leave_syscall
1197END(handle_syscall_error)
1198
1199 /*
1200 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1201 * in case a system call gets restarted.
1202 */
1203GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1204 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1205 alloc loc1=ar.pfs,8,2,1,0
1206 mov loc0=rp
1207 mov out0=r8 // Address of previous task
1208 ;;
1209 br.call.sptk.many rp=schedule_tail
1210.ret11: mov ar.pfs=loc1
1211 mov rp=loc0
1212 br.ret.sptk.many rp
1213END(ia64_invoke_schedule_tail)
1214
1215 /*
3633c730
HS		 1216 * Setup stack and call do_notify_resume_user(), keeping interrupts
1217 * disabled.
1218 *
1219 * Note that pSys and pNonSys need to be set up by the caller.
1220 * We declare 8 input registers so the system call args get preserved,
1221 * in case we need to restart a system call.
1da177e4 1222 */
4df8d22b 1223GLOBAL_ENTRY(notify_resume_user)
1da177e4
LT		 1224 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1225 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1226 mov r9=ar.unat
1227 mov loc0=rp // save return address
1228 mov out0=0 // there is no "oldset"
1229 adds out1=8,sp // out1=&sigscratch->ar_pfs
1230(pSys) mov out2=1 // out2==1 => we're in a syscall
1231 ;;
1232(pNonSys) mov out2=0 // out2==0 => not a syscall
1233 .fframe 16
bfd68594 1234 .spillsp ar.unat, 16
1da177e4
LT		 1235 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1236 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1237 .body
1238 br.call.sptk.many rp=do_notify_resume_user
1239.ret15: .restore sp
1240 adds sp=16,sp // pop scratch stack space
1241 ;;
1242 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1243 mov rp=loc0
1244 ;;
1245 mov ar.unat=r9
1246 mov ar.pfs=loc1
1247 br.ret.sptk.many rp
1248END(notify_resume_user)
1249
1da177e4
LT		 1250ENTRY(sys_rt_sigreturn)
1251 PT_REGS_UNWIND_INFO(0)
1252 /*
1253 * Allocate 8 input registers since ptrace() may clobber them
1254 */
1255 alloc r2=ar.pfs,8,0,1,0
1256 .prologue
1257 PT_REGS_SAVES(16)
1258 adds sp=-16,sp
1259 .body
1260 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1261 ;;
1262 /*
1263 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1264 * syscall-entry path does not save them we save them here instead. Note: we
1265 * don't need to save any other registers that are not saved by the stream-lined
1266 * syscall path, because restore_sigcontext() restores them.
1267 */
1268 adds r16=PT(F6)+32,sp
1269 adds r17=PT(F7)+32,sp
1270 ;;
1271 stf.spill [r16]=f6,32
1272 stf.spill [r17]=f7,32
1273 ;;
1274 stf.spill [r16]=f8,32
1275 stf.spill [r17]=f9,32
1276 ;;
1277 stf.spill [r16]=f10
1278 stf.spill [r17]=f11
1279 adds out0=16,sp // out0 = &sigscratch
1280 br.call.sptk.many rp=ia64_rt_sigreturn
763b3917 1281.ret19: .restore sp,0
1da177e4
LT		 1282 adds sp=16,sp
1283 ;;
1284 ld8 r9=[sp] // load new ar.unat
e55645ec 1285 mov.sptk b7=r8,ia64_leave_kernel
1da177e4
LT		 1286 ;;
1287 mov ar.unat=r9
1288 br.many b7
1289END(sys_rt_sigreturn)
1290
1291GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1292 .prologue
1293 /*
1294 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1295 */
1296 mov r16=r0
1297 DO_SAVE_SWITCH_STACK
1298 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1299.ret21: .body
1300 DO_LOAD_SWITCH_STACK
1301 br.cond.sptk.many rp // goes to ia64_leave_kernel
1302END(ia64_prepare_handle_unaligned)
1303
1304 //
1305 // unw_init_running(void (*callback)(info, arg), void *arg)
1306 //
1307# define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1308
1309GLOBAL_ENTRY(unw_init_running)
1310 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1311 alloc loc1=ar.pfs,2,3,3,0
1312 ;;
1313 ld8 loc2=[in0],8
1314 mov loc0=rp
1315 mov r16=loc1
1316 DO_SAVE_SWITCH_STACK
1317 .body
1318
1319 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1320 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1321 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1322 adds sp=-EXTRA_FRAME_SIZE,sp
1323 .body
1324 ;;
1325 adds out0=16,sp // &info
1326 mov out1=r13 // current
1327 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1328 br.call.sptk.many rp=unw_init_frame_info
13291: adds out0=16,sp // &info
1330 mov b6=loc2
1331 mov loc2=gp // save gp across indirect function call
1332 ;;
1333 ld8 gp=[in0]
1334 mov out1=in1 // arg
1335 br.call.sptk.many rp=b6 // invoke the callback function
13361: mov gp=loc2 // restore gp
1337
1338 // For now, we don't allow changing registers from within
1339 // unw_init_running; if we ever want to allow that, we'd
1340 // have to do a load_switch_stack here:
1341 .restore sp
1342 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1343
1344 mov ar.pfs=loc1
1345 mov rp=loc0
1346 br.ret.sptk.many rp
1347END(unw_init_running)
1348
d3e75ff1 1349#ifdef CONFIG_FUNCTION_TRACER
a14a07b8
SL		 1350#ifdef CONFIG_DYNAMIC_FTRACE
1351GLOBAL_ENTRY(_mcount)
1352 br ftrace_stub
1353END(_mcount)
1354
1355.here:
1356 br.ret.sptk.many b0
1357
1358GLOBAL_ENTRY(ftrace_caller)
1359 alloc out0 = ar.pfs, 8, 0, 4, 0
1360 mov out3 = r0
1361 ;;
1362 mov out2 = b0
1363 add r3 = 0x20, r3
1364 mov out1 = r1;
1365 br.call.sptk.many b0 = ftrace_patch_gp
1366 //this might be called from module, so we must patch gp
1367ftrace_patch_gp:
1368 movl gp=__gp
1369 mov b0 = r3
1370 ;;
1371.global ftrace_call;
1372ftrace_call:
1373{
1374 .mlx
1375 nop.m 0x0
1376 movl r3 = .here;;
1377}
1378 alloc loc0 = ar.pfs, 4, 4, 2, 0
1379 ;;
1380 mov loc1 = b0
1381 mov out0 = b0
1382 mov loc2 = r8
1383 mov loc3 = r15
1384 ;;
1385 adds out0 = -MCOUNT_INSN_SIZE, out0
1386 mov out1 = in2
1387 mov b6 = r3
1388
1389 br.call.sptk.many b0 = b6
1390 ;;
1391 mov ar.pfs = loc0
1392 mov b0 = loc1
1393 mov r8 = loc2
1394 mov r15 = loc3
1395 br ftrace_stub
1396 ;;
1397END(ftrace_caller)
1398
1399#else
d3e75ff1
SL		 1400GLOBAL_ENTRY(_mcount)
1401 movl r2 = ftrace_stub
1402 movl r3 = ftrace_trace_function;;
1403 ld8 r3 = [r3];;
1404 ld8 r3 = [r3];;
1405 cmp.eq p7,p0 = r2, r3
1406(p7) br.sptk.many ftrace_stub
1407 ;;
1408
1409 alloc loc0 = ar.pfs, 4, 4, 2, 0
1410 ;;
1411 mov loc1 = b0
1412 mov out0 = b0
1413 mov loc2 = r8
1414 mov loc3 = r15
1415 ;;
1416 adds out0 = -MCOUNT_INSN_SIZE, out0
1417 mov out1 = in2
1418 mov b6 = r3
1419
1420 br.call.sptk.many b0 = b6
1421 ;;
1422 mov ar.pfs = loc0
1423 mov b0 = loc1
1424 mov r8 = loc2
1425 mov r15 = loc3
1426 br ftrace_stub
1427 ;;
1428END(_mcount)
a14a07b8 1429#endif
d3e75ff1
SL		 1430
1431GLOBAL_ENTRY(ftrace_stub)
1432 mov r3 = b0
1433 movl r2 = _mcount_ret_helper
1434 ;;
1435 mov b6 = r2
1436 mov b7 = r3
1437 br.ret.sptk.many b6
1438
1439_mcount_ret_helper:
1440 mov b0 = r42
1441 mov r1 = r41
1442 mov ar.pfs = r40
1443 br b7
1444END(ftrace_stub)
1445
1446#endif /* CONFIG_FUNCTION_TRACER */
1447
1da177e4
LT		 1448 .rodata
1449 .align 8
1450 .globl sys_call_table
1451sys_call_table:
1452 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1453 data8 sys_exit // 1025
1454 data8 sys_read
1455 data8 sys_write
1456 data8 sys_open
1457 data8 sys_close
1458 data8 sys_creat // 1030
1459 data8 sys_link
1460 data8 sys_unlink
1461 data8 ia64_execve
1462 data8 sys_chdir
1463 data8 sys_fchdir // 1035
1464 data8 sys_utimes
1465 data8 sys_mknod
1466 data8 sys_chmod
1467 data8 sys_chown
1468 data8 sys_lseek // 1040
1469 data8 sys_getpid
1470 data8 sys_getppid
1471 data8 sys_mount
1472 data8 sys_umount
1473 data8 sys_setuid // 1045
1474 data8 sys_getuid
1475 data8 sys_geteuid
1476 data8 sys_ptrace
1477 data8 sys_access
1478 data8 sys_sync // 1050
1479 data8 sys_fsync
1480 data8 sys_fdatasync
1481 data8 sys_kill
1482 data8 sys_rename
1483 data8 sys_mkdir // 1055
1484 data8 sys_rmdir
1485 data8 sys_dup
1134723e 1486 data8 sys_ia64_pipe
1da177e4
LT		 1487 data8 sys_times
1488 data8 ia64_brk // 1060
1489 data8 sys_setgid
1490 data8 sys_getgid
1491 data8 sys_getegid
1492 data8 sys_acct
1493 data8 sys_ioctl // 1065
1494 data8 sys_fcntl
1495 data8 sys_umask
1496 data8 sys_chroot
1497 data8 sys_ustat
1498 data8 sys_dup2 // 1070
1499 data8 sys_setreuid
1500 data8 sys_setregid
1501 data8 sys_getresuid
1502 data8 sys_setresuid
1503 data8 sys_getresgid // 1075
1504 data8 sys_setresgid
1505 data8 sys_getgroups
1506 data8 sys_setgroups
1507 data8 sys_getpgid
1508 data8 sys_setpgid // 1080
1509 data8 sys_setsid
1510 data8 sys_getsid
1511 data8 sys_sethostname
1512 data8 sys_setrlimit
1513 data8 sys_getrlimit // 1085
1514 data8 sys_getrusage
1515 data8 sys_gettimeofday
1516 data8 sys_settimeofday
1517 data8 sys_select
1518 data8 sys_poll // 1090
1519 data8 sys_symlink
1520 data8 sys_readlink
1521 data8 sys_uselib
1522 data8 sys_swapon
1523 data8 sys_swapoff // 1095
1524 data8 sys_reboot
1525 data8 sys_truncate
1526 data8 sys_ftruncate
1527 data8 sys_fchmod
1528 data8 sys_fchown // 1100
1529 data8 ia64_getpriority
1530 data8 sys_setpriority
1531 data8 sys_statfs
1532 data8 sys_fstatfs
1533 data8 sys_gettid // 1105
1534 data8 sys_semget
1535 data8 sys_semop
1536 data8 sys_semctl
1537 data8 sys_msgget
1538 data8 sys_msgsnd // 1110
1539 data8 sys_msgrcv
1540 data8 sys_msgctl
1541 data8 sys_shmget
7d87e14c 1542 data8 sys_shmat
1da177e4
LT		 1543 data8 sys_shmdt // 1115
1544 data8 sys_shmctl
1545 data8 sys_syslog
1546 data8 sys_setitimer
1547 data8 sys_getitimer
1548 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1549 data8 sys_ni_syscall /* was: ia64_oldlstat */
1550 data8 sys_ni_syscall /* was: ia64_oldfstat */
1551 data8 sys_vhangup
1552 data8 sys_lchown
1553 data8 sys_remap_file_pages // 1125
1554 data8 sys_wait4
1555 data8 sys_sysinfo
1556 data8 sys_clone
1557 data8 sys_setdomainname
1558 data8 sys_newuname // 1130
1559 data8 sys_adjtimex
1560 data8 sys_ni_syscall /* was: ia64_create_module */
1561 data8 sys_init_module
1562 data8 sys_delete_module
1563 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1564 data8 sys_ni_syscall /* was: sys_query_module */
1565 data8 sys_quotactl
1566 data8 sys_bdflush
1567 data8 sys_sysfs
1568 data8 sys_personality // 1140
1569 data8 sys_ni_syscall // sys_afs_syscall
1570 data8 sys_setfsuid
1571 data8 sys_setfsgid
1572 data8 sys_getdents
1573 data8 sys_flock // 1145
1574 data8 sys_readv
1575 data8 sys_writev
1576 data8 sys_pread64
1577 data8 sys_pwrite64
1578 data8 sys_sysctl // 1150
1579 data8 sys_mmap
1580 data8 sys_munmap
1581 data8 sys_mlock
1582 data8 sys_mlockall
1583 data8 sys_mprotect // 1155
1584 data8 ia64_mremap
1585 data8 sys_msync
1586 data8 sys_munlock
1587 data8 sys_munlockall
1588 data8 sys_sched_getparam // 1160
1589 data8 sys_sched_setparam
1590 data8 sys_sched_getscheduler
1591 data8 sys_sched_setscheduler
1592 data8 sys_sched_yield
1593 data8 sys_sched_get_priority_max // 1165
1594 data8 sys_sched_get_priority_min
1595 data8 sys_sched_rr_get_interval
1596 data8 sys_nanosleep
f5b94099 1597 data8 sys_ni_syscall // old nfsservctl
1da177e4
LT		 1598 data8 sys_prctl // 1170
1599 data8 sys_getpagesize
1600 data8 sys_mmap2
1601 data8 sys_pciconfig_read
1602 data8 sys_pciconfig_write
1603 data8 sys_perfmonctl // 1175
1604 data8 sys_sigaltstack
1605 data8 sys_rt_sigaction
1606 data8 sys_rt_sigpending
1607 data8 sys_rt_sigprocmask
1608 data8 sys_rt_sigqueueinfo // 1180
1609 data8 sys_rt_sigreturn
1610 data8 sys_rt_sigsuspend
1611 data8 sys_rt_sigtimedwait
1612 data8 sys_getcwd
1613 data8 sys_capget // 1185
1614 data8 sys_capset
1615 data8 sys_sendfile64
1616 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1617 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1618 data8 sys_socket // 1190
1619 data8 sys_bind
1620 data8 sys_connect
1621 data8 sys_listen
1622 data8 sys_accept
1623 data8 sys_getsockname // 1195
1624 data8 sys_getpeername
1625 data8 sys_socketpair
1626 data8 sys_send
1627 data8 sys_sendto
1628 data8 sys_recv // 1200
1629 data8 sys_recvfrom
1630 data8 sys_shutdown
1631 data8 sys_setsockopt
1632 data8 sys_getsockopt
1633 data8 sys_sendmsg // 1205
1634 data8 sys_recvmsg
1635 data8 sys_pivot_root
1636 data8 sys_mincore
1637 data8 sys_madvise
1638 data8 sys_newstat // 1210
1639 data8 sys_newlstat
1640 data8 sys_newfstat
1641 data8 sys_clone2
1642 data8 sys_getdents64
1643 data8 sys_getunwind // 1215
1644 data8 sys_readahead
1645 data8 sys_setxattr
1646 data8 sys_lsetxattr
1647 data8 sys_fsetxattr
1648 data8 sys_getxattr // 1220
1649 data8 sys_lgetxattr
1650 data8 sys_fgetxattr
1651 data8 sys_listxattr
1652 data8 sys_llistxattr
1653 data8 sys_flistxattr // 1225
1654 data8 sys_removexattr
1655 data8 sys_lremovexattr
1656 data8 sys_fremovexattr
1657 data8 sys_tkill
1658 data8 sys_futex // 1230
1659 data8 sys_sched_setaffinity
1660 data8 sys_sched_getaffinity
1661 data8 sys_set_tid_address
1662 data8 sys_fadvise64_64
1663 data8 sys_tgkill // 1235
1664 data8 sys_exit_group
1665 data8 sys_lookup_dcookie
1666 data8 sys_io_setup
1667 data8 sys_io_destroy
1668 data8 sys_io_getevents // 1240
1669 data8 sys_io_submit
1670 data8 sys_io_cancel
1671 data8 sys_epoll_create
1672 data8 sys_epoll_ctl
1673 data8 sys_epoll_wait // 1245
1674 data8 sys_restart_syscall
1675 data8 sys_semtimedop
1676 data8 sys_timer_create
1677 data8 sys_timer_settime
1678 data8 sys_timer_gettime // 1250
1679 data8 sys_timer_getoverrun
1680 data8 sys_timer_delete
1681 data8 sys_clock_settime
1682 data8 sys_clock_gettime
1683 data8 sys_clock_getres // 1255
1684 data8 sys_clock_nanosleep
1685 data8 sys_fstatfs64
1686 data8 sys_statfs64
1687 data8 sys_mbind
1688 data8 sys_get_mempolicy // 1260
1689 data8 sys_set_mempolicy
1690 data8 sys_mq_open
1691 data8 sys_mq_unlink
1692 data8 sys_mq_timedsend
1693 data8 sys_mq_timedreceive // 1265
1694 data8 sys_mq_notify
1695 data8 sys_mq_getsetattr
a7956113 1696 data8 sys_kexec_load
1da177e4
LT		 1697 data8 sys_ni_syscall // reserved for vserver
1698 data8 sys_waitid // 1270
1699 data8 sys_add_key
1700 data8 sys_request_key
1701 data8 sys_keyctl
22e2c507
JA		 1702 data8 sys_ioprio_set
1703 data8 sys_ioprio_get // 1275
742755a1 1704 data8 sys_move_pages
d108919b
RL		 1705 data8 sys_inotify_init
1706 data8 sys_inotify_add_watch
1707 data8 sys_inotify_rm_watch
39743889 1708 data8 sys_migrate_pages // 1280
9ed2ad86
CK		 1709 data8 sys_openat
1710 data8 sys_mkdirat
1711 data8 sys_mknodat
1712 data8 sys_fchownat
1713 data8 sys_futimesat // 1285
1714 data8 sys_newfstatat
1715 data8 sys_unlinkat
1716 data8 sys_renameat
1717 data8 sys_linkat
1718 data8 sys_symlinkat // 1290
1719 data8 sys_readlinkat
1720 data8 sys_fchmodat
1721 data8 sys_faccessat
e180583b 1722 data8 sys_pselect6
ad9e39c7 1723 data8 sys_ppoll // 1295
9621a4ef 1724 data8 sys_unshare
5274f052 1725 data8 sys_splice
5c55cd63
TL		 1726 data8 sys_set_robust_list
1727 data8 sys_get_robust_list
d905b00b 1728 data8 sys_sync_file_range // 1300
70524490 1729 data8 sys_tee
912d35f8 1730 data8 sys_vmsplice
3d7559e6 1731 data8 sys_fallocate
86afa9eb 1732 data8 sys_getcpu
472118e6
TL		 1733 data8 sys_epoll_pwait // 1305
1734 data8 sys_utimensat
ae67e498 1735 data8 sys_signalfd
4d672e7a 1736 data8 sys_ni_syscall
ae67e498 1737 data8 sys_eventfd
ad9e39c7
TL		 1738 data8 sys_timerfd_create // 1310
1739 data8 sys_timerfd_settime
1740 data8 sys_timerfd_gettime
3e4d0cab
TL		 1741 data8 sys_signalfd4
1742 data8 sys_eventfd2
1743 data8 sys_epoll_create1 // 1315
1744 data8 sys_dup3
1745 data8 sys_pipe2
1746 data8 sys_inotify_init1
8851d371
TL		 1747 data8 sys_preadv
1748 data8 sys_pwritev // 1320
97de6ad1 1749 data8 sys_rt_tgsigqueueinfo
a2e27255 1750 data8 sys_recvmmsg
a78b2de1
TL		 1751 data8 sys_fanotify_init
1752 data8 sys_fanotify_mark
1753 data8 sys_prlimit64 // 1325
9298168d
TL		 1754 data8 sys_name_to_handle_at
1755 data8 sys_open_by_handle_at
1756 data8 sys_clock_adjtime
1757 data8 sys_syncfs
7b21fddd 1758 data8 sys_setns // 1330
83caba84 1759 data8 sys_sendmmsg
5569459c
TL		 1760 data8 sys_process_vm_readv
1761 data8 sys_process_vm_writev
65cc21b4 1762 data8 sys_accept4
062fe95a 1763 data8 sys_finit_module // 1335
7de8246e
TL		 1764 data8 sys_sched_setattr
1765 data8 sys_sched_getattr
3ca976a2 1766 data8 sys_renameat2
5e467e27 1767 data8 sys_getrandom
703e6a6e 1768 data8 sys_memfd_create // 1340
5dab4b73 1769 data8 sys_bpf
b739896d 1770 data8 sys_execveat
865ca084
LT		 1771 data8 sys_userfaultfd
1772 data8 sys_membarrier
d305c477 1773 data8 sys_kcmp // 1345
27801885 1774 data8 sys_mlock2
884a12a5 1775 data8 sys_copy_file_range
2d5ae5c2
TL		 1776 data8 sys_preadv2
1777 data8 sys_pwritev2
1da177e4
LT		 1778
1779 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
Linux 6.x block layer and io_uring tree(s)