[linux-2.6-block.git] / arch / arm / plat-omap / common.c

/*
 * linux/arch/arm/plat-omap/common.c
 *
 * Code common to all OMAP machines.
 * The file is created by Tony Lindgren <tony@atomide.com>
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/setup.h>

#include <plat/common.h>
#include <plat/board.h>
#include <plat/control.h>
#include <plat/mux.h>
#include <plat/fpga.h>
#include <plat/serial.h>

#include <plat/clock.h>

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
# include "../mach-omap2/sdrc.h"
#endif

#define NO_LENGTH_CHECK 0xffffffff

struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size;

/* used by omap-smp.c and board-4430sdp.c */
void __iomem *gic_cpu_base_addr;

static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
{
	struct omap_board_config_kernel *kinfo = NULL;
	int i;

	/* Try to find the config from the board-specific structures
	 * in the kernel. */
	for (i = 0; i < omap_board_config_size; i++) {
		if (omap_board_config[i].tag == tag) {
			if (skip == 0) {
				kinfo = &omap_board_config[i];
				break;
			} else {
				skip--;
			}
		}
	}
	if (kinfo == NULL)
		return NULL;
	return kinfo->data;
}

const void *__omap_get_config(u16 tag, size_t len, int nr)
{
        return get_config(tag, len, nr, NULL);
}
EXPORT_SYMBOL(__omap_get_config);

const void *omap_get_var_config(u16 tag, size_t *len)
{
        return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
EXPORT_SYMBOL(omap_get_var_config);

/*
 * 32KHz clocksource ... always available, on pretty most chips except
 * OMAP 730 and 1510.  Other timers could be used as clocksources, with
 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
 * but systems won't necessarily want to spend resources that way.
 */

#define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410

#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))

#include <linux/clocksource.h>

/*
 * offset_32k holds the init time counter value. It is then subtracted
 * from every counter read to achieve a counter that counts time from the
 * kernel boot (needed for sched_clock()).
 */
static u32 offset_32k __read_mostly;

#ifdef CONFIG_ARCH_OMAP16XX
static cycle_t omap16xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
}
#else
#define omap16xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2420
static cycle_t omap2420_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap2420_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2430
static cycle_t omap2430_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap2430_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP3
static cycle_t omap34xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap34xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP4
static cycle_t omap44xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap44xx_32k_read	NULL
#endif

/*
 * Kernel assumes that sched_clock can be called early but may not have
 * things ready yet.
 */
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
{
	return 0;
}

static struct clocksource clocksource_32k = {
	.name		= "32k_counter",
	.rating		= 250,
	.read		= omap_32k_read_dummy,
	.mask		= CLOCKSOURCE_MASK(32),
	.shift		= 10,
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};

/*
 * Returns current time from boot in nsecs. It's OK for this to wrap
 * around for now, as it's just a relative time stamp.
 */
unsigned long long sched_clock(void)
{
	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
				  clocksource_32k.mult, clocksource_32k.shift);
}

/**
 * read_persistent_clock -  Return time from a persistent clock.
 *
 * Reads the time from a source which isn't disabled during PM, the
 * 32k sync timer.  Convert the cycles elapsed since last read into
 * nsecs and adds to a monotonically increasing timespec.
 */
static struct timespec persistent_ts;
static cycles_t cycles, last_cycles;
void read_persistent_clock(struct timespec *ts)
{
	unsigned long long nsecs;
	cycles_t delta;
	struct timespec *tsp = &persistent_ts;

	last_cycles = cycles;
	cycles = clocksource_32k.read(&clocksource_32k);
	delta = cycles - last_cycles;

	nsecs = clocksource_cyc2ns(delta,
				   clocksource_32k.mult, clocksource_32k.shift);

	timespec_add_ns(tsp, nsecs);
	*ts = *tsp;
}

static int __init omap_init_clocksource_32k(void)
{
	static char err[] __initdata = KERN_ERR
			"%s: can't register clocksource!\n";

	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
		struct clk *sync_32k_ick;

		if (cpu_is_omap16xx())
			clocksource_32k.read = omap16xx_32k_read;
		else if (cpu_is_omap2420())
			clocksource_32k.read = omap2420_32k_read;
		else if (cpu_is_omap2430())
			clocksource_32k.read = omap2430_32k_read;
		else if (cpu_is_omap34xx())
			clocksource_32k.read = omap34xx_32k_read;
		else if (cpu_is_omap44xx())
			clocksource_32k.read = omap44xx_32k_read;
		else
			return -ENODEV;

		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
		if (sync_32k_ick)
			clk_enable(sync_32k_ick);

		clocksource_32k.mult = clocksource_hz2mult(32768,
					    clocksource_32k.shift);

		offset_32k = clocksource_32k.read(&clocksource_32k);

		if (clocksource_register(&clocksource_32k))
			printk(err, clocksource_32k.name);
	}
	return 0;
}
arch_initcall(omap_init_clocksource_32k);

#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */

/* Global address base setup code */

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
{
	omap2_set_globals_tap(omap2_globals);
	omap2_set_globals_sdrc(omap2_globals);
	omap2_set_globals_control(omap2_globals);
	omap2_set_globals_prcm(omap2_globals);
	omap2_set_globals_uart(omap2_globals);
}

#endif

#if defined(CONFIG_ARCH_OMAP2420)

static struct omap_globals omap242x_globals = {
	.class	= OMAP242X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
	.sdrc	= OMAP2420_SDRC_BASE,
	.sms	= OMAP2420_SMS_BASE,
	.ctrl	= OMAP2420_CTRL_BASE,
	.prm	= OMAP2420_PRM_BASE,
	.cm	= OMAP2420_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_242x(void)
{
	__omap2_set_globals(&omap242x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP2430)

static struct omap_globals omap243x_globals = {
	.class	= OMAP243X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
	.sdrc	= OMAP243X_SDRC_BASE,
	.sms	= OMAP243X_SMS_BASE,
	.ctrl	= OMAP243X_CTRL_BASE,
	.prm	= OMAP2430_PRM_BASE,
	.cm	= OMAP2430_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_243x(void)
{
	__omap2_set_globals(&omap243x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP3)

static struct omap_globals omap3_globals = {
	.class	= OMAP343X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
	.sdrc	= OMAP343X_SDRC_BASE,
	.sms	= OMAP343X_SMS_BASE,
	.ctrl	= OMAP343X_CTRL_BASE,
	.prm	= OMAP3430_PRM_BASE,
	.cm	= OMAP3430_CM_BASE,
	.uart1_phys	= OMAP3_UART1_BASE,
	.uart2_phys	= OMAP3_UART2_BASE,
	.uart3_phys	= OMAP3_UART3_BASE,
};

void __init omap2_set_globals_343x(void)
{
	__omap2_set_globals(&omap3_globals);
}

void __init omap2_set_globals_36xx(void)
{
	omap3_globals.uart4_phys = OMAP3_UART4_BASE;

	__omap2_set_globals(&omap3_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP4)
static struct omap_globals omap4_globals = {
	.class	= OMAP443X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
	.ctrl	= OMAP443X_CTRL_BASE,
	.prm	= OMAP4430_PRM_BASE,
	.cm	= OMAP4430_CM_BASE,
	.cm2	= OMAP4430_CM2_BASE,
	.uart1_phys	= OMAP4_UART1_BASE,
	.uart2_phys	= OMAP4_UART2_BASE,
	.uart3_phys	= OMAP4_UART3_BASE,
	.uart4_phys	= OMAP4_UART4_BASE,
};

void __init omap2_set_globals_443x(void)
{
	omap2_set_globals_tap(&omap4_globals);
	omap2_set_globals_control(&omap4_globals);
	omap2_set_globals_prcm(&omap4_globals);
	omap2_set_globals_uart(&omap4_globals);
}
#endif
Commit	Line	Data
5e1c5ff4 TL	1	/*
	2	* linux/arch/arm/plat-omap/common.c
	3	*
	4	* Code common to all OMAP machines.
44169075 SS	5	* The file is created by Tony Lindgren <tony@atomide.com>
	6	*
	7	* Copyright (C) 2009 Texas Instruments
	8	* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
5e1c5ff4 TL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
5e1c5ff4 TL	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
5e1c5ff4 TL	18	#include <linux/console.h>
	19	#include <linux/serial.h>
	20	#include <linux/tty.h>
	21	#include <linux/serial_8250.h>
	22	#include <linux/serial_reg.h>
f8ce2547	23	#include <linux/clk.h>
fced80c7	24	#include <linux/io.h>
5e1c5ff4	25
a09e64fb	26	#include <mach/hardware.h>
5e1c5ff4 TL	27	#include <asm/system.h>
	28	#include <asm/pgtable.h>
	29	#include <asm/mach/map.h>
92105bb7	30	#include <asm/setup.h>
5e1c5ff4	31
ce491cf8 TL	32	#include <plat/common.h>
	33	#include <plat/board.h>
	34	#include <plat/control.h>
	35	#include <plat/mux.h>
	36	#include <plat/fpga.h>
4f2c49fe	37	#include <plat/serial.h>
5e1c5ff4	38
ce491cf8	39	#include <plat/clock.h>
5e1c5ff4	40
44595982 PW	41	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
	42	# include "../mach-omap2/sdrc.h"
	43	#endif
	44
5e1c5ff4 TL	45	#define NO_LENGTH_CHECK 0xffffffff
5e1c5ff4 TL	46
5e1c5ff4	47	struct omap_board_config_kernel *omap_board_config;
92105bb7	48	int omap_board_config_size;
5e1c5ff4	49
e4e7a13a TL	50	/* used by omap-smp.c and board-4430sdp.c */
	51	void __iomem *gic_cpu_base_addr;
	52
5e1c5ff4 TL	53	static const void get_config(u16 tag, size_t len, int skip, size_t len_out)
	54	{
	55	struct omap_board_config_kernel *kinfo = NULL;
	56	int i;
	57
5e1c5ff4 TL	58	/* Try to find the config from the board-specific structures
	59	* in the kernel. */
	60	for (i = 0; i < omap_board_config_size; i++) {
	61	if (omap_board_config[i].tag == tag) {
c40fae95 TL	62	if (skip == 0) {
	63	kinfo = &omap_board_config[i];
	64	break;
	65	} else {
	66	skip--;
	67	}
5e1c5ff4 TL	68	}
	69	}
	70	if (kinfo == NULL)
	71	return NULL;
	72	return kinfo->data;
	73	}
	74
	75	const void *__omap_get_config(u16 tag, size_t len, int nr)
	76	{
	77	return get_config(tag, len, nr, NULL);
	78	}
	79	EXPORT_SYMBOL(__omap_get_config);
	80
	81	const void omap_get_var_config(u16 tag, size_t len)
	82	{
	83	return get_config(tag, NO_LENGTH_CHECK, 0, len);
	84	}
	85	EXPORT_SYMBOL(omap_get_var_config);
	86
075192ae KH	87	/*
	88	* 32KHz clocksource ... always available, on pretty most chips except
	89	* OMAP 730 and 1510. Other timers could be used as clocksources, with
	90	* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
	91	* but systems won't necessarily want to spend resources that way.
	92	*/
	93
a4ab0d83	94	#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
075192ae	95
a4ab0d83	96	#if !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX))
075192ae KH	97
	98	#include <linux/clocksource.h>
	99
2decb12e AK	100	/*
	101	* offset_32k holds the init time counter value. It is then subtracted
	102	* from every counter read to achieve a counter that counts time from the
	103	* kernel boot (needed for sched_clock()).
	104	*/
	105	static u32 offset_32k __read_mostly;
	106
a4ab0d83 TL	107	#ifdef CONFIG_ARCH_OMAP16XX
	108	static cycle_t omap16xx_32k_read(struct clocksource *cs)
	109	{
2decb12e	110	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
a4ab0d83 TL	111	}
	112	#else
	113	#define omap16xx_32k_read NULL
	114	#endif
	115
	116	#ifdef CONFIG_ARCH_OMAP2420
	117	static cycle_t omap2420_32k_read(struct clocksource *cs)
	118	{
2decb12e	119	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	120	}
	121	#else
	122	#define omap2420_32k_read NULL
	123	#endif
	124
	125	#ifdef CONFIG_ARCH_OMAP2430
	126	static cycle_t omap2430_32k_read(struct clocksource *cs)
	127	{
2decb12e	128	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	129	}
	130	#else
	131	#define omap2430_32k_read NULL
	132	#endif
	133
a8eb7ca0	134	#ifdef CONFIG_ARCH_OMAP3
a4ab0d83	135	static cycle_t omap34xx_32k_read(struct clocksource *cs)
075192ae	136	{
2decb12e	137	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	138	}
	139	#else
	140	#define omap34xx_32k_read NULL
	141	#endif
	142
44169075 SS	143	#ifdef CONFIG_ARCH_OMAP4
	144	static cycle_t omap44xx_32k_read(struct clocksource *cs)
	145	{
2decb12e	146	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
44169075 SS	147	}
	148	#else
	149	#define omap44xx_32k_read NULL
	150	#endif
	151
a4ab0d83 TL	152	/*
	153	* Kernel assumes that sched_clock can be called early but may not have
	154	* things ready yet.
	155	*/
	156	static cycle_t omap_32k_read_dummy(struct clocksource *cs)
	157	{
	158	return 0;
075192ae KH	159	}
	160
	161	static struct clocksource clocksource_32k = {
	162	.name = "32k_counter",
	163	.rating = 250,
a4ab0d83	164	.read = omap_32k_read_dummy,
075192ae KH	165	.mask = CLOCKSOURCE_MASK(32),
	166	.shift = 10,
	167	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	168	};
	169
f258b0c6 KH	170	/*
	171	* Returns current time from boot in nsecs. It's OK for this to wrap
	172	* around for now, as it's just a relative time stamp.
	173	*/
	174	unsigned long long sched_clock(void)
	175	{
0a544198 MS	176	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
0a544198 MS	177	clocksource_32k.mult, clocksource_32k.shift);
f258b0c6 KH	178	}
f258b0c6 KH	179
d92cfcbe KH	180	/**
	181	* read_persistent_clock - Return time from a persistent clock.
	182	*
	183	* Reads the time from a source which isn't disabled during PM, the
	184	* 32k sync timer. Convert the cycles elapsed since last read into
	185	* nsecs and adds to a monotonically increasing timespec.
	186	*/
	187	static struct timespec persistent_ts;
	188	static cycles_t cycles, last_cycles;
	189	void read_persistent_clock(struct timespec *ts)
	190	{
	191	unsigned long long nsecs;
	192	cycles_t delta;
	193	struct timespec *tsp = &persistent_ts;
	194
	195	last_cycles = cycles;
	196	cycles = clocksource_32k.read(&clocksource_32k);
	197	delta = cycles - last_cycles;
	198
	199	nsecs = clocksource_cyc2ns(delta,
	200	clocksource_32k.mult, clocksource_32k.shift);
	201
	202	timespec_add_ns(tsp, nsecs);
	203	ts = tsp;
	204	}
	205
075192ae KH	206	static int __init omap_init_clocksource_32k(void)
	207	{
	208	static char err[] __initdata = KERN_ERR
	209	"%s: can't register clocksource!\n";
	210
44595982 PW	211	if (cpu_is_omap16xx() \|\| cpu_class_is_omap2()) {
	212	struct clk *sync_32k_ick;
	213
a4ab0d83 TL	214	if (cpu_is_omap16xx())
	215	clocksource_32k.read = omap16xx_32k_read;
	216	else if (cpu_is_omap2420())
	217	clocksource_32k.read = omap2420_32k_read;
	218	else if (cpu_is_omap2430())
	219	clocksource_32k.read = omap2430_32k_read;
	220	else if (cpu_is_omap34xx())
	221	clocksource_32k.read = omap34xx_32k_read;
44169075 SS	222	else if (cpu_is_omap44xx())
44169075 SS	223	clocksource_32k.read = omap44xx_32k_read;
a4ab0d83 TL	224	else
	225	return -ENODEV;
	226
44595982 PW	227	sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
	228	if (sync_32k_ick)
	229	clk_enable(sync_32k_ick);
	230
075192ae KH	231	clocksource_32k.mult = clocksource_hz2mult(32768,
	232	clocksource_32k.shift);
	233
2decb12e AK	234	offset_32k = clocksource_32k.read(&clocksource_32k);
2decb12e AK	235
075192ae KH	236	if (clocksource_register(&clocksource_32k))
	237	printk(err, clocksource_32k.name);
	238	}
	239	return 0;
	240	}
	241	arch_initcall(omap_init_clocksource_32k);
	242
a4ab0d83	243	#endif /* !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX)) */
44595982 PW	244
	245	/* Global address base setup code */
	246
a58caad1 TL	247	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
a58caad1 TL	248
8f9ccfee	249	static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
a58caad1	250	{
0e564848	251	omap2_set_globals_tap(omap2_globals);
f2ab9977	252	omap2_set_globals_sdrc(omap2_globals);
a58caad1 TL	253	omap2_set_globals_control(omap2_globals);
a58caad1 TL	254	omap2_set_globals_prcm(omap2_globals);
4f2c49fe	255	omap2_set_globals_uart(omap2_globals);
a58caad1 TL	256	}
	257
	258	#endif
	259
44595982	260	#if defined(CONFIG_ARCH_OMAP2420)
a58caad1 TL	261
a58caad1 TL	262	static struct omap_globals omap242x_globals = {
0e564848	263	.class = OMAP242X_CLASS,
233fd64e	264	.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
b7ebb10b SS	265	.sdrc = OMAP2420_SDRC_BASE,
	266	.sms = OMAP2420_SMS_BASE,
	267	.ctrl = OMAP2420_CTRL_BASE,
	268	.prm = OMAP2420_PRM_BASE,
	269	.cm = OMAP2420_CM_BASE,
4f2c49fe TL	270	.uart1_phys = OMAP2_UART1_BASE,
	271	.uart2_phys = OMAP2_UART2_BASE,
	272	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	273	};
a58caad1 TL	274
44595982 PW	275	void __init omap2_set_globals_242x(void)
44595982 PW	276	{
8f9ccfee	277	__omap2_set_globals(&omap242x_globals);
44595982 PW	278	}
	279	#endif
	280
	281	#if defined(CONFIG_ARCH_OMAP2430)
a58caad1 TL	282
a58caad1 TL	283	static struct omap_globals omap243x_globals = {
0e564848	284	.class = OMAP243X_CLASS,
233fd64e	285	.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
b7ebb10b SS	286	.sdrc = OMAP243X_SDRC_BASE,
	287	.sms = OMAP243X_SMS_BASE,
	288	.ctrl = OMAP243X_CTRL_BASE,
	289	.prm = OMAP2430_PRM_BASE,
	290	.cm = OMAP2430_CM_BASE,
4f2c49fe TL	291	.uart1_phys = OMAP2_UART1_BASE,
	292	.uart2_phys = OMAP2_UART2_BASE,
	293	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	294	};
a58caad1 TL	295
44595982 PW	296	void __init omap2_set_globals_243x(void)
44595982 PW	297	{
8f9ccfee	298	__omap2_set_globals(&omap243x_globals);
44595982 PW	299	}
	300	#endif
	301
4f2c49fe	302	#if defined(CONFIG_ARCH_OMAP3)
a58caad1	303
4f2c49fe	304	static struct omap_globals omap3_globals = {
0e564848	305	.class = OMAP343X_CLASS,
233fd64e	306	.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
b7ebb10b SS	307	.sdrc = OMAP343X_SDRC_BASE,
	308	.sms = OMAP343X_SMS_BASE,
	309	.ctrl = OMAP343X_CTRL_BASE,
	310	.prm = OMAP3430_PRM_BASE,
	311	.cm = OMAP3430_CM_BASE,
4f2c49fe TL	312	.uart1_phys = OMAP3_UART1_BASE,
	313	.uart2_phys = OMAP3_UART2_BASE,
	314	.uart3_phys = OMAP3_UART3_BASE,
a58caad1 TL	315	};
a58caad1 TL	316
44595982 PW	317	void __init omap2_set_globals_343x(void)
44595982 PW	318	{
4f2c49fe TL	319	__omap2_set_globals(&omap3_globals);
	320	}
	321
	322	void __init omap2_set_globals_36xx(void)
	323	{
	324	omap3_globals.uart4_phys = OMAP3_UART4_BASE;
	325
	326	__omap2_set_globals(&omap3_globals);
44595982 PW	327	}
	328	#endif
	329
44169075 SS	330	#if defined(CONFIG_ARCH_OMAP4)
	331	static struct omap_globals omap4_globals = {
	332	.class = OMAP443X_CLASS,
b570e0ec	333	.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
b7ebb10b SS	334	.ctrl = OMAP443X_CTRL_BASE,
	335	.prm = OMAP4430_PRM_BASE,
	336	.cm = OMAP4430_CM_BASE,
	337	.cm2 = OMAP4430_CM2_BASE,
4f2c49fe TL	338	.uart1_phys = OMAP4_UART1_BASE,
	339	.uart2_phys = OMAP4_UART2_BASE,
	340	.uart3_phys = OMAP4_UART3_BASE,
	341	.uart4_phys = OMAP4_UART4_BASE,
44169075 SS	342	};
	343
	344	void __init omap2_set_globals_443x(void)
	345	{
	346	omap2_set_globals_tap(&omap4_globals);
	347	omap2_set_globals_control(&omap4_globals);
9ef89150	348	omap2_set_globals_prcm(&omap4_globals);
4f2c49fe	349	omap2_set_globals_uart(&omap4_globals);
44169075 SS	350	}
	351	#endif
	352