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1 | /* linux/arch/arm/mach-s5p6440/include/mach/map.h |
2 | * | |
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * S5P6440 - Memory map definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_MAP_H | |
14 | #define __ASM_ARCH_MAP_H __FILE__ | |
15 | ||
16 | #include <plat/map-base.h> | |
81317960 | 17 | #include <plat/map-s5p.h> |
209fecd1 | 18 | |
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19 | #define S5P6440_PA_CHIPID (0xE0000000) |
20 | #define S5P_PA_CHIPID S5P6440_PA_CHIPID | |
af151940 | 21 | |
209fecd1 | 22 | #define S5P6440_PA_SYSCON (0xE0100000) |
209fecd1 | 23 | #define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0) |
81317960 | 24 | #define S5P_PA_SYSCON S5P6440_PA_SYSCON |
209fecd1 | 25 | |
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26 | #define S5P6440_PA_GPIO (0xE0308000) |
27 | #define S5P_PA_GPIO S5P6440_PA_GPIO | |
209fecd1 | 28 | |
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29 | #define S5P6440_PA_VIC0 (0xE4000000) |
30 | #define S5P_PA_VIC0 S5P6440_PA_VIC0 | |
209fecd1 | 31 | |
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32 | #define S5P6440_PA_VIC1 (0xE4100000) |
33 | #define S5P_PA_VIC1 S5P6440_PA_VIC1 | |
209fecd1 | 34 | |
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35 | #define S5P6440_PA_TIMER (0xEA000000) |
36 | #define S5P_PA_TIMER S5P6440_PA_TIMER | |
209fecd1 | 37 | |
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38 | #define S5P6440_PA_RTC (0xEA100000) |
39 | #define S5P_PA_RTC S5P6440_PA_RTC | |
209fecd1 | 40 | |
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41 | #define S5P6440_PA_WDT (0xEA200000) |
42 | #define S5P_PA_WDT S5P6440_PA_WDT | |
209fecd1 | 43 | |
209fecd1 | 44 | #define S5P6440_PA_UART (0xEC000000) |
209fecd1 | 45 | |
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46 | #define S5P_PA_UART0 (S5P6440_PA_UART + 0x0) |
47 | #define S5P_PA_UART1 (S5P6440_PA_UART + 0x400) | |
48 | #define S5P_PA_UART2 (S5P6440_PA_UART + 0x800) | |
49 | #define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00) | |
50 | ||
51 | #define S5P_SZ_UART SZ_256 | |
52 | ||
53 | #define S5P6440_PA_IIC0 (0xEC104000) | |
54 | ||
0647aee0 BD |
55 | #define S5P6440_PA_HSOTG (0xED100000) |
56 | ||
0647aee0 BD |
57 | #define S5P6440_PA_HSMMC0 (0xED800000) |
58 | #define S5P6440_PA_HSMMC1 (0xED900000) | |
59 | #define S5P6440_PA_HSMMC2 (0xEDA00000) | |
60 | ||
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61 | #define S5P6440_PA_SDRAM (0x20000000) |
62 | #define S5P_PA_SDRAM S5P6440_PA_SDRAM | |
63 | ||
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64 | /* I2S */ |
65 | #define S5P6440_PA_I2S 0xF2000000 | |
66 | ||
67 | /* PCM */ | |
68 | #define S5P6440_PA_PCM 0xF2100000 | |
69 | ||
209fecd1 | 70 | /* compatibiltiy defines. */ |
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71 | #define S3C_PA_UART S5P6440_PA_UART |
72 | #define S3C_PA_IIC S5P6440_PA_IIC0 | |
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73 | |
74 | #endif /* __ASM_ARCH_MAP_H */ |