[linux-2.6-block.git] / arch / arm / mach-realview / realview_pb1176.c

/*
 *  linux/arch/arm/mach-realview/realview_pb1176.c
 *
 *  Copyright (C) 2008 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>

#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include <mach/board-pb1176.h>
#include <mach/irqs.h>

#include "core.h"

static struct map_desc realview_pb1176_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
		.length		= SZ_8K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_DEBUG_LL
	{
		.virtual	= IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#endif
};

static void __init realview_pb1176_map_io(void)
{
	iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
}

static struct pl061_platform_data gpio0_plat_data = {
	.gpio_base	= 0,
	.irq_base	= -1,
};

static struct pl061_platform_data gpio1_plat_data = {
	.gpio_base	= 8,
	.irq_base	= -1,
};

static struct pl061_platform_data gpio2_plat_data = {
	.gpio_base	= 16,
	.irq_base	= -1,
};

/*
 * RealView PB1176 AMBA devices
 */
#define GPIO2_IRQ	{ IRQ_PB1176_GPIO2, NO_IRQ }
#define GPIO2_DMA	{ 0, 0 }
#define GPIO3_IRQ	{ IRQ_PB1176_GPIO3, NO_IRQ }
#define GPIO3_DMA	{ 0, 0 }
#define AACI_IRQ	{ IRQ_PB1176_AACI, NO_IRQ }
#define AACI_DMA	{ 0x80, 0x81 }
#define MMCI0_IRQ	{ IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
#define MMCI0_DMA	{ 0x84, 0 }
#define KMI0_IRQ	{ IRQ_PB1176_KMI0, NO_IRQ }
#define KMI0_DMA	{ 0, 0 }
#define KMI1_IRQ	{ IRQ_PB1176_KMI1, NO_IRQ }
#define KMI1_DMA	{ 0, 0 }
#define PB1176_SMC_IRQ	{ NO_IRQ, NO_IRQ }
#define PB1176_SMC_DMA	{ 0, 0 }
#define MPMC_IRQ	{ NO_IRQ, NO_IRQ }
#define MPMC_DMA	{ 0, 0 }
#define PB1176_CLCD_IRQ	{ IRQ_DC1176_CLCD, NO_IRQ }
#define PB1176_CLCD_DMA	{ 0, 0 }
#define DMAC_IRQ	{ IRQ_PB1176_DMAC, NO_IRQ }
#define DMAC_DMA	{ 0, 0 }
#define SCTL_IRQ	{ NO_IRQ, NO_IRQ }
#define SCTL_DMA	{ 0, 0 }
#define PB1176_WATCHDOG_IRQ	{ IRQ_DC1176_WATCHDOG, NO_IRQ }
#define PB1176_WATCHDOG_DMA	{ 0, 0 }
#define PB1176_GPIO0_IRQ	{ IRQ_PB1176_GPIO0, NO_IRQ }
#define PB1176_GPIO0_DMA	{ 0, 0 }
#define GPIO1_IRQ	{ IRQ_PB1176_GPIO1, NO_IRQ }
#define GPIO1_DMA	{ 0, 0 }
#define PB1176_RTC_IRQ	{ IRQ_DC1176_RTC, NO_IRQ }
#define PB1176_RTC_DMA	{ 0, 0 }
#define SCI_IRQ		{ IRQ_PB1176_SCI, NO_IRQ }
#define SCI_DMA		{ 7, 6 }
#define PB1176_UART0_IRQ	{ IRQ_DC1176_UART0, NO_IRQ }
#define PB1176_UART0_DMA	{ 15, 14 }
#define PB1176_UART1_IRQ	{ IRQ_DC1176_UART1, NO_IRQ }
#define PB1176_UART1_DMA	{ 13, 12 }
#define PB1176_UART2_IRQ	{ IRQ_DC1176_UART2, NO_IRQ }
#define PB1176_UART2_DMA	{ 11, 10 }
#define PB1176_UART3_IRQ	{ IRQ_DC1176_UART3, NO_IRQ }
#define PB1176_UART3_DMA	{ 0x86, 0x87 }
#define PB1176_SSP_IRQ		{ IRQ_PB1176_SSP, NO_IRQ }
#define PB1176_SSP_DMA		{ 9, 8 }

/* FPGA Primecells */
AMBA_DEVICE(aaci,	"fpga:aaci",	AACI,		NULL);
AMBA_DEVICE(mmc0,	"fpga:mmc0",	MMCI0,		&realview_mmc0_plat_data);
AMBA_DEVICE(kmi0,	"fpga:kmi0",	KMI0,		NULL);
AMBA_DEVICE(kmi1,	"fpga:kmi1",	KMI1,		NULL);
AMBA_DEVICE(uart3,	"fpga:uart3",	PB1176_UART3,	NULL);

/* DevChip Primecells */
AMBA_DEVICE(smc,	"dev:smc",	PB1176_SMC,	NULL);
AMBA_DEVICE(sctl,	"dev:sctl",	SCTL,		NULL);
AMBA_DEVICE(wdog,	"dev:wdog",	PB1176_WATCHDOG,	NULL);
AMBA_DEVICE(gpio0,	"dev:gpio0",	PB1176_GPIO0,	&gpio0_plat_data);
AMBA_DEVICE(gpio1,	"dev:gpio1",	GPIO1,		&gpio1_plat_data);
AMBA_DEVICE(gpio2,	"dev:gpio2",	GPIO2,		&gpio2_plat_data);
AMBA_DEVICE(rtc,	"dev:rtc",	PB1176_RTC,	NULL);
AMBA_DEVICE(sci0,	"dev:sci0",	SCI,		NULL);
AMBA_DEVICE(uart0,	"dev:uart0",	PB1176_UART0,	NULL);
AMBA_DEVICE(uart1,	"dev:uart1",	PB1176_UART1,	NULL);
AMBA_DEVICE(uart2,	"dev:uart2",	PB1176_UART2,	NULL);
AMBA_DEVICE(ssp0,	"dev:ssp0",	PB1176_SSP,	NULL);

/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd,	"issp:clcd",	PB1176_CLCD,	&clcd_plat_data);
//AMBA_DEVICE(dmac,	"issp:dmac",	PB1176_DMAC,	NULL);

static struct amba_device *amba_devs[] __initdata = {
//	&dmac_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&smc_device,
	&clcd_device,
	&sctl_device,
	&wdog_device,
	&gpio0_device,
	&gpio1_device,
	&gpio2_device,
	&rtc_device,
	&sci0_device,
	&ssp0_device,
	&aaci_device,
	&mmc0_device,
	&kmi0_device,
	&kmi1_device,
};

/*
 * RealView PB1176 platform devices
 */
static struct resource realview_pb1176_flash_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_FLASH_BASE,
		.end		= REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= REALVIEW_PB1176_SEC_FLASH_BASE,
		.end		= REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
		.flags		= IORESOURCE_MEM,
	},
};
#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
#define PB1176_FLASH_BLOCKS	2
#else
#define PB1176_FLASH_BLOCKS	1
#endif

static struct resource realview_pb1176_smsc911x_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_ETH_BASE,
		.end		= REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PB1176_ETH,
		.end		= IRQ_PB1176_ETH,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource realview_pb1176_isp1761_resources[] = {
	[0] = {
		.start		= REALVIEW_PB1176_USB_BASE,
		.end		= REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_PB1176_USB,
		.end		= IRQ_PB1176_USB,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource pmu_resource = {
	.start		= IRQ_DC1176_CORE_PMU,
	.end		= IRQ_DC1176_CORE_PMU,
	.flags		= IORESOURCE_IRQ,
};

static struct platform_device pmu_device = {
	.name			= "arm-pmu",
	.id			= ARM_PMU_DEVICE_CPU,
	.num_resources		= 1,
	.resource		= &pmu_resource,
};

static void __init gic_init_irq(void)
{
	/* ARM1176 DevChip GIC, primary */
	gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
	gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
	gic_cpu_init(0, gic_cpu_base_addr);

	/* board GIC, secondary */
	gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
	gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
	gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
}

static void __init realview_pb1176_timer_init(void)
{
	timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
	timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
	timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
	timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;

	realview_timer_init(IRQ_DC1176_TIMER0);
}

static struct sys_timer realview_pb1176_timer = {
	.init		= realview_pb1176_timer_init,
};

static void realview_pb1176_reset(char mode)
{
	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
}

static void realview_pb1176_fixup(struct machine_desc *mdesc,
				  struct tag *tags, char **from,
				  struct meminfo *meminfo)
{
	/*
	 * RealView PB1176 only has 128MB of RAM mapped at 0.
	 */
	meminfo->bank[0].start = 0;
	meminfo->bank[0].size = SZ_128M;
	meminfo->nr_banks = 1;
}

static void __init realview_pb1176_init(void)
{
	int i;

#ifdef CONFIG_CACHE_L2X0
	/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
	l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
#endif

	realview_flash_register(realview_pb1176_flash_resources,
				PB1176_FLASH_BLOCKS);
	realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
	platform_device_register(&realview_i2c_device);
	realview_usb_register(realview_pb1176_isp1761_resources);
	platform_device_register(&pmu_device);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}

#ifdef CONFIG_LEDS
	leds_event = realview_leds_event;
#endif
	realview_reset = realview_pb1176_reset;
}

MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	.phys_io	= REALVIEW_PB1176_UART0_BASE,
	.io_pg_offst	= (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
	.boot_params	= PHYS_OFFSET + 0x00000100,
	.fixup		= realview_pb1176_fixup,
	.map_io		= realview_pb1176_map_io,
	.init_irq	= gic_init_irq,
	.timer		= &realview_pb1176_timer,
	.init_machine	= realview_pb1176_init,
MACHINE_END
Commit	Line	Data
a0316b24 BB	1	/*
	2	* linux/arch/arm/mach-realview/realview_pb1176.c
	3	*
	4	* Copyright (C) 2008 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	#include <linux/init.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/sysdev.h>
	25	#include <linux/amba/bus.h>
eb7fffa3	26	#include <linux/amba/pl061.h>
6ef297f8	27	#include <linux/amba/mmci.h>
fced80c7	28	#include <linux/io.h>
a0316b24	29
a09e64fb	30	#include <mach/hardware.h>
a0316b24 BB	31	#include <asm/irq.h>
	32	#include <asm/leds.h>
	33	#include <asm/mach-types.h>
f417cbad	34	#include <asm/pmu.h>
a0316b24	35	#include <asm/hardware/gic.h>
a0316b24 BB	36	#include <asm/hardware/cache-l2x0.h>
	37
	38	#include <asm/mach/arch.h>
	39	#include <asm/mach/flash.h>
	40	#include <asm/mach/map.h>
a0316b24 BB	41	#include <asm/mach/time.h>
a0316b24 BB	42
a09e64fb RK	43	#include <mach/board-pb1176.h>
a09e64fb RK	44	#include <mach/irqs.h>
a0316b24 BB	45
a0316b24 BB	46	#include "core.h"
a0316b24 BB	47
	48	static struct map_desc realview_pb1176_io_desc[] __initdata = {
	49	{
	50	.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
	51	.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
	52	.length = SZ_4K,
	53	.type = MT_DEVICE,
	54	}, {
	55	.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
	56	.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
	57	.length = SZ_4K,
	58	.type = MT_DEVICE,
	59	}, {
	60	.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
	61	.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
	62	.length = SZ_4K,
	63	.type = MT_DEVICE,
	64	}, {
	65	.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
	66	.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
	67	.length = SZ_4K,
	68	.type = MT_DEVICE,
	69	}, {
	70	.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
	71	.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
	72	.length = SZ_4K,
	73	.type = MT_DEVICE,
	74	}, {
	75	.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
	76	.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
	77	.length = SZ_4K,
	78	.type = MT_DEVICE,
	79	}, {
	80	.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
	81	.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
	82	.length = SZ_4K,
	83	.type = MT_DEVICE,
	84	}, {
	85	.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
	86	.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
	87	.length = SZ_4K,
	88	.type = MT_DEVICE,
	89	}, {
	90	.virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
	91	.pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
	92	.length = SZ_8K,
	93	.type = MT_DEVICE,
	94	},
	95	#ifdef CONFIG_DEBUG_LL
	96	{
	97	.virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
	98	.pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
	99	.length = SZ_4K,
	100	.type = MT_DEVICE,
	101	},
	102	#endif
	103	};
	104
	105	static void __init realview_pb1176_map_io(void)
	106	{
	107	iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
	108	}
	109
eb7fffa3 RK	110	static struct pl061_platform_data gpio0_plat_data = {
	111	.gpio_base = 0,
	112	.irq_base = -1,
	113	};
	114
	115	static struct pl061_platform_data gpio1_plat_data = {
	116	.gpio_base = 8,
	117	.irq_base = -1,
	118	};
	119
	120	static struct pl061_platform_data gpio2_plat_data = {
	121	.gpio_base = 16,
	122	.irq_base = -1,
	123	};
	124
a0316b24 BB	125	/*
	126	* RealView PB1176 AMBA devices
	127	*/
	128	#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
	129	#define GPIO2_DMA { 0, 0 }
	130	#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
	131	#define GPIO3_DMA { 0, 0 }
	132	#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
	133	#define AACI_DMA { 0x80, 0x81 }
	134	#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
	135	#define MMCI0_DMA { 0x84, 0 }
	136	#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
	137	#define KMI0_DMA { 0, 0 }
	138	#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
	139	#define KMI1_DMA { 0, 0 }
	140	#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
	141	#define PB1176_SMC_DMA { 0, 0 }
	142	#define MPMC_IRQ { NO_IRQ, NO_IRQ }
	143	#define MPMC_DMA { 0, 0 }
	144	#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
	145	#define PB1176_CLCD_DMA { 0, 0 }
	146	#define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
	147	#define DMAC_DMA { 0, 0 }
	148	#define SCTL_IRQ { NO_IRQ, NO_IRQ }
	149	#define SCTL_DMA { 0, 0 }
	150	#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
	151	#define PB1176_WATCHDOG_DMA { 0, 0 }
	152	#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
	153	#define PB1176_GPIO0_DMA { 0, 0 }
	154	#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
	155	#define GPIO1_DMA { 0, 0 }
	156	#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
	157	#define PB1176_RTC_DMA { 0, 0 }
	158	#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
	159	#define SCI_DMA { 7, 6 }
	160	#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
	161	#define PB1176_UART0_DMA { 15, 14 }
	162	#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
	163	#define PB1176_UART1_DMA { 13, 12 }
	164	#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
	165	#define PB1176_UART2_DMA { 11, 10 }
	166	#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
	167	#define PB1176_UART3_DMA { 0x86, 0x87 }
	168	#define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
	169	#define PB1176_SSP_DMA { 9, 8 }
	170
	171	/* FPGA Primecells */
4321532c LW	172	AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
	173	AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
	174	AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
	175	AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
	176	AMBA_DEVICE(uart3, "fpga:uart3", PB1176_UART3, NULL);
a0316b24 BB	177
a0316b24 BB	178	/* DevChip Primecells */
4321532c LW	179	AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
	180	AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
	181	AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
	182	AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
	183	AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
	184	AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
	185	AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
	186	AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
	187	AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
	188	AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
	189	AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
	190	AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, NULL);
a0316b24 BB	191
a0316b24 BB	192	/* Primecells on the NEC ISSP chip */
4321532c LW	193	AMBA_DEVICE(clcd, "issp:clcd", PB1176_CLCD, &clcd_plat_data);
4321532c LW	194	//AMBA_DEVICE(dmac, "issp:dmac", PB1176_DMAC, NULL);
a0316b24 BB	195
	196	static struct amba_device *amba_devs[] __initdata = {
	197	// &dmac_device,
	198	&uart0_device,
	199	&uart1_device,
	200	&uart2_device,
	201	&uart3_device,
	202	&smc_device,
	203	&clcd_device,
	204	&sctl_device,
	205	&wdog_device,
	206	&gpio0_device,
	207	&gpio1_device,
	208	&gpio2_device,
	209	&rtc_device,
	210	&sci0_device,
	211	&ssp0_device,
	212	&aaci_device,
	213	&mmc0_device,
	214	&kmi0_device,
	215	&kmi1_device,
	216	};
	217
	218	/*
	219	* RealView PB1176 platform devices
	220	*/
af607747 CM	221	static struct resource realview_pb1176_flash_resources[] = {
	222	[0] = {
	223	.start = REALVIEW_PB1176_FLASH_BASE,
	224	.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
	225	.flags = IORESOURCE_MEM,
	226	},
	227	[1] = {
	228	.start = REALVIEW_PB1176_SEC_FLASH_BASE,
	229	.end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
	230	.flags = IORESOURCE_MEM,
	231	},
a0316b24	232	};
af607747 CM	233	#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
	234	#define PB1176_FLASH_BLOCKS 2
	235	#else
	236	#define PB1176_FLASH_BLOCKS 1
	237	#endif
a0316b24 BB	238
	239	static struct resource realview_pb1176_smsc911x_resources[] = {
	240	[0] = {
	241	.start = REALVIEW_PB1176_ETH_BASE,
	242	.end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
	243	.flags = IORESOURCE_MEM,
	244	},
	245	[1] = {
	246	.start = IRQ_PB1176_ETH,
	247	.end = IRQ_PB1176_ETH,
	248	.flags = IORESOURCE_IRQ,
	249	},
	250	};
	251
7db21712 CM	252	static struct resource realview_pb1176_isp1761_resources[] = {
	253	[0] = {
	254	.start = REALVIEW_PB1176_USB_BASE,
	255	.end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
	256	.flags = IORESOURCE_MEM,
	257	},
	258	[1] = {
	259	.start = IRQ_PB1176_USB,
	260	.end = IRQ_PB1176_USB,
	261	.flags = IORESOURCE_IRQ,
	262	},
	263	};
	264
f417cbad WD	265	static struct resource pmu_resource = {
	266	.start = IRQ_DC1176_CORE_PMU,
	267	.end = IRQ_DC1176_CORE_PMU,
	268	.flags = IORESOURCE_IRQ,
	269	};
	270
	271	static struct platform_device pmu_device = {
	272	.name = "arm-pmu",
	273	.id = ARM_PMU_DEVICE_CPU,
	274	.num_resources = 1,
	275	.resource = &pmu_resource,
	276	};
	277
a0316b24 BB	278	static void __init gic_init_irq(void)
	279	{
	280	/* ARM1176 DevChip GIC, primary */
	281	gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
	282	gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
	283	gic_cpu_init(0, gic_cpu_base_addr);
	284
	285	/* board GIC, secondary */
	286	gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
	287	gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
	288	gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
	289	}
	290
	291	static void __init realview_pb1176_timer_init(void)
	292	{
	293	timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
	294	timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
	295	timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
	296	timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
	297
	298	realview_timer_init(IRQ_DC1176_TIMER0);
	299	}
	300
	301	static struct sys_timer realview_pb1176_timer = {
	302	.init = realview_pb1176_timer_init,
	303	};
	304
426fcd2a PJ	305	static void realview_pb1176_reset(char mode)
426fcd2a PJ	306	{
4c9f8be7 CT	307	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	308	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	309	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	310	__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
426fcd2a PJ	311	}
426fcd2a PJ	312
5b39d154 CM	313	static void realview_pb1176_fixup(struct machine_desc *mdesc,
	314	struct tag tags, char *from,
	315	struct meminfo *meminfo)
	316	{
	317	/*
	318	* RealView PB1176 only has 128MB of RAM mapped at 0.
	319	*/
	320	meminfo->bank[0].start = 0;
	321	meminfo->bank[0].size = SZ_128M;
	322	meminfo->nr_banks = 1;
	323	}
	324
a0316b24 BB	325	static void __init realview_pb1176_init(void)
	326	{
	327	int i;
	328
ba927951	329	#ifdef CONFIG_CACHE_L2X0
a0316b24 BB	330	/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
a0316b24 BB	331	l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
ba927951	332	#endif
a0316b24	333
af607747 CM	334	realview_flash_register(realview_pb1176_flash_resources,
af607747 CM	335	PB1176_FLASH_BLOCKS);
0a381330	336	realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
533ad5e6	337	platform_device_register(&realview_i2c_device);
7db21712	338	realview_usb_register(realview_pb1176_isp1761_resources);
f417cbad	339	platform_device_register(&pmu_device);
a0316b24 BB	340
	341	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	342	struct amba_device *d = amba_devs[i];
	343	amba_device_register(d, &iomem_resource);
	344	}
	345
	346	#ifdef CONFIG_LEDS
	347	leds_event = realview_leds_event;
	348	#endif
426fcd2a	349	realview_reset = realview_pb1176_reset;
a0316b24 BB	350	}
	351
	352	MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
	353	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	354	.phys_io = REALVIEW_PB1176_UART0_BASE,
	355	.io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
70bb62f8	356	.boot_params = PHYS_OFFSET + 0x00000100,
5b39d154	357	.fixup = realview_pb1176_fixup,
a0316b24 BB	358	.map_io = realview_pb1176_map_io,
	359	.init_irq = gic_init_irq,
	360	.timer = &realview_pb1176_timer,
	361	.init_machine = realview_pb1176_init,
	362	MACHINE_END