[linux-2.6-block.git] / arch / arm / mach-davinci / board-dm644x-evm.c

/*
 * TI DaVinci EVM board support
 *
 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
 *
 * 2007 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/i2c/pcf857x.h>
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/phy.h>
#include <linux/clk.h>
#include <linux/videodev2.h>

#include <media/tvp514x.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/mux.h>
#include <mach/nand.h>
#include <mach/mmc.h>
#include <mach/usb.h>

#define DM644X_EVM_PHY_MASK		(0x2)
#define DM644X_EVM_MDIO_FREQUENCY	(2200000) /* PHY bus frequency */

#define LXT971_PHY_ID	(0x001378e2)
#define LXT971_PHY_MASK	(0xfffffff0)

static struct mtd_partition davinci_evm_norflash_partitions[] = {
	/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
	{
		.name		= "bootloader",
		.offset		= 0,
		.size		= 5 * SZ_64K,
		.mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next 1 sectors */
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_64K,
		.mask_flags	= 0,
	},
	/* kernel */
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0
	},
	/* file system */
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0
	}
};

static struct physmap_flash_data davinci_evm_norflash_data = {
	.width		= 2,
	.parts		= davinci_evm_norflash_partitions,
	.nr_parts	= ARRAY_SIZE(davinci_evm_norflash_partitions),
};

/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
 * limits addresses to 16M, so using addresses past 16M will wrap */
static struct resource davinci_evm_norflash_resource = {
	.start		= DM644X_ASYNC_EMIF_DATA_CE0_BASE,
	.end		= DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device davinci_evm_norflash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &davinci_evm_norflash_data,
	},
	.num_resources	= 1,
	.resource	= &davinci_evm_norflash_resource,
};

/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
 * It may used instead of the (default) NOR chip to boot, using TI's
 * tools to install the secondary boot loader (UBL) and U-Boot.
 */
static struct mtd_partition davinci_evm_nandflash_partition[] = {
	/* Bootloader layout depends on whose u-boot is installed, but we
	 * can hide all the details.
	 *  - block 0 for u-boot environment ... in mainline u-boot
	 *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
	 *  - blocks 6...? for u-boot
	 *  - blocks 16..23 for u-boot environment ... in TI's u-boot
	 */
	{
		.name		= "bootloader",
		.offset		= 0,
		.size		= SZ_256K + SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* Kernel */
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_4M,
		.mask_flags	= 0,
	},
	/* File system (older GIT kernels started this on the 5MB mark) */
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	}
	/* A few blocks at end hold a flash BBT ... created by TI's CCS
	 * using flashwriter_nand.out, but ignored by TI's versions of
	 * Linux and u-boot.  We boot faster by using them.
	 */
};

static struct davinci_nand_pdata davinci_evm_nandflash_data = {
	.parts		= davinci_evm_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(davinci_evm_nandflash_partition),
	.ecc_mode	= NAND_ECC_HW,
	.options	= NAND_USE_FLASH_BBT,
};

static struct resource davinci_evm_nandflash_resource[] = {
	{
		.start		= DM644X_ASYNC_EMIF_DATA_CE0_BASE,
		.end		= DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
		.flags		= IORESOURCE_MEM,
	}, {
		.start		= DM644X_ASYNC_EMIF_CONTROL_BASE,
		.end		= DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device davinci_evm_nandflash_device = {
	.name		= "davinci_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &davinci_evm_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(davinci_evm_nandflash_resource),
	.resource	= davinci_evm_nandflash_resource,
};

static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);

static struct platform_device davinci_fb_device = {
	.name		= "davincifb",
	.id		= -1,
	.dev = {
		.dma_mask		= &davinci_fb_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
	.num_resources = 0,
};

static struct tvp514x_platform_data tvp5146_pdata = {
	.clk_polarity = 0,
	.hs_polarity = 1,
	.vs_polarity = 1
};

#define TVP514X_STD_ALL	(V4L2_STD_NTSC | V4L2_STD_PAL)
/* Inputs available at the TVP5146 */
static struct v4l2_input tvp5146_inputs[] = {
	{
		.index = 0,
		.name = "Composite",
		.type = V4L2_INPUT_TYPE_CAMERA,
		.std = TVP514X_STD_ALL,
	},
	{
		.index = 1,
		.name = "S-Video",
		.type = V4L2_INPUT_TYPE_CAMERA,
		.std = TVP514X_STD_ALL,
	},
};

/*
 * this is the route info for connecting each input to decoder
 * ouput that goes to vpfe. There is a one to one correspondence
 * with tvp5146_inputs
 */
static struct vpfe_route tvp5146_routes[] = {
	{
		.input = INPUT_CVBS_VI2B,
		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	},
	{
		.input = INPUT_SVIDEO_VI2C_VI1C,
		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	},
};

static struct vpfe_subdev_info vpfe_sub_devs[] = {
	{
		.name = "tvp5146",
		.grp_id = 0,
		.num_inputs = ARRAY_SIZE(tvp5146_inputs),
		.inputs = tvp5146_inputs,
		.routes = tvp5146_routes,
		.can_route = 1,
		.ccdc_if_params = {
			.if_type = VPFE_BT656,
			.hdpol = VPFE_PINPOL_POSITIVE,
			.vdpol = VPFE_PINPOL_POSITIVE,
		},
		.board_info = {
			I2C_BOARD_INFO("tvp5146", 0x5d),
			.platform_data = &tvp5146_pdata,
		},
	},
};

static struct vpfe_config vpfe_cfg = {
	.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
	.i2c_adapter_id = 1,
	.sub_devs = vpfe_sub_devs,
	.card_name = "DM6446 EVM",
	.ccdc = "DM6446 CCDC",
};

static struct platform_device rtc_dev = {
	.name           = "rtc_davinci_evm",
	.id             = -1,
};

static struct snd_platform_data dm644x_evm_snd_data;

/*----------------------------------------------------------------------*/

/*
 * I2C GPIO expanders
 */

#define PCF_Uxx_BASE(x)	(DAVINCI_N_GPIO + ((x) * 8))


/* U2 -- LEDs */

static struct gpio_led evm_leds[] = {
	{ .name = "DS8", .active_low = 1,
		.default_trigger = "heartbeat", },
	{ .name = "DS7", .active_low = 1, },
	{ .name = "DS6", .active_low = 1, },
	{ .name = "DS5", .active_low = 1, },
	{ .name = "DS4", .active_low = 1, },
	{ .name = "DS3", .active_low = 1, },
	{ .name = "DS2", .active_low = 1,
		.default_trigger = "mmc0", },
	{ .name = "DS1", .active_low = 1,
		.default_trigger = "ide-disk", },
};

static const struct gpio_led_platform_data evm_led_data = {
	.num_leds	= ARRAY_SIZE(evm_leds),
	.leds		= evm_leds,
};

static struct platform_device *evm_led_dev;

static int
evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	struct gpio_led *leds = evm_leds;
	int status;

	while (ngpio--) {
		leds->gpio = gpio++;
		leds++;
	}

	/* what an extremely annoying way to be forced to handle
	 * device unregistration ...
	 */
	evm_led_dev = platform_device_alloc("leds-gpio", 0);
	platform_device_add_data(evm_led_dev,
			&evm_led_data, sizeof evm_led_data);

	evm_led_dev->dev.parent = &client->dev;
	status = platform_device_add(evm_led_dev);
	if (status < 0) {
		platform_device_put(evm_led_dev);
		evm_led_dev = NULL;
	}
	return status;
}

static int
evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	if (evm_led_dev) {
		platform_device_unregister(evm_led_dev);
		evm_led_dev = NULL;
	}
	return 0;
}

static struct pcf857x_platform_data pcf_data_u2 = {
	.gpio_base	= PCF_Uxx_BASE(0),
	.setup		= evm_led_setup,
	.teardown	= evm_led_teardown,
};


/* U18 - A/V clock generator and user switch */

static int sw_gpio;

static ssize_t
sw_show(struct device *d, struct device_attribute *a, char *buf)
{
	char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";

	strcpy(buf, s);
	return strlen(s);
}

static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);

static int
evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	int	status;

	/* export dip switch option */
	sw_gpio = gpio + 7;
	status = gpio_request(sw_gpio, "user_sw");
	if (status == 0)
		status = gpio_direction_input(sw_gpio);
	if (status == 0)
		status = device_create_file(&client->dev, &dev_attr_user_sw);
	else
		gpio_free(sw_gpio);
	if (status != 0)
		sw_gpio = -EINVAL;

	/* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
	gpio_request(gpio + 3, "pll_fs2");
	gpio_direction_output(gpio + 3, 0);

	gpio_request(gpio + 2, "pll_fs1");
	gpio_direction_output(gpio + 2, 0);

	gpio_request(gpio + 1, "pll_sr");
	gpio_direction_output(gpio + 1, 0);

	return 0;
}

static int
evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	gpio_free(gpio + 1);
	gpio_free(gpio + 2);
	gpio_free(gpio + 3);

	if (sw_gpio > 0) {
		device_remove_file(&client->dev, &dev_attr_user_sw);
		gpio_free(sw_gpio);
	}
	return 0;
}

static struct pcf857x_platform_data pcf_data_u18 = {
	.gpio_base	= PCF_Uxx_BASE(1),
	.n_latch	= (1 << 3) | (1 << 2) | (1 << 1),
	.setup		= evm_u18_setup,
	.teardown	= evm_u18_teardown,
};


/* U35 - various I/O signals used to manage USB, CF, ATA, etc */

static int
evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	/* p0 = nDRV_VBUS (initial:  don't supply it) */
	gpio_request(gpio + 0, "nDRV_VBUS");
	gpio_direction_output(gpio + 0, 1);

	/* p1 = VDDIMX_EN */
	gpio_request(gpio + 1, "VDDIMX_EN");
	gpio_direction_output(gpio + 1, 1);

	/* p2 = VLYNQ_EN */
	gpio_request(gpio + 2, "VLYNQ_EN");
	gpio_direction_output(gpio + 2, 1);

	/* p3 = n3V3_CF_RESET (initial: stay in reset) */
	gpio_request(gpio + 3, "nCF_RESET");
	gpio_direction_output(gpio + 3, 0);

	/* (p4 unused) */

	/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
	gpio_request(gpio + 5, "WLAN_RESET");
	gpio_direction_output(gpio + 5, 1);

	/* p6 = nATA_SEL (initial: select) */
	gpio_request(gpio + 6, "nATA_SEL");
	gpio_direction_output(gpio + 6, 0);

	/* p7 = nCF_SEL (initial: deselect) */
	gpio_request(gpio + 7, "nCF_SEL");
	gpio_direction_output(gpio + 7, 1);

	/* irlml6401 switches over 1A, in under 8 msec;
	 * now it can be managed by nDRV_VBUS ...
	 */
	davinci_setup_usb(1000, 8);

	return 0;
}

static int
evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	gpio_free(gpio + 7);
	gpio_free(gpio + 6);
	gpio_free(gpio + 5);
	gpio_free(gpio + 3);
	gpio_free(gpio + 2);
	gpio_free(gpio + 1);
	gpio_free(gpio + 0);
	return 0;
}

static struct pcf857x_platform_data pcf_data_u35 = {
	.gpio_base	= PCF_Uxx_BASE(2),
	.setup		= evm_u35_setup,
	.teardown	= evm_u35_teardown,
};

/*----------------------------------------------------------------------*/

/* Most of this EEPROM is unused, but U-Boot uses some data:
 *  - 0x7f00, 6 bytes Ethernet Address
 *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
 *  - ... newer boards may have more
 */

static struct at24_platform_data eeprom_info = {
	.byte_len	= (256*1024) / 8,
	.page_size	= 64,
	.flags		= AT24_FLAG_ADDR16,
	.setup          = davinci_get_mac_addr,
	.context	= (void *)0x7f00,
};

/*
 * MSP430 supports RTC, card detection, input from IR remote, and
 * a bit more.  It triggers interrupts on GPIO(7) from pressing
 * buttons on the IR remote, and for card detect switches.
 */
static struct i2c_client *dm6446evm_msp;

static int dm6446evm_msp_probe(struct i2c_client *client,
		const struct i2c_device_id *id)
{
	dm6446evm_msp = client;
	return 0;
}

static int dm6446evm_msp_remove(struct i2c_client *client)
{
	dm6446evm_msp = NULL;
	return 0;
}

static const struct i2c_device_id dm6446evm_msp_ids[] = {
	{ "dm6446evm_msp", 0, },
	{ /* end of list */ },
};

static struct i2c_driver dm6446evm_msp_driver = {
	.driver.name	= "dm6446evm_msp",
	.id_table	= dm6446evm_msp_ids,
	.probe		= dm6446evm_msp_probe,
	.remove		= dm6446evm_msp_remove,
};

static int dm6444evm_msp430_get_pins(void)
{
	static const char txbuf[2] = { 2, 4, };
	char buf[4];
	struct i2c_msg msg[2] = {
		{
			.addr = dm6446evm_msp->addr,
			.flags = 0,
			.len = 2,
			.buf = (void __force *)txbuf,
		},
		{
			.addr = dm6446evm_msp->addr,
			.flags = I2C_M_RD,
			.len = 4,
			.buf = buf,
		},
	};
	int status;

	if (!dm6446evm_msp)
		return -ENXIO;

	/* Command 4 == get input state, returns port 2 and port3 data
	 *   S Addr W [A] len=2 [A] cmd=4 [A]
	 *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
	 */
	status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
	if (status < 0)
		return status;

	dev_dbg(&dm6446evm_msp->dev,
		"PINS: %02x %02x %02x %02x\n",
		buf[0], buf[1], buf[2], buf[3]);

	return (buf[3] << 8) | buf[2];
}

static int dm6444evm_mmc_get_cd(int module)
{
	int status = dm6444evm_msp430_get_pins();

	return (status < 0) ? status : !(status & BIT(1));
}

static int dm6444evm_mmc_get_ro(int module)
{
	int status = dm6444evm_msp430_get_pins();

	return (status < 0) ? status : status & BIT(6 + 8);
}

static struct davinci_mmc_config dm6446evm_mmc_config = {
	.get_cd		= dm6444evm_mmc_get_cd,
	.get_ro		= dm6444evm_mmc_get_ro,
	.wires		= 4,
	.version	= MMC_CTLR_VERSION_1
};

static struct i2c_board_info __initdata i2c_info[] =  {
	{
		I2C_BOARD_INFO("dm6446evm_msp", 0x23),
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x38),
		.platform_data	= &pcf_data_u2,
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x39),
		.platform_data	= &pcf_data_u18,
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x3a),
		.platform_data	= &pcf_data_u35,
	},
	{
		I2C_BOARD_INFO("24c256", 0x50),
		.platform_data	= &eeprom_info,
	},
	{
		I2C_BOARD_INFO("tlv320aic33", 0x1b),
	},
};

/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
 * which requires 100 usec of idle bus after i2c writes sent to it.
 */
static struct davinci_i2c_platform_data i2c_pdata = {
	.bus_freq	= 20 /* kHz */,
	.bus_delay	= 100 /* usec */,
	.sda_pin        = 44,
	.scl_pin        = 43,
};

static void __init evm_init_i2c(void)
{
	davinci_init_i2c(&i2c_pdata);
	i2c_add_driver(&dm6446evm_msp_driver);
	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}

static struct platform_device *davinci_evm_devices[] __initdata = {
	&davinci_fb_device,
	&rtc_dev,
};

static struct davinci_uart_config uart_config __initdata = {
	.enabled_uarts = (1 << 0),
};

static void __init
davinci_evm_map_io(void)
{
	/* setup input configuration for VPFE input devices */
	dm644x_set_vpfe_config(&vpfe_cfg);
	dm644x_init();
}

static int davinci_phy_fixup(struct phy_device *phydev)
{
	unsigned int control;
	/* CRITICAL: Fix for increasing PHY signal drive strength for
	 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
	 * signal strength was low causing  TX to fail randomly. The
	 * fix is to Set bit 11 (Increased MII drive strength) of PHY
	 * register 26 (Digital Config register) on this phy. */
	control = phy_read(phydev, 26);
	phy_write(phydev, 26, (control | 0x800));
	return 0;
}

#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
    defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
#define HAS_ATA 1
#else
#define HAS_ATA 0
#endif

#if defined(CONFIG_MTD_PHYSMAP) || \
    defined(CONFIG_MTD_PHYSMAP_MODULE)
#define HAS_NOR 1
#else
#define HAS_NOR 0
#endif

#if defined(CONFIG_MTD_NAND_DAVINCI) || \
    defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
#define HAS_NAND 1
#else
#define HAS_NAND 0
#endif

static __init void davinci_evm_init(void)
{
	struct clk *aemif_clk;
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	aemif_clk = clk_get(NULL, "aemif");
	clk_enable(aemif_clk);

	if (HAS_ATA) {
		if (HAS_NAND || HAS_NOR)
			pr_warning("WARNING: both IDE and Flash are "
				"enabled, but they share AEMIF pins.\n"
				"\tDisable IDE for NAND/NOR support.\n");
		davinci_init_ide();
	} else if (HAS_NAND || HAS_NOR) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN_DISABLE);

		/* only one device will be jumpered and detected */
		if (HAS_NAND) {
			platform_device_register(&davinci_evm_nandflash_device);
			evm_leds[7].default_trigger = "nand-disk";
			if (HAS_NOR)
				pr_warning("WARNING: both NAND and NOR flash "
					"are enabled; disable one of them.\n");
		} else if (HAS_NOR)
			platform_device_register(&davinci_evm_norflash_device);
	}

	platform_add_devices(davinci_evm_devices,
			     ARRAY_SIZE(davinci_evm_devices));
	evm_init_i2c();

	davinci_setup_mmc(0, &dm6446evm_mmc_config);

	davinci_serial_init(&uart_config);
	dm644x_init_asp(&dm644x_evm_snd_data);

	soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;

	/* Register the fixup for PHY on DaVinci */
	phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
					davinci_phy_fixup);

}

MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
	/* Maintainer: MontaVista Software <source@mvista.com> */
	.phys_io      = IO_PHYS,
	.io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params  = (DAVINCI_DDR_BASE + 0x100),
	.map_io	      = davinci_evm_map_io,
	.init_irq     = davinci_irq_init,
	.timer	      = &davinci_timer,
	.init_machine = davinci_evm_init,
MACHINE_END
Commit	Line	Data
7c6337e2 KH	1	/*
	2	* TI DaVinci EVM board support
	3	*
	4	* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
	5	*
	6	* 2007 (c) MontaVista Software, Inc. This file is licensed under
	7	* the terms of the GNU General Public License version 2. This program
	8	* is licensed "as is" without any warranty of any kind, whether express
	9	* or implied.
	10	*/
	11	#include <linux/kernel.h>
7c6337e2 KH	12	#include <linux/init.h>
	13	#include <linux/dma-mapping.h>
	14	#include <linux/platform_device.h>
7bff3c4c	15	#include <linux/gpio.h>
7bff3c4c DB	16	#include <linux/i2c.h>
	17	#include <linux/i2c/pcf857x.h>
	18	#include <linux/i2c/at24.h>
7c6337e2	19	#include <linux/mtd/mtd.h>
d0e47fba	20	#include <linux/mtd/nand.h>
7c6337e2 KH	21	#include <linux/mtd/partitions.h>
7c6337e2 KH	22	#include <linux/mtd/physmap.h>
d0e47fba KH	23	#include <linux/phy.h>
d0e47fba KH	24	#include <linux/clk.h>
ab8e8df8 MK	25	#include <linux/videodev2.h>
	26
	27	#include <media/tvp514x.h>
7c6337e2	28
7c6337e2	29	#include <asm/mach-types.h>
7c6337e2	30	#include <asm/mach/arch.h>
7c6337e2	31
d0e47fba	32	#include <mach/dm644x.h>
a09e64fb	33	#include <mach/common.h>
7bff3c4c	34	#include <mach/i2c.h>
d0e47fba KH	35	#include <mach/serial.h>
d0e47fba KH	36	#include <mach/mux.h>
d0e47fba	37	#include <mach/nand.h>
2dbf56ae	38	#include <mach/mmc.h>
355fb4e3	39	#include <mach/usb.h>
d0e47fba KH	40
	41	#define DM644X_EVM_PHY_MASK (0x2)
	42	#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
7c6337e2	43
d0e47fba KH	44	#define LXT971_PHY_ID (0x001378e2)
d0e47fba KH	45	#define LXT971_PHY_MASK (0xfffffff0)
7c6337e2	46
7bff3c4c	47	static struct mtd_partition davinci_evm_norflash_partitions[] = {
d0e47fba	48	/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
7c6337e2 KH	49	{
	50	.name = "bootloader",
	51	.offset = 0,
d0e47fba	52	.size = 5 * SZ_64K,
7c6337e2 KH	53	.mask_flags = MTD_WRITEABLE, /* force read-only */
	54	},
	55	/* bootloader params in the next 1 sectors */
	56	{
	57	.name = "params",
	58	.offset = MTDPART_OFS_APPEND,
	59	.size = SZ_64K,
	60	.mask_flags = 0,
	61	},
	62	/* kernel */
	63	{
	64	.name = "kernel",
	65	.offset = MTDPART_OFS_APPEND,
	66	.size = SZ_2M,
	67	.mask_flags = 0
	68	},
	69	/* file system */
	70	{
	71	.name = "filesystem",
	72	.offset = MTDPART_OFS_APPEND,
	73	.size = MTDPART_SIZ_FULL,
	74	.mask_flags = 0
	75	}
	76	};
	77
7bff3c4c	78	static struct physmap_flash_data davinci_evm_norflash_data = {
7c6337e2	79	.width = 2,
7bff3c4c DB	80	.parts = davinci_evm_norflash_partitions,
7bff3c4c DB	81	.nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
7c6337e2 KH	82	};
	83
	84	/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
	85	* limits addresses to 16M, so using addresses past 16M will wrap */
7bff3c4c	86	static struct resource davinci_evm_norflash_resource = {
70342174 SS	87	.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
70342174 SS	88	.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
7c6337e2 KH	89	.flags = IORESOURCE_MEM,
	90	};
	91
7bff3c4c	92	static struct platform_device davinci_evm_norflash_device = {
7c6337e2 KH	93	.name = "physmap-flash",
	94	.id = 0,
	95	.dev = {
7bff3c4c	96	.platform_data = &davinci_evm_norflash_data,
7c6337e2 KH	97	},
7c6337e2 KH	98	.num_resources = 1,
7bff3c4c DB	99	.resource = &davinci_evm_norflash_resource,
	100	};
	101
3e9c18e1 DB	102	/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
	103	* It may used instead of the (default) NOR chip to boot, using TI's
	104	* tools to install the secondary boot loader (UBL) and U-Boot.
	105	*/
28552c2e	106	static struct mtd_partition davinci_evm_nandflash_partition[] = {
3e9c18e1 DB	107	/* Bootloader layout depends on whose u-boot is installed, but we
	108	* can hide all the details.
	109	* - block 0 for u-boot environment ... in mainline u-boot
	110	* - block 1 for UBL (plus up to four backup copies in blocks 2..5)
	111	* - blocks 6...? for u-boot
	112	* - blocks 16..23 for u-boot environment ... in TI's u-boot
	113	*/
	114	{
	115	.name = "bootloader",
	116	.offset = 0,
	117	.size = SZ_256K + SZ_128K,
	118	.mask_flags = MTD_WRITEABLE, /* force read-only */
	119	},
	120	/* Kernel */
d0e47fba	121	{
3e9c18e1 DB	122	.name = "kernel",
	123	.offset = MTDPART_OFS_APPEND,
	124	.size = SZ_4M,
	125	.mask_flags = 0,
	126	},
	127	/* File system (older GIT kernels started this on the 5MB mark) */
	128	{
	129	.name = "filesystem",
	130	.offset = MTDPART_OFS_APPEND,
d0e47fba KH	131	.size = MTDPART_SIZ_FULL,
	132	.mask_flags = 0,
	133	}
3e9c18e1 DB	134	/* A few blocks at end hold a flash BBT ... created by TI's CCS
	135	* using flashwriter_nand.out, but ignored by TI's versions of
	136	* Linux and u-boot. We boot faster by using them.
	137	*/
d0e47fba	138	};
7bff3c4c	139
d0e47fba KH	140	static struct davinci_nand_pdata davinci_evm_nandflash_data = {
	141	.parts = davinci_evm_nandflash_partition,
	142	.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
	143	.ecc_mode = NAND_ECC_HW,
3e9c18e1	144	.options = NAND_USE_FLASH_BBT,
d0e47fba KH	145	};
	146
	147	static struct resource davinci_evm_nandflash_resource[] = {
	148	{
70342174 SS	149	.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
70342174 SS	150	.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
d0e47fba KH	151	.flags = IORESOURCE_MEM,
d0e47fba KH	152	}, {
70342174 SS	153	.start = DM644X_ASYNC_EMIF_CONTROL_BASE,
70342174 SS	154	.end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
d0e47fba KH	155	.flags = IORESOURCE_MEM,
	156	},
	157	};
	158
	159	static struct platform_device davinci_evm_nandflash_device = {
	160	.name = "davinci_nand",
	161	.id = 0,
	162	.dev = {
	163	.platform_data = &davinci_evm_nandflash_data,
	164	},
	165	.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
	166	.resource = davinci_evm_nandflash_resource,
	167	};
	168
3e9c18e1	169	static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
d0e47fba KH	170
	171	static struct platform_device davinci_fb_device = {
	172	.name = "davincifb",
	173	.id = -1,
	174	.dev = {
	175	.dma_mask = &davinci_fb_dma_mask,
3e9c18e1	176	.coherent_dma_mask = DMA_BIT_MASK(32),
d0e47fba KH	177	},
	178	.num_resources = 0,
	179	};
	180
ab8e8df8 MK	181	static struct tvp514x_platform_data tvp5146_pdata = {
	182	.clk_polarity = 0,
	183	.hs_polarity = 1,
	184	.vs_polarity = 1
	185	};
	186
	187	#define TVP514X_STD_ALL (V4L2_STD_NTSC \| V4L2_STD_PAL)
	188	/* Inputs available at the TVP5146 */
	189	static struct v4l2_input tvp5146_inputs[] = {
	190	{
	191	.index = 0,
	192	.name = "Composite",
	193	.type = V4L2_INPUT_TYPE_CAMERA,
	194	.std = TVP514X_STD_ALL,
	195	},
	196	{
	197	.index = 1,
	198	.name = "S-Video",
	199	.type = V4L2_INPUT_TYPE_CAMERA,
	200	.std = TVP514X_STD_ALL,
	201	},
	202	};
	203
	204	/*
	205	* this is the route info for connecting each input to decoder
	206	* ouput that goes to vpfe. There is a one to one correspondence
	207	* with tvp5146_inputs
	208	*/
	209	static struct vpfe_route tvp5146_routes[] = {
	210	{
	211	.input = INPUT_CVBS_VI2B,
	212	.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	213	},
	214	{
	215	.input = INPUT_SVIDEO_VI2C_VI1C,
	216	.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	217	},
	218	};
	219
	220	static struct vpfe_subdev_info vpfe_sub_devs[] = {
	221	{
	222	.name = "tvp5146",
	223	.grp_id = 0,
	224	.num_inputs = ARRAY_SIZE(tvp5146_inputs),
	225	.inputs = tvp5146_inputs,
	226	.routes = tvp5146_routes,
	227	.can_route = 1,
	228	.ccdc_if_params = {
	229	.if_type = VPFE_BT656,
	230	.hdpol = VPFE_PINPOL_POSITIVE,
	231	.vdpol = VPFE_PINPOL_POSITIVE,
	232	},
	233	.board_info = {
	234	I2C_BOARD_INFO("tvp5146", 0x5d),
	235	.platform_data = &tvp5146_pdata,
	236	},
	237	},
	238	};
	239
	240	static struct vpfe_config vpfe_cfg = {
	241	.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
077639f4	242	.i2c_adapter_id = 1,
ab8e8df8 MK	243	.sub_devs = vpfe_sub_devs,
	244	.card_name = "DM6446 EVM",
	245	.ccdc = "DM6446 CCDC",
	246	};
	247
d0e47fba KH	248	static struct platform_device rtc_dev = {
	249	.name = "rtc_davinci_evm",
	250	.id = -1,
	251	};
7bff3c4c	252
61aa0732	253	static struct snd_platform_data dm644x_evm_snd_data;
25acf553	254
7bff3c4c DB	255	/----------------------------------------------------------------------/
	256
	257	/*
	258	* I2C GPIO expanders
	259	*/
	260
	261	#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
	262
	263
	264	/* U2 -- LEDs */
	265
	266	static struct gpio_led evm_leds[] = {
	267	{ .name = "DS8", .active_low = 1,
	268	.default_trigger = "heartbeat", },
	269	{ .name = "DS7", .active_low = 1, },
	270	{ .name = "DS6", .active_low = 1, },
	271	{ .name = "DS5", .active_low = 1, },
	272	{ .name = "DS4", .active_low = 1, },
	273	{ .name = "DS3", .active_low = 1, },
	274	{ .name = "DS2", .active_low = 1,
	275	.default_trigger = "mmc0", },
	276	{ .name = "DS1", .active_low = 1,
	277	.default_trigger = "ide-disk", },
	278	};
	279
	280	static const struct gpio_led_platform_data evm_led_data = {
	281	.num_leds = ARRAY_SIZE(evm_leds),
	282	.leds = evm_leds,
	283	};
	284
	285	static struct platform_device *evm_led_dev;
	286
	287	static int
	288	evm_led_setup(struct i2c_client client, int gpio, unsigned ngpio, void c)
	289	{
	290	struct gpio_led *leds = evm_leds;
	291	int status;
	292
	293	while (ngpio--) {
	294	leds->gpio = gpio++;
	295	leds++;
	296	}
	297
	298	/* what an extremely annoying way to be forced to handle
	299	* device unregistration ...
	300	*/
	301	evm_led_dev = platform_device_alloc("leds-gpio", 0);
	302	platform_device_add_data(evm_led_dev,
	303	&evm_led_data, sizeof evm_led_data);
	304
	305	evm_led_dev->dev.parent = &client->dev;
	306	status = platform_device_add(evm_led_dev);
	307	if (status < 0) {
	308	platform_device_put(evm_led_dev);
	309	evm_led_dev = NULL;
	310	}
	311	return status;
	312	}
	313
	314	static int
	315	evm_led_teardown(struct i2c_client client, int gpio, unsigned ngpio, void c)
	316	{
	317	if (evm_led_dev) {
	318	platform_device_unregister(evm_led_dev);
319	evm_led_dev = NULL;
320	}
321	return 0;
322	}
323
324	static struct pcf857x_platform_data pcf_data_u2 = {
325	.gpio_base = PCF_Uxx_BASE(0),
326	.setup = evm_led_setup,
327	.teardown = evm_led_teardown,
328	};
329
330
331	/* U18 - A/V clock generator and user switch */
332
333	static int sw_gpio;
334
335	static ssize_t
336	sw_show(struct device d, struct device_attribute a, char *buf)
337	{
338	char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
339
340	strcpy(buf, s);
341	return strlen(s);
342	}
343
344	static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
345
346	static int
347	evm_u18_setup(struct i2c_client client, int gpio, unsigned ngpio, void c)
348	{
349	int status;
350
351	/* export dip switch option */
352	sw_gpio = gpio + 7;
353	status = gpio_request(sw_gpio, "user_sw");
354	if (status == 0)
355	status = gpio_direction_input(sw_gpio);
356	if (status == 0)
357	status = device_create_file(&client->dev, &dev_attr_user_sw);
358	else
359	gpio_free(sw_gpio);
360	if (status != 0)
361	sw_gpio = -EINVAL;
362
363	/* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
364	gpio_request(gpio + 3, "pll_fs2");
365	gpio_direction_output(gpio + 3, 0);
366
367	gpio_request(gpio + 2, "pll_fs1");
368	gpio_direction_output(gpio + 2, 0);
369
370	gpio_request(gpio + 1, "pll_sr");
371	gpio_direction_output(gpio + 1, 0);
372
373	return 0;
374	}
375
376	static int
377	evm_u18_teardown(struct i2c_client client, int gpio, unsigned ngpio, void c)
378	{
379	gpio_free(gpio + 1);
380	gpio_free(gpio + 2);
381	gpio_free(gpio + 3);
382
383	if (sw_gpio > 0) {
384	device_remove_file(&client->dev, &dev_attr_user_sw);
385	gpio_free(sw_gpio);
386	}
387	return 0;
388	}
389
390	static struct pcf857x_platform_data pcf_data_u18 = {
391	.gpio_base = PCF_Uxx_BASE(1),
392	.n_latch = (1 << 3) \| (1 << 2) \| (1 << 1),
393	.setup = evm_u18_setup,
394	.teardown = evm_u18_teardown,
7c6337e2 KH	395	};
7c6337e2 KH	396
7bff3c4c DB	397
	398	/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
	399
	400	static int
	401	evm_u35_setup(struct i2c_client client, int gpio, unsigned ngpio, void c)
	402	{
	403	/* p0 = nDRV_VBUS (initial: don't supply it) */
	404	gpio_request(gpio + 0, "nDRV_VBUS");
	405	gpio_direction_output(gpio + 0, 1);
	406
	407	/* p1 = VDDIMX_EN */
	408	gpio_request(gpio + 1, "VDDIMX_EN");
	409	gpio_direction_output(gpio + 1, 1);
	410
	411	/* p2 = VLYNQ_EN */
	412	gpio_request(gpio + 2, "VLYNQ_EN");
	413	gpio_direction_output(gpio + 2, 1);
	414
	415	/* p3 = n3V3_CF_RESET (initial: stay in reset) */
	416	gpio_request(gpio + 3, "nCF_RESET");
	417	gpio_direction_output(gpio + 3, 0);
	418
	419	/* (p4 unused) */
	420
	421	/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
	422	gpio_request(gpio + 5, "WLAN_RESET");
	423	gpio_direction_output(gpio + 5, 1);
	424
	425	/* p6 = nATA_SEL (initial: select) */
	426	gpio_request(gpio + 6, "nATA_SEL");
	427	gpio_direction_output(gpio + 6, 0);
	428
	429	/* p7 = nCF_SEL (initial: deselect) */
	430	gpio_request(gpio + 7, "nCF_SEL");
	431	gpio_direction_output(gpio + 7, 1);
	432
d0e47fba KH	433	/* irlml6401 switches over 1A, in under 8 msec;
	434	* now it can be managed by nDRV_VBUS ...
	435	*/
355fb4e3	436	davinci_setup_usb(1000, 8);
34f32c97	437
7bff3c4c DB	438	return 0;
	439	}
	440
	441	static int
	442	evm_u35_teardown(struct i2c_client client, int gpio, unsigned ngpio, void c)
	443	{
	444	gpio_free(gpio + 7);
	445	gpio_free(gpio + 6);
	446	gpio_free(gpio + 5);
	447	gpio_free(gpio + 3);
	448	gpio_free(gpio + 2);
	449	gpio_free(gpio + 1);
	450	gpio_free(gpio + 0);
	451	return 0;
	452	}
	453
	454	static struct pcf857x_platform_data pcf_data_u35 = {
	455	.gpio_base = PCF_Uxx_BASE(2),
	456	.setup = evm_u35_setup,
	457	.teardown = evm_u35_teardown,
	458	};
	459
	460	/----------------------------------------------------------------------/
	461
	462	/* Most of this EEPROM is unused, but U-Boot uses some data:
	463	* - 0x7f00, 6 bytes Ethernet Address
	464	* - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
	465	* - ... newer boards may have more
	466	*/
d0e47fba	467
7bff3c4c DB	468	static struct at24_platform_data eeprom_info = {
	469	.byte_len = (256*1024) / 8,
	470	.page_size = 64,
	471	.flags = AT24_FLAG_ADDR16,
b14dc0f9 MG	472	.setup = davinci_get_mac_addr,
b14dc0f9 MG	473	.context = (void *)0x7f00,
d0e47fba KH	474	};
d0e47fba KH	475
d0e47fba KH	476	/*
	477	* MSP430 supports RTC, card detection, input from IR remote, and
	478	* a bit more. It triggers interrupts on GPIO(7) from pressing
	479	* buttons on the IR remote, and for card detect switches.
	480	*/
	481	static struct i2c_client *dm6446evm_msp;
	482
	483	static int dm6446evm_msp_probe(struct i2c_client *client,
	484	const struct i2c_device_id *id)
	485	{
	486	dm6446evm_msp = client;
	487	return 0;
	488	}
	489
	490	static int dm6446evm_msp_remove(struct i2c_client *client)
	491	{
	492	dm6446evm_msp = NULL;
	493	return 0;
	494	}
	495
	496	static const struct i2c_device_id dm6446evm_msp_ids[] = {
	497	{ "dm6446evm_msp", 0, },
	498	{ /* end of list */ },
	499	};
	500
	501	static struct i2c_driver dm6446evm_msp_driver = {
	502	.driver.name = "dm6446evm_msp",
	503	.id_table = dm6446evm_msp_ids,
	504	.probe = dm6446evm_msp_probe,
	505	.remove = dm6446evm_msp_remove,
7bff3c4c DB	506	};
7bff3c4c DB	507
d0e47fba KH	508	static int dm6444evm_msp430_get_pins(void)
	509	{
	510	static const char txbuf[2] = { 2, 4, };
	511	char buf[4];
	512	struct i2c_msg msg[2] = {
	513	{
	514	.addr = dm6446evm_msp->addr,
	515	.flags = 0,
	516	.len = 2,
	517	.buf = (void __force *)txbuf,
	518	},
	519	{
	520	.addr = dm6446evm_msp->addr,
	521	.flags = I2C_M_RD,
	522	.len = 4,
	523	.buf = buf,
	524	},
	525	};
	526	int status;
	527
	528	if (!dm6446evm_msp)
	529	return -ENXIO;
	530
	531	/* Command 4 == get input state, returns port 2 and port3 data
	532	* S Addr W [A] len=2 [A] cmd=4 [A]
	533	* RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
	534	*/
	535	status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
	536	if (status < 0)
	537	return status;
	538
	539	dev_dbg(&dm6446evm_msp->dev,
	540	"PINS: %02x %02x %02x %02x\n",
	541	buf[0], buf[1], buf[2], buf[3]);
	542
	543	return (buf[3] << 8) \| buf[2];
	544	}
	545
2dbf56ae KH	546	static int dm6444evm_mmc_get_cd(int module)
	547	{
	548	int status = dm6444evm_msp430_get_pins();
	549
	550	return (status < 0) ? status : !(status & BIT(1));
	551	}
	552
	553	static int dm6444evm_mmc_get_ro(int module)
	554	{
	555	int status = dm6444evm_msp430_get_pins();
	556
	557	return (status < 0) ? status : status & BIT(6 + 8);
	558	}
	559
	560	static struct davinci_mmc_config dm6446evm_mmc_config = {
	561	.get_cd = dm6444evm_mmc_get_cd,
	562	.get_ro = dm6444evm_mmc_get_ro,
	563	.wires = 4,
	564	.version = MMC_CTLR_VERSION_1
	565	};
	566
7bff3c4c	567	static struct i2c_board_info __initdata i2c_info[] = {
d0e47fba KH	568	{
	569	I2C_BOARD_INFO("dm6446evm_msp", 0x23),
	570	},
7bff3c4c DB	571	{
	572	I2C_BOARD_INFO("pcf8574", 0x38),
	573	.platform_data = &pcf_data_u2,
	574	},
	575	{
	576	I2C_BOARD_INFO("pcf8574", 0x39),
	577	.platform_data = &pcf_data_u18,
	578	},
	579	{
	580	I2C_BOARD_INFO("pcf8574", 0x3a),
	581	.platform_data = &pcf_data_u35,
	582	},
	583	{
	584	I2C_BOARD_INFO("24c256", 0x50),
	585	.platform_data = &eeprom_info,
	586	},
1a7ff8ff C	587	{
	588	I2C_BOARD_INFO("tlv320aic33", 0x1b),
	589	},
7bff3c4c DB	590	};
	591
	592	/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
	593	* which requires 100 usec of idle bus after i2c writes sent to it.
	594	*/
	595	static struct davinci_i2c_platform_data i2c_pdata = {
	596	.bus_freq = 20 /* kHz */,
	597	.bus_delay = 100 /* usec */,
00642f66 PJ	598	.sda_pin = 44,
00642f66 PJ	599	.scl_pin = 43,
7bff3c4c DB	600	};
	601
	602	static void __init evm_init_i2c(void)
	603	{
	604	davinci_init_i2c(&i2c_pdata);
d0e47fba	605	i2c_add_driver(&dm6446evm_msp_driver);
7bff3c4c DB	606	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
	607	}
	608
7c6337e2	609	static struct platform_device *davinci_evm_devices[] __initdata = {
d0e47fba KH	610	&davinci_fb_device,
	611	&rtc_dev,
	612	};
	613
	614	static struct davinci_uart_config uart_config __initdata = {
	615	.enabled_uarts = (1 << 0),
7c6337e2 KH	616	};
	617
	618	static void __init
	619	davinci_evm_map_io(void)
	620	{
ab8e8df8 MK	621	/* setup input configuration for VPFE input devices */
ab8e8df8 MK	622	dm644x_set_vpfe_config(&vpfe_cfg);
d0e47fba	623	dm644x_init();
7c6337e2 KH	624	}
7c6337e2 KH	625
d0e47fba	626	static int davinci_phy_fixup(struct phy_device *phydev)
7c6337e2	627	{
d0e47fba KH	628	unsigned int control;
	629	/* CRITICAL: Fix for increasing PHY signal drive strength for
	630	* TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
	631	* signal strength was low causing TX to fail randomly. The
	632	* fix is to Set bit 11 (Increased MII drive strength) of PHY
	633	* register 26 (Digital Config register) on this phy. */
	634	control = phy_read(phydev, 26);
	635	phy_write(phydev, 26, (control \| 0x800));
	636	return 0;
	637	}
	638
7bff3c4c DB	639	#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) \|\| \
7bff3c4c DB	640	defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
d0e47fba KH	641	#define HAS_ATA 1
	642	#else
	643	#define HAS_ATA 0
	644	#endif
	645
7bff3c4c DB	646	#if defined(CONFIG_MTD_PHYSMAP) \|\| \
7bff3c4c DB	647	defined(CONFIG_MTD_PHYSMAP_MODULE)
d0e47fba KH	648	#define HAS_NOR 1
	649	#else
	650	#define HAS_NOR 0
7bff3c4c	651	#endif
d0e47fba KH	652
	653	#if defined(CONFIG_MTD_NAND_DAVINCI) \|\| \
	654	defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
	655	#define HAS_NAND 1
	656	#else
	657	#define HAS_NAND 0
7c6337e2 KH	658	#endif
7c6337e2 KH	659
d0e47fba KH	660	static __init void davinci_evm_init(void)
	661	{
	662	struct clk *aemif_clk;
972412b6	663	struct davinci_soc_info *soc_info = &davinci_soc_info;
d0e47fba KH	664
	665	aemif_clk = clk_get(NULL, "aemif");
	666	clk_enable(aemif_clk);
	667
	668	if (HAS_ATA) {
	669	if (HAS_NAND \|\| HAS_NOR)
	670	pr_warning("WARNING: both IDE and Flash are "
	671	"enabled, but they share AEMIF pins.\n"
	672	"\tDisable IDE for NAND/NOR support.\n");
7a9978a1	673	davinci_init_ide();
d0e47fba KH	674	} else if (HAS_NAND \|\| HAS_NOR) {
	675	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	676	davinci_cfg_reg(DM644X_ATAEN_DISABLE);
	677
	678	/* only one device will be jumpered and detected */
	679	if (HAS_NAND) {
	680	platform_device_register(&davinci_evm_nandflash_device);
	681	evm_leds[7].default_trigger = "nand-disk";
	682	if (HAS_NOR)
	683	pr_warning("WARNING: both NAND and NOR flash "
	684	"are enabled; disable one of them.\n");
	685	} else if (HAS_NOR)
	686	platform_device_register(&davinci_evm_norflash_device);
	687	}
	688
7c6337e2 KH	689	platform_add_devices(davinci_evm_devices,
7c6337e2 KH	690	ARRAY_SIZE(davinci_evm_devices));
7bff3c4c	691	evm_init_i2c();
d0e47fba	692
2dbf56ae KH	693	davinci_setup_mmc(0, &dm6446evm_mmc_config);
2dbf56ae KH	694
d0e47fba	695	davinci_serial_init(&uart_config);
25acf553	696	dm644x_init_asp(&dm644x_evm_snd_data);
d0e47fba	697
972412b6 MG	698	soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
972412b6 MG	699	soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
ac7b75b5	700
d0e47fba KH	701	/* Register the fixup for PHY on DaVinci */
	702	phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
	703	davinci_phy_fixup);
	704
7c6337e2 KH	705	}
7c6337e2 KH	706
d0e47fba	707	MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
7c6337e2 KH	708	/* Maintainer: MontaVista Software <source@mvista.com> */
7c6337e2 KH	709	.phys_io = IO_PHYS,
ac7643e4	710	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
7c6337e2 KH	711	.boot_params = (DAVINCI_DDR_BASE + 0x100),
7c6337e2 KH	712	.map_io = davinci_evm_map_io,
bd808947	713	.init_irq = davinci_irq_init,
7c6337e2 KH	714	.timer = &davinci_timer,
	715	.init_machine = davinci_evm_init,
	716	MACHINE_END