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drm/i915: Rename skl_vco_freq to cdclk_pll.vco
2016-05-23 Ville Syrjälädrm/i915: Rename skl_vco_freq to cdclk_pll.vco
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2016-05-23 Ville Syrjälädrm/i915: Make 308 and 671 MHz cdclks more accurate...
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2016-05-23 Ville Syrjälädrm/i915: Move SKL+ DBUF enable/disable to display...
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2016-05-23 Ville Syrjälädrm/i915: Unify SKL cdclk init paths
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2016-05-23 Ville Syrjälädrm/i915: Beef up skl_sanitize_cdclk() a bit
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2016-05-23 Ville Syrjälädrm/i915: Keep track of preferred cdclk vco frequency...
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2016-05-23 Ville Syrjälädrm/i915: Allow enable/disable of DPLL0 around cdclk...
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2016-05-23 Ville Syrjälädrm/i915: Report the current DPLL0 vco on SKL/KBL
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2016-05-23 Ville Syrjälädrm/i915: Actually read out DPLL0 vco on skl from hardware
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2016-05-23 Ville Syrjälädrm/i915: Extract skl_calc_cdclk()
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2016-05-23 Ville Syrjälädrm/i915: Move the SKL DPLL0 VCO computation into intel_dp_c...
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2016-05-23 Ville Syrjälädrm/i915: Fix BXT min_pixclk after state readout
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2016-05-23 Ville Syrjälädrm/i915: Enable GSE interrupt on BDW+
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2016-05-13 Ville Syrjälädrm/i915: Ignore stale wm register values on resume...
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2016-05-13 Ville Syrjälädrm/i915: Don't leave old junk in ilk active watermarks...
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2016-05-13 Ville Syrjälädrm/i915: Eliminate the CDCLK_CTL RMW on BXT
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2016-05-13 Ville Syrjälädrm/i915: Program BXT_CDCLK_CD2X_PIPE
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2016-05-13 Ville Syrjälädrm/i915: s/required_vco/vco/ in skl cdclk code
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2016-05-13 Ville Syrjälädrm/i915: s/freq/cdclk/
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2016-05-13 Ville Syrjälädrm/i915: Kill off dead code from skl_dpll0_enable()
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2016-05-13 Ville Syrjälädrm/i915: Extract skl_dpll0_disable()
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2016-05-13 Ville Syrjälädrm/i915: Remove 10% cdclk guardband on BXT
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2016-05-13 Ville Syrjälädrm/i915: Use skl_cdclk_decimal() on bxt
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2016-05-13 Ville Syrjälädrm/i915: Use ilk_max_pixel_rate() for BXT cdclk calculation
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2016-05-13 Ville Syrjälädrm/i915: Don't pass dev_priv to broxton_calc_cdclk()
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2016-05-13 Ville Syrjälädrm/i915: Untangle .fdi_link_train and cdclk vfunc...
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2016-05-13 Ville Syrjälädrm/i915: Extract broadwell_calc_cdclk()
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2016-05-13 Ville Syrjälädrm/i915: Drop checks for max_pixclk failures in cdclk...
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2016-05-12 Ville Syrjälädrm/i915: s/DPPL/DPLL/ for SKL DPLLs
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2016-05-10 Ville Syrjälädrm/i915: Re-enable GGTT earlier during resume on pre...
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2016-05-09 Ville Syrjälädrm/i915: Add a FIXME about crtc !active vs. watermarks
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2016-05-09 Ville Syrjälädrm/i915: Calculate IPS linetime watermark based on...
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2016-05-09 Ville Syrjälädrm/i915: Determine DP++ type 1 DVI adaptor presence...
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2016-05-09 Ville Syrjälädrm/i915: Enable/disable TMDS output buffers in DP...
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2016-05-09 Ville Syrjälädrm/i915: Respect DP++ adaptor TMDS clock limit
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2016-05-09 Ville Syrjälädrm: Add helper for DP++ adaptors
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2016-05-03 Ville Syrjälämfd: intel_soc_pmic_core: Terminate panel control GPIO...
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2016-04-30 Ville Syrjälägpiolib-acpi: Duplicate con_id string when adding it...
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2016-04-28 Ville Syrjälädrm/i915: Fix comments about GMBUSFREQ register
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2016-04-28 Ville Syrjälädrm/i915: Use cached cdclk value in i915_audio_component_get...
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2016-04-28 Ville Syrjälädrm/i915: Update CDCLK_FREQ register on BDW after changing...
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2016-04-28 Ville Syrjälädrm/dp: Allow signals to interrupt drm_aux-dev reads...
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2016-04-27 Ville Syrjälädrm/i915: Update RAWCLK_FREQ register on VLV/CHV
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2016-04-27 Ville Syrjälädrm/i915: Unify VLV/CHV DPOunit clock gating disable...
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2016-04-27 Ville Syrjälädrm/i915: Make RPS EI/thresholds multiple of 25 on...
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2016-04-22 Ville Syrjälädrm/i915: Make RPS EI/thresholds multiple of 25 on...
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2016-04-19 Ville Syrjälädrm/i915: Wait for power cycle delay after turning...
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2016-04-19 Ville Syrjälädrm/i915: Define HSW/BDW display power domains the...
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2016-04-19 Ville Syrjälädrm/i915: Define VLV/CHV display power well domains...
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2016-04-19 Ville Syrjälädrm/i915: Set .domains=POWER_DOMAIN_MASK for the always...
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2016-04-19 Ville Syrjälädrm/i915: Fix oops in vlv_force_pll_on()
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2016-04-18 Ville Syrjälädrm/i915: Replace nondescript 'WARN_ON(!lret)' with...
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2016-04-18 Ville Syrjälädrm/atomic-helper: Print an error if vblank wait times out
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2016-04-18 Ville Syrjälädrm/i915: Use fw_domains_put_with_fifo() on HSW
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2016-04-15 Ville Syrjälädrm/i915: Reject 'Center' scaling mode for eDP/DSI...
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2016-04-15 Ville Syrjälädrm/i915: Hook up pfit for DSI
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2016-04-15 Ville Syrjälädrm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()
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2016-04-15 Ville Syrjälädrm/i915: Compute DSI PLL parameters during .compute_config()
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2016-04-15 Ville Syrjälädrm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
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2016-04-14 Ville Syrjälädrm/i915: Use fw_domains_put_with_fifo() on HSW
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2016-04-14 Ville Syrjälädrm/i915: Split gen8_gt_irq_handler into ack+handle
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2016-04-14 Ville Syrjälädrm/i915: Eliminate passing dev+dev_priv to {snb,ilk...
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2016-04-14 Ville Syrjälädrm/i915: Move gt/pm irq handling out from irq disabled...
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2016-04-14 Ville Syrjälädrm/i915: Split VLV/CVH PIPESTAT handling into ack...
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2016-04-14 Ville Syrjälädrm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_...
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2016-04-14 Ville Syrjälädrm/i915: Move variables to narrower scope in VLV/CHV...
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2016-04-14 Ville Syrjälädrm/i915: Eliminate loop from VLV irq handler
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2016-04-14 Ville Syrjälädrm/i915: Clear VLV_IER around irq processing
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2016-04-14 Ville Syrjälädrm/i915: Clear VLV_MASTER_IER around irq processing
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2016-04-14 Ville Syrjälädrm/i915: Clear VLV_IIR after PIPESTAT
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2016-04-14 Ville Syrjälädrm/i915: Set up VLV_MASTER_IER consistently
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2016-04-14 Ville Syrjälädrm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently
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2016-04-14 Ville Syrjälädrm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV
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2016-04-12 Ville Syrjälädrm/i915: Don't read out port_clock on CHV when DPLL...
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2016-04-12 Ville Syrjälädrm/i915: Dump pfit PGM_RATIOS as hex
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2016-04-12 Ville Syrjälädrm/i915: Fix CHV DSI PLL refclk during state readout
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2016-04-12 Ville Syrjälädrm/i915: Power down the DSI PLL before reconfiguring it
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2016-04-12 Ville Syrjälädrm/i915: Change lfsr_converts[] to u16
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2016-04-12 Ville SyrjäläRevert "drm/i915: Limit the auto arming of mmio debugs...
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2016-04-12 Ville Syrjälädrm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
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2016-04-12 Ville Syrjälädrm/i915: Move vlv_init_display_clock_gating() to the...
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2016-04-12 Ville Syrjälädrm/i915: Warn if irq_mask isn't ~0 during vlv/cvh...
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2016-04-12 Ville Syrjälädrm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()
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2016-04-12 Ville Syrjälädrm/i915: Clear display interrupt before enabling when...
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2016-04-12 Ville Syrjälädrm/i915: Move vlv/chv display irq code to a more logical...
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2016-04-12 Ville Syrjälädrm/i915: Skip display irq setup if display irqs aren...
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2016-04-12 Ville Syrjälädrm/i915: Fix up vlv/chv display irq setup
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2016-04-12 Ville Syrjälädrm/i915: Remove "VLV magic" from irq setup
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2016-04-12 Ville Syrjälädrm/i915: Replace ILK eDP underrun suppression with...
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2016-04-12 Ville Syrjälädrm/i915: Make sure LP1+ watermarks levels are preserved...
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2016-04-12 Ville Syrjälädrm/i915: Try to shut up more ILK underruns
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2016-04-12 Ville Syrjälädrm/i915: Get panel_type from OpRegion panel details
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2016-04-12 Ville Syrjälädrm/i915: Replace the static panel_type variable with...
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2016-04-12 Ville Syrjälädrm/i915: Reject panel_type > 0xf from VBT
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2016-04-12 Ville Syrjälädrm/i915: Make GMBUS timeout message DRM_DEBUG_KMS
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2016-04-12 Ville Syrjälädrm/i915: Restore GMBUS operation after a failed bit...
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2016-04-12 Ville Syrjälädrm/i915: Protect force_bit with gmbus_mutex
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2016-04-05 Ville Syrjälädrm/i915: Set GPU freq to idle_freq initially
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2016-04-05 Ville Syrjälädrm/i915: Use GPLL ref clock to calculate GPU freqs...
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2016-04-01 Ville Syrjälädrm/i915: Fix plane init failure paths
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