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drm/i915: Rename dp rates array as per platform
2015-05-08 Sonika Jindaldrm/i915: Rename dp rates array as per platform
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-05-08 Sonika Jindaldrm/i915/skl: Add module parameter to select edp vswing...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-04-16 Sonika Jindaldrm/i915/skl: Add back HDMI translation table
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-04-10 Sonika Jindaldrm/i915/skl: Support for 90/270 rotation
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-04-10 Sonika Jindaldrm/i915/skl: Allow universal planes to position
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-04-07 Sonika Jindaldrm/i915/skl: Enabling PSR2 SU with frame sync
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-03-17 Sonika Jindaldrm/i915/skl: Program PLL for edp1.4 intermediate frequencies
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-03-17 Sonika Jindaldrm/i915/skl: Add support for edp 1.4 intermediate...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-03-17 Sonika Jindaldrm/i915/skl: Read sink supported rates from edp panel
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-02-25 Sonika Jindaldrm/i915/skl: Add support for edp1.4 low vswing
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-02-25 Sonika Jindaldrm/i915/skl: Support for edp low_vswing param in vbt
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-02-24 Sonika Jindaldrm: Adding edp1.4 specific dpcd macros
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2015-01-28 Sonika Jindaldrm/i915/skl: Enabling PSR on Skylake
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-12-15 Sonika Jindaldrm/i915/skl: Correcting the flushing of pipe
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-12-15 Sonika Jindaldrm/i915/skl: Correctly updating sprite wm parameter
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-11-04 Sonika Jindaldrm/i915: Update plane parameters for cursor plane...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-10-24 Sonika Jindaldrm/i915/skl: Add 180 degree HW rotation support
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm: Remove old defines for vswing and pre-emph values
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/i915: Renaming DP training vswing pre emph defines
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/tegra: Renaming DP training vswing pre emph defines
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/radeon: Renaming DP training vswing pre emph defines
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/gma500: Renaming DP training vswing pre emph defines
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/exynos: Renaming DP training vswing pre emph defines
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm: Renaming DP training vswing pre emph defines
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/i915: Rename defines for selection of ddi buffer...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/i915: Add 180 degree primary plane rotation support
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-09-03 Sonika Jindaldrm/i915: Updating plane parameters for primary plane...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-08-11 Sonika Jindaldrm/i915: Continuation of future readiness series
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-08-08 Sonika Jindaldrm: Resetting rotation property
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-08-08 Sonika Jindaldrm: Add rotation_property to mode_config
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Replace HAS_PCH_SPLIT which incorrectly lets...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Returning from increase/decrease of pllclock...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Setting legacy palette correctly for different...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Avoid incorrect returning for some platforms
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Writing proper check for reading of pipe...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Returning the right VGA control reg for platforms
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Allowing changing of wm latencies for valid...
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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2014-07-23 Sonika Jindaldrm/i915: Adding HAS_GMCH_DISPLAY macro
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
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Linux 6.x block layer and io_uring tree(s)