x86/quirks: Disable HPET on Intel Coffe Lake platforms
authorKai-Heng Feng <kai.heng.feng@canonical.com>
Wed, 16 Oct 2019 10:38:16 +0000 (18:38 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 12 Nov 2019 14:55:20 +0000 (15:55 +0100)
Some Coffee Lake platforms have a skewed HPET timer once the SoCs entered
PC10, which in consequence marks TSC as unstable because HPET is used as
watchdog clocksource for TSC.

Harry Pan tried to work around it in the clocksource watchdog code [1]
thereby creating a circular dependency between HPET and TSC. This also
ignores the fact, that HPET is not only unsuitable as watchdog clocksource
on these systems, it becomes unusable in general.

Disable HPET on affected platforms.

Suggested-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183
Link: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@intel.com/
Link: https://lkml.kernel.org/r/20191016103816.30650-1-kai.heng.feng@canonical.com
arch/x86/kernel/early-quirks.c

index 6f6b1d04dadf9817e0e5fe09df8f4902185d8c7f..4cba91ec80492ab42dda142a6555dd6dcf3dfbc0 100644 (file)
@@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = {
         */
        { PCI_VENDOR_ID_INTEL, 0x0f00,
                PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+       { PCI_VENDOR_ID_INTEL, 0x3ec4,
+               PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
        { PCI_VENDOR_ID_BROADCOM, 0x4331,
          PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
        {}