struct max310x_devtype {
char name[9];
int nr;
+ u8 mode1;
int (*detect)(struct device *);
void (*power)(struct uart_port *, int);
};
static const struct max310x_devtype max3107_devtype = {
.name = "MAX3107",
.nr = 1,
+ .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT | MAX310X_MODE1_IRQSEL_BIT,
.detect = max3107_detect,
.power = max310x_power,
};
static const struct max310x_devtype max3108_devtype = {
.name = "MAX3108",
.nr = 1,
+ .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
.detect = max3108_detect,
.power = max310x_power,
};
static const struct max310x_devtype max3109_devtype = {
.name = "MAX3109",
.nr = 2,
+ .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
.detect = max3109_detect,
.power = max310x_power,
};
static const struct max310x_devtype max14830_devtype = {
.name = "MAX14830",
.nr = 4,
+ .mode1 = MAX310X_MODE1_IRQSEL_BIT,
.detect = max14830_detect,
.power = max14830_power,
};
MAX310X_BRGDIVLSB_REG + offs, &ret);
} while (ret != 0x01);
- regmap_update_bits(s->regmap, MAX310X_MODE1_REG + offs,
- MAX310X_MODE1_AUTOSLEEP_BIT,
- MAX310X_MODE1_AUTOSLEEP_BIT);
+ regmap_write(s->regmap, MAX310X_MODE1_REG + offs,
+ devtype->mode1);
}
uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
max310x_port_write(&s->p[i].port, MAX310X_IRQEN_REG, 0);
/* Clear IRQ status register */
max310x_port_read(&s->p[i].port, MAX310X_IRQSTS_REG);
- /* Enable IRQ pin */
- max310x_port_update(&s->p[i].port, MAX310X_MODE1_REG,
- MAX310X_MODE1_IRQSEL_BIT,
- MAX310X_MODE1_IRQSEL_BIT);
/* Initialize queue for start TX */
INIT_WORK(&s->p[i].tx_work, max310x_wq_proc);
/* Initialize queue for changing LOOPBACK mode */