Merge branch 'perm-fix' into omap-for-v4.19/fixes-v2
authorTony Lindgren <tony@atomide.com>
Tue, 28 Aug 2018 16:58:03 +0000 (09:58 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 28 Aug 2018 16:58:03 +0000 (09:58 -0700)
arch/arm/boot/dts/am4372.dtsi
arch/arm/boot/dts/omap4-droid4-xt894.dts
arch/arm/mach-omap2/omap_hwmod.c
drivers/bus/ti-sysc.c

index f0cbd86312dce5ddc1867d9eb2dc54059450a090..d4b7c59eec6853f2f836b5b3ffd686988ad0f6b1 100644 (file)
                        ti,hwmods = "rtc";
                        clocks = <&clk_32768_ck>;
                        clock-names = "int-clk";
+                       system-power-controller;
                        status = "disabled";
                };
 
index 12d6822f00576f720c9c2086e061de4cb09fc299..3c26a4bbc34075e4e545b88ca4a1ce6dd2df6b94 100644 (file)
                OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1)       /* abe_mcbsp3_fsx */
                >;
        };
-};
-
-&omap4_pmx_wkup {
-       usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
-               /* gpio_wk0 */
-               pinctrl-single,pins = <
-               OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
-               >;
-       };
 
        vibrator_direction_pin: pinmux_vibrator_direction_pin {
                pinctrl-single,pins = <
        };
 };
 
+&omap4_pmx_wkup {
+       usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
+               /* gpio_wk0 */
+               pinctrl-single,pins = <
+               OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
+               >;
+       };
+};
+
 /*
  * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
  * uart1 wakeirq.
index 2ceffd85dd3d3fbcc4f80ae831713b37d23a83f3..cd65ea4e9c54e633bd66a0178ca3f06ad16e8db9 100644 (file)
@@ -2160,6 +2160,37 @@ static int of_dev_hwmod_lookup(struct device_node *np,
        return -ENODEV;
 }
 
+/**
+ * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
+ *
+ * @oh: struct omap_hwmod *
+ * @np: struct device_node *
+ *
+ * Fix up module register offsets for modules with mpu_rt_idx.
+ * Only needed for cpsw with interconnect target module defined
+ * in device tree while still using legacy hwmod platform data
+ * for rev, sysc and syss registers.
+ *
+ * Can be removed when all cpsw hwmod platform data has been
+ * dropped.
+ */
+static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
+                                     struct device_node *np,
+                                     struct resource *res)
+{
+       struct device_node *child = NULL;
+       int error;
+
+       child = of_get_next_child(np, child);
+       if (!child)
+               return;
+
+       error = of_address_to_resource(child, oh->mpu_rt_idx, res);
+       if (error)
+               pr_err("%s: error mapping mpu_rt_idx: %i\n",
+                      __func__, error);
+}
+
 /**
  * omap_hwmod_parse_module_range - map module IO range from device tree
  * @oh: struct omap_hwmod *
@@ -2220,7 +2251,13 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
        size = be32_to_cpup(ranges);
 
        pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
-                oh->name, np->name, base, size);
+                oh ? oh->name : "", np->name, base, size);
+
+       if (oh && oh->mpu_rt_idx) {
+               omap_hwmod_fix_mpu_rt_idx(oh, np, res);
+
+               return 0;
+       }
 
        res->start = base;
        res->end = base + size - 1;
index c9bac9dc4637e7b8ce9ad3eb15e484added77f79..e4fe954e63a9be53b74397c825bf4f57b06dcca5 100644 (file)
@@ -498,32 +498,29 @@ static int sysc_check_registers(struct sysc *ddata)
 
 /**
  * syc_ioremap - ioremap register space for the interconnect target module
- * @ddata: deviec driver data
+ * @ddata: device driver data
  *
  * Note that the interconnect target module registers can be anywhere
- * within the first child device address space. For example, SGX has
- * them at offset 0x1fc00 in the 32MB module address space. We just
- * what we need around the interconnect target module registers.
+ * within the interconnect target module range. For example, SGX has
+ * them at offset 0x1fc00 in the 32MB module address space. And cpsw
+ * has them at offset 0x1200 in the CPSW_WR child. Usually the
+ * the interconnect target module registers are at the beginning of
+ * the module range though.
  */
 static int sysc_ioremap(struct sysc *ddata)
 {
-       u32 size = 0;
-
-       if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
-               size = ddata->offsets[SYSC_SYSSTATUS];
-       else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
-               size = ddata->offsets[SYSC_SYSCONFIG];
-       else if (ddata->offsets[SYSC_REVISION] >= 0)
-               size = ddata->offsets[SYSC_REVISION];
-       else
-               return -EINVAL;
+       int size;
 
-       size &= 0xfff00;
-       size += SZ_256;
+       size = max3(ddata->offsets[SYSC_REVISION],
+                   ddata->offsets[SYSC_SYSCONFIG],
+                   ddata->offsets[SYSC_SYSSTATUS]);
+
+       if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
+               return -EINVAL;
 
        ddata->module_va = devm_ioremap(ddata->dev,
                                        ddata->module_pa,
-                                       size);
+                                       size + sizeof(u32));
        if (!ddata->module_va)
                return -EIO;
 
@@ -1224,10 +1221,10 @@ static int sysc_child_suspend_noirq(struct device *dev)
        if (!pm_runtime_status_suspended(dev)) {
                error = pm_generic_runtime_suspend(dev);
                if (error) {
-                       dev_err(dev, "%s error at %i: %i\n",
-                               __func__, __LINE__, error);
+                       dev_warn(dev, "%s busy at %i: %i\n",
+                                __func__, __LINE__, error);
 
-                       return error;
+                       return 0;
                }
 
                error = sysc_runtime_suspend(ddata->dev);