drm/amdgpu: Export setup_vm_pt_regs() logic for mmhub 2.0
authorYong Zhao <Yong.Zhao@amd.com>
Tue, 24 Sep 2019 21:23:12 +0000 (17:23 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 3 Oct 2019 14:11:05 +0000 (09:11 -0500)
The KFD code will call this function later.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h

index 86ed8cb915a865fbb4354c3b1a04713319bbca1f..2eea702de8eee42eac2a09bb383c8ea8efcbe275 100644 (file)
 
 #include "soc15_common.h"
 
-static void mmhub_v2_0_init_gart_pt_regs(struct amdgpu_device *adev)
+void mmhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+                               uint64_t page_table_base)
 {
-       uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
+       /* two registers distance between mmMMVM_CONTEXT0_* to mmMMVM_CONTEXT1_* */
+       int offset = mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
+                       - mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
 
-       WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
-                    lower_32_bits(value));
+       WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
+                       offset * vmid, lower_32_bits(page_table_base));
 
-       WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
-                    upper_32_bits(value));
+       WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
+                       offset * vmid, upper_32_bits(page_table_base));
 }
 
 static void mmhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev)
 {
-       mmhub_v2_0_init_gart_pt_regs(adev);
+       uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
+
+       mmhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base);
 
        WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
                     (u32)(adev->gmc.gart_start >> 12));
index db16f3ece2180991fb64649aa6c86049d4a80963..3ea4344f0315ca92c78c6a252adc7f2aab3bbff6 100644 (file)
@@ -31,5 +31,7 @@ void mmhub_v2_0_init(struct amdgpu_device *adev);
 int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
                               enum amd_clockgating_state state);
 void mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u32 *flags);
+void mmhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+                               uint64_t page_table_base);
 
 #endif