mlxsw: Add layer 3 devlink-trap support
authorAmit Cohen <amitc@mellanox.com>
Thu, 7 Nov 2019 16:42:10 +0000 (18:42 +0200)
committerDavid S. Miller <davem@davemloft.net>
Fri, 8 Nov 2019 03:51:40 +0000 (19:51 -0800)
Add the trap IDs and trap group used to report layer 3 drops. Register
layer 3 packet traps and associated layer 3 trap group with devlink
during driver initialization.

Signed-off-by: Amit Cohen <amitc@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h
drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c
drivers/net/ethernet/mellanox/mlxsw/trap.h

index bec035ee534958b230510587c572b0afd09209f5..5294a1622643ead2c662c4915bb670234cace2cb 100644 (file)
@@ -5480,6 +5480,7 @@ enum mlxsw_reg_htgt_trap_group {
 enum mlxsw_reg_htgt_discard_trap_group {
        MLXSW_REG_HTGT_DISCARD_TRAP_GROUP_BASE = MLXSW_REG_HTGT_TRAP_GROUP_MAX,
        MLXSW_REG_HTGT_TRAP_GROUP_SP_L2_DISCARDS,
+       MLXSW_REG_HTGT_TRAP_GROUP_SP_L3_DISCARDS,
 };
 
 /* reg_htgt_trap_group
index 7c03b661ae7ea218fe562afc14e7448d76c99104..f0e6811baa1cd013842dcce414e064742785aa6b 100644 (file)
@@ -30,6 +30,16 @@ static struct devlink_trap mlxsw_sp_traps_arr[] = {
        MLXSW_SP_TRAP_DROP(INGRESS_STP_FILTER, L2_DROPS),
        MLXSW_SP_TRAP_DROP(EMPTY_TX_LIST, L2_DROPS),
        MLXSW_SP_TRAP_DROP(PORT_LOOPBACK_FILTER, L2_DROPS),
+       MLXSW_SP_TRAP_DROP(BLACKHOLE_ROUTE, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(NON_IP_PACKET, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(UC_DIP_MC_DMAC, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(DIP_LB, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(SIP_MC, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(SIP_LB, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(CORRUPTED_IP_HDR, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(IPV4_SIP_BC, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(IPV6_MC_DIP_RESERVED_SCOPE, L3_DROPS),
+       MLXSW_SP_TRAP_DROP(IPV6_MC_DIP_INTERFACE_LOCAL_SCOPE, L3_DROPS),
 };
 
 static struct mlxsw_listener mlxsw_sp_listeners_arr[] = {
@@ -40,6 +50,16 @@ static struct mlxsw_listener mlxsw_sp_listeners_arr[] = {
        MLXSW_SP_RXL_DISCARD(LOOKUP_SWITCH_UC, L2_DISCARDS),
        MLXSW_SP_RXL_DISCARD(LOOKUP_SWITCH_MC_NULL, L2_DISCARDS),
        MLXSW_SP_RXL_DISCARD(LOOKUP_SWITCH_LB, L2_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ROUTER2, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_NON_IP_PACKET, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_UC_DIP_MC_DMAC, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_DIP_LB, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_SIP_MC, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_SIP_LB, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_CORRUPTED_IP_HDR, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(ING_ROUTER_IPV4_SIP_BC, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(IPV6_MC_DIP_RESERVED_SCOPE, L3_DISCARDS),
+       MLXSW_SP_RXL_DISCARD(IPV6_MC_DIP_INTERFACE_LOCAL_SCOPE, L3_DISCARDS),
 };
 
 /* Mapping between hardware trap and devlink trap. Multiple hardware traps can
@@ -54,6 +74,16 @@ static u16 mlxsw_sp_listener_devlink_map[] = {
        DEVLINK_TRAP_GENERIC_ID_EMPTY_TX_LIST,
        DEVLINK_TRAP_GENERIC_ID_EMPTY_TX_LIST,
        DEVLINK_TRAP_GENERIC_ID_PORT_LOOPBACK_FILTER,
+       DEVLINK_TRAP_GENERIC_ID_BLACKHOLE_ROUTE,
+       DEVLINK_TRAP_GENERIC_ID_NON_IP_PACKET,
+       DEVLINK_TRAP_GENERIC_ID_UC_DIP_MC_DMAC,
+       DEVLINK_TRAP_GENERIC_ID_DIP_LB,
+       DEVLINK_TRAP_GENERIC_ID_SIP_MC,
+       DEVLINK_TRAP_GENERIC_ID_SIP_LB,
+       DEVLINK_TRAP_GENERIC_ID_CORRUPTED_IP_HDR,
+       DEVLINK_TRAP_GENERIC_ID_IPV4_SIP_BC,
+       DEVLINK_TRAP_GENERIC_ID_IPV6_MC_DIP_RESERVED_SCOPE,
+       DEVLINK_TRAP_GENERIC_ID_IPV6_MC_DIP_INTERFACE_LOCAL_SCOPE,
 };
 
 static int mlxsw_sp_rx_listener(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb,
@@ -211,6 +241,7 @@ mlxsw_sp_trap_group_policer_init(struct mlxsw_sp *mlxsw_sp,
        u32 rate;
 
        switch (group->id) {
+       case DEVLINK_TRAP_GROUP_GENERIC_ID_L3_DROPS:/* fall through */
        case DEVLINK_TRAP_GROUP_GENERIC_ID_L2_DROPS:
                policer_id = MLXSW_SP_DISCARD_POLICER_ID;
                ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
@@ -242,6 +273,12 @@ __mlxsw_sp_trap_group_init(struct mlxsw_sp *mlxsw_sp,
                priority = 0;
                tc = 1;
                break;
+       case DEVLINK_TRAP_GROUP_GENERIC_ID_L3_DROPS:
+               group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_L3_DISCARDS;
+               policer_id = MLXSW_SP_DISCARD_POLICER_ID;
+               priority = 0;
+               tc = 1;
+               break;
        default:
                return -EINVAL;
        }
index 7618f084cae9b4a4c6b9eb45ec752980e68e549f..a4969982fce18617d159059897c77d3e92af5de4 100644 (file)
@@ -66,6 +66,7 @@ enum {
        MLXSW_TRAP_ID_NVE_ENCAP_ARP = 0xBD,
        MLXSW_TRAP_ID_ROUTER_ALERT_IPV4 = 0xD6,
        MLXSW_TRAP_ID_ROUTER_ALERT_IPV6 = 0xD7,
+       MLXSW_TRAP_ID_DISCARD_ROUTER2 = 0x130,
        MLXSW_TRAP_ID_DISCARD_ING_PACKET_SMAC_MC = 0x140,
        MLXSW_TRAP_ID_DISCARD_ING_SWITCH_VTAG_ALLOW = 0x148,
        MLXSW_TRAP_ID_DISCARD_ING_SWITCH_VLAN = 0x149,
@@ -73,6 +74,16 @@ enum {
        MLXSW_TRAP_ID_DISCARD_LOOKUP_SWITCH_UC = 0x150,
        MLXSW_TRAP_ID_DISCARD_LOOKUP_SWITCH_MC_NULL = 0x151,
        MLXSW_TRAP_ID_DISCARD_LOOKUP_SWITCH_LB = 0x152,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_NON_IP_PACKET = 0x160,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_UC_DIP_MC_DMAC = 0x161,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_DIP_LB = 0x162,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_SIP_MC = 0x163,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_SIP_LB = 0x165,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_CORRUPTED_IP_HDR = 0x167,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_IPV4_SIP_BC = 0x16A,
+       MLXSW_TRAP_ID_DISCARD_ING_ROUTER_IPV4_DIP_LOCAL_NET = 0x16B,
+       MLXSW_TRAP_ID_DISCARD_IPV6_MC_DIP_RESERVED_SCOPE = 0x1B0,
+       MLXSW_TRAP_ID_DISCARD_IPV6_MC_DIP_INTERFACE_LOCAL_SCOPE = 0x1B1,
        MLXSW_TRAP_ID_ACL0 = 0x1C0,
        /* Multicast trap used for routes with trap action */
        MLXSW_TRAP_ID_ACL1 = 0x1C1,