arch/unicore32/kernel/clock.c: add readl() and writel() for 'PM_' macros

Add readl() and writel() for 'PM_' macros, just like another areas have
done within unicored32, or will cause compiling issue.

The related error (allmodconfig for unicored32):

    CC      arch/unicore32/kernel/clock.o
  arch/unicore32/kernel/clock.c: In function 'clk_set_rate':
  arch/unicore32/kernel/clock.c:182: warning: initialization makes integer from pointer without a cast
  arch/unicore32/kernel/clock.c:204: error: lvalue required as left operand of assignment
  arch/unicore32/kernel/clock.c:206: error: lvalue required as left operand of assignment
  arch/unicore32/kernel/clock.c:207: error: invalid operands to binary & (have 'void *' and 'long unsigned int')
  make[1]: *** [arch/unicore32/kernel/clock.o] Error 1
  make: *** [arch/unicore32/kernel] Error 2

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Acked-by: Xuetao Guan <gxt@mprc.pku.edu.cn>
Signed-off-by: Xuetao Guan <gxt@mprc.pku.edu.cn>

diff --git a/arch/unicore32/kernel/clock.c b/arch/unicore32/kernel/clock.c
index 18d4563e6fa5e19b4489a018708405c41dd765aa..b1ca775f6f6ea2945e5c24153ea834c88e7e8677 100644 (file)
--- a/arch/unicore32/kernel/clock.c
+++ b/arch/unicore32/kernel/clock.c
@@ -179,7 +179,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
        }
 #ifdef CONFIG_CPU_FREQ
        if (clk == &clk_mclk_clk) {
-               u32 pll_rate, divstatus = PM_DIVSTATUS;
+               u32 pll_rate, divstatus = readl(PM_DIVSTATUS);
                int ret, i;
 
                /* lookup mclk_clk_table */
@@ -201,10 +201,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
                                / (((divstatus & 0x0000f000) >> 12) + 1);
 
                /* set pll sys cfg reg. */
-               PM_PLLSYSCFG = pll_rate;
+               writel(pll_rate, PM_PLLSYSCFG);
 
-               PM_PMCR = PM_PMCR_CFBSYS;
-               while ((PM_PLLDFCDONE & PM_PLLDFCDONE_SYSDFC)
+               writel(PM_PMCR_CFBSYS, PM_PMCR);
+               while ((readl(PM_PLLDFCDONE) & PM_PLLDFCDONE_SYSDFC)
                                != PM_PLLDFCDONE_SYSDFC)
                        udelay(100);
                        /* about 1ms */