drm/amdgpu: use div64_ul for 32-bit compatibility v1

v1: replace casting to unsigned long with div64_ul

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Slava Abramov <slava.abramov@amd.com>
Tested-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index da1dc40b9b14b13b05885812959ec11c9c9f3fa0..d5719b0fb82c0d2e301213f8964ff3757053b53d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -764,8 +764,8 @@ static ssize_t amdgpu_ras_sysfs_badpages_read(struct file *f,
        struct amdgpu_device *adev = con->adev;
        const unsigned int element_size =
                sizeof("0xabcdabcd : 0x12345678 : R\n") - 1;
-       unsigned int start = (ppos + element_size - 1) / element_size;
-       unsigned int end = (ppos + count - 1) / element_size;
+       unsigned int start = div64_ul(ppos + element_size - 1, element_size);
+       unsigned int end = div64_ul(ppos + count - 1, element_size);
        ssize_t s = 0;
        struct ras_badpage *bps = NULL;
        unsigned int bps_count = 0;