ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
authorKukjin Kim <kgene.kim@samsung.com>
Sun, 21 Feb 2010 23:02:59 +0000 (00:02 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 24 Feb 2010 21:07:22 +0000 (21:07 +0000)
Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with
L1 cache lines which are 64bytes to indicate this without having to
alter the arch/arm/mm/Kconfig entry each time.

Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value
uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6.

Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/Kconfig
arch/arm/mm/Kconfig
arch/arm/plat-omap/Kconfig

index 0f1ad743ccdd2a1a80aaeaa5a7c6066e256973e1..04247ba31d69d0bad5d5ef92866c855aac144094 100644 (file)
@@ -165,6 +165,11 @@ config ARCH_MTD_XIP
 config GENERIC_HARDIRQS_NO__DO_IRQ
        def_bool y
 
+config ARM_L1_CACHE_SHIFT_6
+       bool
+       help
+         Setting ARM L1 cache line size to 64 Bytes.
+
 if OPROFILE
 
 config OPROFILE_ARMV6
@@ -642,6 +647,7 @@ config ARCH_S5PC1XX
        select GENERIC_GPIO
        select HAVE_CLK
        select CPU_V7
+       select ARM_L1_CACHE_SHIFT_6
        help
          Samsung S5PC1XX series based systems
 
index e859743024a0a650ad1091fd41405138ade1cfc0..c4ed9f93f646be93fbdcc048a326c5d7db995bcd 100644 (file)
@@ -779,5 +779,5 @@ config CACHE_XSC3L2
 
 config ARM_L1_CACHE_SHIFT
        int
-       default 6 if ARCH_OMAP3 || ARCH_S5PC1XX
+       default 6 if ARM_L1_CACHE_SHIFT_6
        default 5
index e2ea04a4c8a1b06b2c8d477b631fe38251fe9018..2e3eec6608647cafa6d1a435cc3681931b35f970 100644 (file)
@@ -22,6 +22,7 @@ config ARCH_OMAP3
        bool "TI OMAP3"
        select CPU_V7
        select COMMON_CLKDEV
+       select ARM_L1_CACHE_SHIFT_6
 
 config ARCH_OMAP4
        bool "TI OMAP4"