MIPS: ptrace: Make FPU context layout comments match reality
authorMaciej W. Rozycki <macro@mips.com>
Tue, 15 May 2018 22:03:09 +0000 (23:03 +0100)
committerJames Hogan <jhogan@kernel.org>
Thu, 24 May 2018 12:37:07 +0000 (13:37 +0100)
Correct comments across ptrace(2) handlers about an FPU register context
layout discrepancy between MIPS I and later ISAs, which was fixed with
`linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
ptrace() handling fixes."), and then broken and fixed over and over
again, until last time fixed with commit 80cbfad79096 ("MIPS: Correct
MIPS I FP context layout").

NB running the GDB test suite for the relevant ABI/ISA and watching out
for regressions is advisable when poking around ptrace(2).

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/19326/
Signed-off-by: James Hogan <jhogan@kernel.org>
arch/mips/kernel/ptrace.c
arch/mips/kernel/ptrace32.c

index 0b23b1ad99e65f1e21d1810340f9dd306483b8d3..1098ca8b50e90c9b3b838d2c7343b9a52ee77e4b 100644 (file)
@@ -797,7 +797,7 @@ long arch_ptrace(struct task_struct *child, long request,
                                /*
                                 * The odd registers are actually the high
                                 * order bits of the values stored in the even
-                                * registers - unless we're using r2k_switch.S.
+                                * registers.
                                 */
                                tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
                                                addr & 1);
@@ -892,7 +892,7 @@ long arch_ptrace(struct task_struct *child, long request,
                                /*
                                 * The odd registers are actually the high
                                 * order bits of the values stored in the even
-                                * registers - unless we're using r2k_switch.S.
+                                * registers.
                                 */
                                set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
                                          addr & 1, data);
index 2b9260f92ccd3019fe3d733c96a631faa7f59e2b..c6fc496430e944ed7b60919c03739f4e576f0284 100644 (file)
@@ -103,7 +103,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
                                /*
                                 * The odd registers are actually the high
                                 * order bits of the values stored in the even
-                                * registers - unless we're using r2k_switch.S.
+                                * registers.
                                 */
                                tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
                                                addr & 1);
@@ -216,7 +216,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
                                /*
                                 * The odd registers are actually the high
                                 * order bits of the values stored in the even
-                                * registers - unless we're using r2k_switch.S.
+                                * registers.
                                 */
                                set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
                                          addr & 1, data);