net/mlx5: FPGA, support network cards with standalone FPGA
authorIgor Leshenko <igorle@mellanox.com>
Thu, 5 Sep 2019 15:56:28 +0000 (18:56 +0300)
committerSaeed Mahameed <saeedm@mellanox.com>
Fri, 1 Nov 2019 21:55:14 +0000 (14:55 -0700)
Not all mlx5 cards with FPGA device use it for network processing.

mlx5_core driver configures network connection to FPGA device
for all mlx5 cards with installed FPGA. If FPGA is not a part of
network path, driver crashes in this case

Check FPGA name in function mlx5_fpga_device_start() and continue
integrate FPGA into packets flow only for dedicated cards.
Currently there are Newton and Edison cards.

Signed-off-by: Igor Leshenko <igorle@mellanox.com>
Reviewed-by: Meir Lichtinger <meirl@mellanox.com>
Reviewed-by: Boris Pismenny <borisp@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.h
drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c

index eb8b0fe0b4e149028400a6bde50511eb822acb25..11621d265d7ef974ad4a547e66cf6dda1ebcbb93 100644 (file)
 
 #include <linux/mlx5/driver.h>
 
-enum mlx5_fpga_device_id {
-       MLX5_FPGA_DEVICE_UNKNOWN = 0,
-       MLX5_FPGA_DEVICE_KU040 = 1,
-       MLX5_FPGA_DEVICE_KU060 = 2,
-       MLX5_FPGA_DEVICE_KU060_2 = 3,
+enum mlx5_fpga_id {
+       MLX5_FPGA_NEWTON = 0,
+       MLX5_FPGA_EDISON = 1,
+       MLX5_FPGA_MORSE = 2,
+       MLX5_FPGA_MORSEQ = 3,
 };
 
 enum mlx5_fpga_image {
index d046d1ec2a86d401f7af5003a2df051297401f8d..2ce4241459ce5e866439596d00a00eec3afb4067 100644 (file)
@@ -81,19 +81,28 @@ static const char *mlx5_fpga_image_name(enum mlx5_fpga_image image)
        }
 }
 
-static const char *mlx5_fpga_device_name(u32 device)
+static const char *mlx5_fpga_name(u32 fpga_id)
 {
-       switch (device) {
-       case MLX5_FPGA_DEVICE_KU040:
-               return "ku040";
-       case MLX5_FPGA_DEVICE_KU060:
-               return "ku060";
-       case MLX5_FPGA_DEVICE_KU060_2:
-               return "ku060_2";
-       case MLX5_FPGA_DEVICE_UNKNOWN:
-       default:
-               return "unknown";
+       static char ret[32];
+
+       switch (fpga_id) {
+       case MLX5_FPGA_NEWTON:
+               return "Newton";
+       case MLX5_FPGA_EDISON:
+               return "Edison";
+       case MLX5_FPGA_MORSE:
+               return "Morse";
+       case MLX5_FPGA_MORSEQ:
+               return "MorseQ";
        }
+
+       snprintf(ret, sizeof(ret), "Unknown %d", fpga_id);
+       return ret;
+}
+
+static int mlx5_is_fpga_lookaside(u32 fpga_id)
+{
+       return fpga_id != MLX5_FPGA_NEWTON && fpga_id != MLX5_FPGA_EDISON;
 }
 
 static int mlx5_fpga_device_load_check(struct mlx5_fpga_device *fdev)
@@ -110,8 +119,12 @@ static int mlx5_fpga_device_load_check(struct mlx5_fpga_device *fdev)
        fdev->last_admin_image = query.admin_image;
        fdev->last_oper_image = query.oper_image;
 
-       mlx5_fpga_dbg(fdev, "Status %u; Admin image %u; Oper image %u\n",
-                     query.status, query.admin_image, query.oper_image);
+       mlx5_fpga_info(fdev, "Status %u; Admin image %u; Oper image %u\n",
+                      query.status, query.admin_image, query.oper_image);
+
+       /* for FPGA lookaside projects FPGA load status is not important */
+       if (mlx5_is_fpga_lookaside(MLX5_CAP_FPGA(fdev->mdev, fpga_id)))
+               return 0;
 
        if (query.status != MLX5_FPGA_STATUS_SUCCESS) {
                mlx5_fpga_err(fdev, "%s image failed to load; status %u\n",
@@ -167,25 +180,30 @@ int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)
        struct mlx5_fpga_device *fdev = mdev->fpga;
        unsigned int max_num_qps;
        unsigned long flags;
-       u32 fpga_device_id;
+       u32 fpga_id;
        int err;
 
        if (!fdev)
                return 0;
 
-       err = mlx5_fpga_device_load_check(fdev);
+       err = mlx5_fpga_caps(fdev->mdev);
        if (err)
                goto out;
 
-       err = mlx5_fpga_caps(fdev->mdev);
+       err = mlx5_fpga_device_load_check(fdev);
        if (err)
                goto out;
 
-       fpga_device_id = MLX5_CAP_FPGA(fdev->mdev, fpga_device);
-       mlx5_fpga_info(fdev, "%s:%u; %s image, version %u; SBU %06x:%04x version %d\n",
-                      mlx5_fpga_device_name(fpga_device_id),
-                      fpga_device_id,
+       fpga_id = MLX5_CAP_FPGA(fdev->mdev, fpga_id);
+       mlx5_fpga_info(fdev, "FPGA card %s:%u\n", mlx5_fpga_name(fpga_id), fpga_id);
+
+       /* No QPs if FPGA does not participate in net processing */
+       if (mlx5_is_fpga_lookaside(fpga_id))
+               goto out;
+
+       mlx5_fpga_info(fdev, "%s(%d): image, version %u; SBU %06x:%04x version %d\n",
                       mlx5_fpga_image_name(fdev->last_oper_image),
+                      fdev->last_oper_image,
                       MLX5_CAP_FPGA(fdev->mdev, image_version),
                       MLX5_CAP_FPGA(fdev->mdev, ieee_vendor_id),
                       MLX5_CAP_FPGA(fdev->mdev, sandbox_product_id),
@@ -264,6 +282,9 @@ void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev)
        if (!fdev)
                return;
 
+       if (mlx5_is_fpga_lookaside(MLX5_CAP_FPGA(fdev->mdev, fpga_id)))
+               return;
+
        spin_lock_irqsave(&fdev->state_lock, flags);
        if (fdev->state != MLX5_FPGA_STATUS_SUCCESS) {
                spin_unlock_irqrestore(&fdev->state_lock, flags);