arm64: zynqmp: Add pinctrl emmc description to SM-K26

Production SOM has emmc on it and make sense to describe pin description to
be able use EMMC if it is not configured via psu_init.
(Still some regs are not handled but this is one step in that direction)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f61c16e2fd7c91c2be6d6b67c902037580dbd364.1683034376.git.michal.simek@amd.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
index 583a2d533cef92641c7d6d474727dd34924b33bc..dbc595c2d56b529dfd4bd05458ebfaae8da5021c 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
@@ -14,6 +14,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/phy/phy.h>
+#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
 
 / {
        model = "ZynqMP SM-K26 Rev1/B/A";
@@ -85,6 +86,23 @@
        status = "okay";
 };
 
+&pinctrl0 {
+       status = "okay";
+       pinctrl_sdhci0_default: sdhci0-default {
+               conf {
+                       groups = "sdio0_0_grp";
+                       slew-rate = <SLEW_RATE_SLOW>;
+                       power-source = <IO_STANDARD_LVCMOS18>;
+                       bias-disable;
+               };
+
+               mux {
+                       groups = "sdio0_0_grp";
+                       function = "sdio0";
+               };
+       };
+};
+
 &qspi { /* MIO 0-5 - U143 */
        status = "okay";
        spi_flash: flash@0 { /* MT25QU512A */
@@ -182,6 +200,8 @@
 
 &sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A */
        status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sdhci0_default>;
        non-removable;
        disable-wp;
        bus-width = <8>;