Documentation/bindings: crypto: inside-secure: update the compatibles
authorAntoine Tenart <antoine.tenart@bootlin.com>
Thu, 28 Jun 2018 15:15:33 +0000 (17:15 +0200)
committerHerbert Xu <herbert@gondor.apana.org.au>
Sun, 8 Jul 2018 16:30:10 +0000 (00:30 +0800)
The compatibles were updated in the Inside Secure SafeXcel cryptographic
driver, as the ones previously used were not specific enough. The old
compatibles are still supported by the driver for backward
compatibility.

This patch updates the documentation accordingly.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt

index 5dba55cdfa634ca4947efe2b56a43883d87d1868..dc8678db52fac2b48debebd29cf104e59e4fe01c 100644 (file)
@@ -1,8 +1,8 @@
 Inside Secure SafeXcel cryptographic engine
 
 Required properties:
-- compatible: Should be "inside-secure,safexcel-eip197" or
-              "inside-secure,safexcel-eip97".
+- compatible: Should be "inside-secure,safexcel-eip197b" or
+              "inside-secure,safexcel-eip97ies".
 - reg: Base physical address of the engine and length of memory mapped region.
 - interrupts: Interrupt numbers for the rings and engine.
 - interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
@@ -14,10 +14,18 @@ Optional properties:
                name must be "core" for the first clock and "reg" for
                the second one.
 
+Backward compatibility:
+Two compatibles are kept for backward compatibility, but shouldn't be used for
+new submissions:
+- "inside-secure,safexcel-eip197" is equivalent to
+  "inside-secure,safexcel-eip197b".
+- "inside-secure,safexcel-eip97" is equivalent to
+  "inside-secure,safexcel-eip97ies".
+
 Example:
 
        crypto: crypto@800000 {
-               compatible = "inside-secure,safexcel-eip197";
+               compatible = "inside-secure,safexcel-eip197b";
                reg = <0x800000 0x200000>;
                interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,