e1000e: Add support for EEE in Sx states
authorDavid Ertman <david.m.ertman@intel.com>
Fri, 11 Jul 2014 06:20:51 +0000 (06:20 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Sat, 26 Jul 2014 04:00:54 +0000 (21:00 -0700)
On I217 and newer hardware, EEE is enabled in the PHY by the software
when link is up and disabled by the hardware when link is lost.

To enable EEE in Sx (When both ends of the link support, and are enabled
for, EEE and 100Mbps), we need to disable LPLU and configure the PHY to
automatically enable EEE when link is up, since there will be no software
to complete the task.

To configure this in the PHY, the Auto Enable LPI bit in the Low Power
Idle GPIO Control register must be set.  For normal operation in S0, this
bit must be cleared.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/e1000e/ich8lan.c
drivers/net/ethernet/intel/e1000e/ich8lan.h

index 8dbcdc81104e717f0dcab6f98e823bc2a7c8f53d..48b74a5491551fcbb42afc9f29e012b553ea5079 100644 (file)
@@ -4605,14 +4605,23 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)
 
                        /* Disable LPLU if both link partners support 100BaseT
                         * EEE and 100Full is advertised on both ends of the
-                        * link.
+                        * link, and enable Auto Enable LPI since there will
+                        * be no driver to enable LPI while in Sx.
                         */
                        if ((eee_advert & I82579_EEE_100_SUPPORTED) &&
                            (dev_spec->eee_lp_ability &
                             I82579_EEE_100_SUPPORTED) &&
-                           (hw->phy.autoneg_advertised & ADVERTISE_100_FULL))
+                           (hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) {
                                phy_ctrl &= ~(E1000_PHY_CTRL_D0A_LPLU |
                                              E1000_PHY_CTRL_NOND0A_LPLU);
+
+                               /* Set Auto Enable LPI after link up */
+                               e1e_rphy_locked(hw,
+                                               I217_LPI_GPIO_CTRL, &phy_reg);
+                               phy_reg |= I217_LPI_GPIO_CTRL_AUTO_EN_LPI;
+                               e1e_wphy_locked(hw,
+                                               I217_LPI_GPIO_CTRL, phy_reg);
+                       }
                }
 
                /* For i217 Intel Rapid Start Technology support,
@@ -4709,6 +4718,11 @@ void e1000_resume_workarounds_pchlan(struct e1000_hw *hw)
                        return;
                }
 
+               /* Clear Auto Enable LPI after link up */
+               e1e_rphy_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg);
+               phy_reg &= ~I217_LPI_GPIO_CTRL_AUTO_EN_LPI;
+               e1e_wphy_locked(hw, I217_LPI_GPIO_CTRL, phy_reg);
+
                if (!(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) {
                        /* Restore clear on SMB if no manageability engine
                         * is present
index 5515126c81c199b5e44bd909ac9ea3f336cf4fcd..8066a498eaac5439d18c7f6d99307039a53e7d80 100644 (file)
 #define I217_INBAND_CTRL_LINK_STAT_TX_TIMEOUT_MASK     0x3F00
 #define I217_INBAND_CTRL_LINK_STAT_TX_TIMEOUT_SHIFT    8
 
+/* Low Power Idle GPIO Control */
+#define I217_LPI_GPIO_CTRL                     PHY_REG(772, 18)
+#define I217_LPI_GPIO_CTRL_AUTO_EN_LPI         0x0800
+
 /* PHY Low Power Idle Control */
 #define I82579_LPI_CTRL                                PHY_REG(772, 20)
 #define I82579_LPI_CTRL_100_ENABLE             0x2000