powerpc/thp: Add write barrier after updating the valid bit
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Wed, 13 Aug 2014 07:01:57 +0000 (12:31 +0530)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 13 Aug 2014 08:20:37 +0000 (18:20 +1000)
With hugepages, we store the hpte valid information in the pte page
whose address is stored in the second half of the PMD. Use a
write barrier to make sure clearing pmd busy bit and updating
hpte valid info are ordered properly.

CC: <stable@vger.kernel.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
arch/powerpc/mm/hugepage-hash64.c

index 826893fcb3a78b0198d5fa4b0b047428d8852802..11f9a37ca2c6dda462caed6bb5a2d918644cbc2e 100644 (file)
@@ -172,8 +172,11 @@ repeat:
                mark_hpte_slot_valid(hpte_slot_array, index, slot);
        }
        /*
-        * No need to use ldarx/stdcx here
+        * The hpte valid is stored in the pgtable whose address is in the
+        * second half of the PMD. Order this against clearing of the busy bit in
+        * huge pmd.
         */
+       smp_wmb();
        *pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
        return 0;
 }