ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups

Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC,
LEDs, so that these pins can be used for different purposes when the
respective drivers are disabled.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 7a1e53195785b3e2d1c6a13ec0cb2c432625c40f..702bbd6735df917c76ee58a53ed93c753d47c908 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -41,6 +41,8 @@
        };
 
        gpio_leds: leds {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_leds>;
                compatible = "gpio-leds";
 
                green {
@@ -122,6 +124,8 @@
        };
 
        pmic@58 {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
                compatible = "dlg,da9063";
                reg = <0x58>;
                interrupt-parent = <&gpio2>;
@@ -215,25 +219,13 @@
 };
 
 &iomuxc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_hog>;
-
        imx6q-phytec-pfla02 {
-               pinctrl_hog: hoggrp {
-                       fsl,pins = <
-                               MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
-                               MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
-                               MX6QDL_PAD_SD4_DAT1__GPIO2_IO09  0x80000000 /* PMIC interrupt */
-                               MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */
-                               MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */
-                       >;
-               };
-
                pinctrl_ecspi3: ecspi3grp {
                        fsl,pins = <
                                MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
                                MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
                                MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
+                               MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24       0x80000000 /* CS0 */
                        >;
                };
 
@@ -255,6 +247,7 @@
                                MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
                                MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
+                               MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x80000000 /* Reset GPIO */
                        >;
                };
 
@@ -308,10 +301,21 @@
                        >;
                };
 
+               pinctrl_leds: ledsgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x80000000 /* Green LED */
+                               MX6QDL_PAD_EIM_EB3__GPIO2_IO31          0x80000000 /* Red LED */
+                       >;
+               };
+
                pinctrl_pcie: pciegrp {
                        fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17  0x80000000>;
                };
 
+               pinctrl_pmic: pmicgrp {
+                       fsl,pins = <MX6QDL_PAD_SD4_DAT1__GPIO2_IO09     0x80000000>; /* PMIC interrupt */
+               };
+
                pinctrl_uart3: uart3grp {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1