dt-bindings: medaitek: mt8183: add property "resets" && "reset-names"

This patch add property "resets" && "reset-names" in examples so that we can
use reset controller to reset audio domain regs.

Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Link: https://lore.kernel.org/r/1569580317-21181-4-git-send-email-jiaxin.yu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt
index 396ba38619f6d47ddeb506cee25fade387e62d89..1f1cba4152ceecbe61d0db0b972f98df7d5d91ac 100644 (file)
--- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt
+++ b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt
@@ -4,6 +4,10 @@ Required properties:
 - compatible = "mediatek,mt68183-audio";
 - reg: register location and size
 - interrupts: should contain AFE interrupt
+- resets: Must contain an entry for each entry in reset-names
+  See ../reset/reset.txt for details.
+- reset-names: should have these reset names:
+               "audiosys";
 - power-domains: should define the power domain
 - clocks: Must contain an entry for each entry in clock-names
 - clock-names: should have these clock names:
@@ -20,6 +24,8 @@ Example:
                compatible = "mediatek,mt8183-audio";
                reg = <0 0x11220000 0 0x1000>;
                interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
+               resets = <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>;
+               reset-names = "audiosys";
                power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>;
                clocks = <&infrasys CLK_INFRA_AUDIO>,
                         <&infrasys CLK_INFRA_AUDIO_26M_BCLK>,