MIPS: Netlogic: Fix for SATA PHY init

Update to the SATA PHY initialization. This is needed for SATA detection
to succeed in all configurations.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/netlogic/xlp/ahci-init-xlp2.c b/arch/mips/netlogic/xlp/ahci-init-xlp2.c
index c83dbf3689e2b9d0453ccca28dceffcbe1c3f798..7b066a44e6798e71447e55633ff1cb8334a2948d 100644 (file)
--- a/arch/mips/netlogic/xlp/ahci-init-xlp2.c
+++ b/arch/mips/netlogic/xlp/ahci-init-xlp2.c
@@ -203,6 +203,7 @@ static u8 read_phy_reg(u64 regbase, u32 addr, u32 physel)
 static void config_sata_phy(u64 regbase)
 {
        u32 port, i, reg;
+       u8 val;
 
        for (port = 0; port < 2; port++) {
                for (i = 0, reg = RXCDRCALFOSC0; reg <= CALDUTY; reg++, i++)
@@ -210,6 +211,18 @@ static void config_sata_phy(u64 regbase)
 
                for (i = 0, reg = RXDPIF; reg <= PPMDRIFTMAX_HI; reg++, i++)
                        write_phy_reg(regbase, reg, port, sata_phy_config2[i]);
+
+               /* Fix for PHY link up failures at lower temperatures */
+               write_phy_reg(regbase, 0x800F, port, 0x1f);
+
+               val = read_phy_reg(regbase, 0x0029, port);
+               write_phy_reg(regbase, 0x0029, port, val | (0x7 << 1));
+
+               val = read_phy_reg(regbase, 0x0056, port);
+               write_phy_reg(regbase, 0x0056, port, val & ~(1 << 3));
+
+               val = read_phy_reg(regbase, 0x0018, port);
+               write_phy_reg(regbase, 0x0018, port, val & ~(0x7 << 0));
        }
 }