Merge tag 'xgene-dts-for-v4.9' of https://github.com/AppliedMicro/xgene-next into...
authorArnd Bergmann <arnd@arndb.de>
Mon, 19 Sep 2016 20:31:14 +0000 (22:31 +0200)
committerArnd Bergmann <arnd@arndb.de>
Mon, 19 Sep 2016 20:31:14 +0000 (22:31 +0200)
Pull "X-gene DTS changes queued for v4.9" from Duc Dang:

This change set includes:
+ DTS entry to enable SoC PMU for X-Gene v1 SoC
+ DTS entry to enable SoC PMU for X-Gene v2 SoC
+ PCIe legacy interrupt polarity fix for X-Gene
+ X-Gene SoC hwmon DTS entry
+ DTS entries for X-Gene v2 CPU clock

* tag 'xgene-dts-for-v4.9' of https://github.com/AppliedMicro/xgene-next:
  arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks
  arm64: dts: apm: Add X-Gene SoC hwmon to device tree
  arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts
  arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries
  arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries

1  2 
arch/arm64/boot/dts/apm/apm-storm.dtsi

index c29dab9d18345100e17cd8f8db97a4db9e4427a2,12e8e5db7fb26fc61fac98de638bf19f2dd95b07..954ea6a8e64da430d8cbbe8356bcdbc3d8e18d27
  
        timer {
                compatible = "arm,armv8-timer";
 -              interrupts = <1 0 0xff01>,      /* Secure Phys IRQ */
 -                           <1 13 0xff01>,     /* Non-secure Phys IRQ */
 -                           <1 14 0xff01>,     /* Virt IRQ */
 -                           <1 15 0xff01>;     /* Hyp IRQ */
 +              interrupts = <1 0 0xff08>,      /* Secure Phys IRQ */
 +                           <1 13 0xff08>,     /* Non-secure Phys IRQ */
 +                           <1 14 0xff08>,     /* Virt IRQ */
 +                           <1 15 0xff08>;     /* Hyp IRQ */
                clock-frequency = <50000000>;
        };
  
                        };
                };
  
+               pmu: pmu@78810000 {
+                       compatible = "apm,xgene-pmu-v2";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+                       regmap-csw = <&csw>;
+                       regmap-mcba = <&mcba>;
+                       regmap-mcbb = <&mcbb>;
+                       reg = <0x0 0x78810000 0x0 0x1000>;
+                       interrupts = <0x0 0x22 0x4>;
+                       pmul3c@7e610000 {
+                               compatible = "apm,xgene-pmu-l3c";
+                               reg = <0x0 0x7e610000 0x0 0x1000>;
+                       };
+                       pmuiob@7e940000 {
+                               compatible = "apm,xgene-pmu-iob";
+                               reg = <0x0 0x7e940000 0x0 0x1000>;
+                       };
+                       pmucmcb@7e710000 {
+                               compatible = "apm,xgene-pmu-mcb";
+                               reg = <0x0 0x7e710000 0x0 0x1000>;
+                               enable-bit-index = <0>;
+                       };
+                       pmucmcb@7e730000 {
+                               compatible = "apm,xgene-pmu-mcb";
+                               reg = <0x0 0x7e730000 0x0 0x1000>;
+                               enable-bit-index = <1>;
+                       };
+                       pmucmc@7e810000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e810000 0x0 0x1000>;
+                               enable-bit-index = <0>;
+                       };
+                       pmucmc@7e850000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e850000 0x0 0x1000>;
+                               enable-bit-index = <1>;
+                       };
+                       pmucmc@7e890000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e890000 0x0 0x1000>;
+                               enable-bit-index = <2>;
+                       };
+                       pmucmc@7e8d0000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e8d0000 0x0 0x1000>;
+                               enable-bit-index = <3>;
+                       };
+               };
                pcie0: pcie@1f2b0000 {
                        status = "disabled";
                        device_type = "pci";
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x4>;
                        dma-coherent;
                        clocks = <&pcie0clk 0>;
                        msi-parent = <&msi>;
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x4>;
                        dma-coherent;
                        clocks = <&pcie1clk 0>;
                        msi-parent = <&msi>;
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd0 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd0 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x4>;
                        dma-coherent;
                        clocks = <&pcie2clk 0>;
                        msi-parent = <&msi>;
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd6 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xd6 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x4>;
                        dma-coherent;
                        clocks = <&pcie3clk 0>;
                        msi-parent = <&msi>;
                        dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
                                      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
-                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x1
-                                        0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x1
-                                        0x0 0x0 0x0 0x3 &gic 0x0 0xdc 0x1
-                                        0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x1>;
+                       interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x4
+                                        0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x4
+                                        0x0 0x0 0x0 0x3 &gic 0x0 0xdc 0x4
+                                        0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x4>;
                        dma-coherent;
                        clocks = <&pcie4clk 0>;
                        msi-parent = <&msi>;
                        mboxes = <&mailbox 0>;
                };
  
+               hwmonslimpro {
+                       compatible = "apm,xgene-slimpro-hwmon";
+                       mboxes = <&mailbox 7>;
+               };
                serial0: serial@1c020000 {
                        status = "disabled";
                        device_type = "serial";