iwlwifi: make configuration structs smaller
authorJohannes Berg <johannes.berg@intel.com>
Tue, 12 Apr 2016 10:36:01 +0000 (12:36 +0200)
committerLuca Coelho <luciano.coelho@intel.com>
Tue, 10 May 2016 19:34:06 +0000 (22:34 +0300)
Since we have a lot of configuration structs (almost 70) saving
some memory in each one of them leads to an overall saving of
~2.6KiB of memory.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
drivers/net/wireless/intel/iwlwifi/iwl-1000.c
drivers/net/wireless/intel/iwlwifi/iwl-2000.c
drivers/net/wireless/intel/iwlwifi/iwl-5000.c
drivers/net/wireless/intel/iwlwifi/iwl-6000.c
drivers/net/wireless/intel/iwlwifi/iwl-7000.c
drivers/net/wireless/intel/iwlwifi/iwl-8000.c
drivers/net/wireless/intel/iwlwifi/iwl-9000.c
drivers/net/wireless/intel/iwlwifi/iwl-config.h
drivers/net/wireless/intel/iwlwifi/pcie/trans.c

index 5c2aae64d59fccdfd30cb34613f966591e145721..b2573b1d15065b088de26863baa1a3d453008507 100644 (file)
@@ -52,7 +52,7 @@
 static const struct iwl_base_params iwl1000_base_params = {
        .num_of_queues = IWLAGN_NUM_QUEUES,
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
-       .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
+       .pll_cfg = true,
        .max_ll_items = OTP_MAX_LL_ITEMS_1000,
        .shadow_ram_support = false,
        .led_compensation = 51,
index 2e823bdc4757b15ab16c743ec8f7617d54ff91b2..1b32ad413b9e04ef2c980e7b741fcb27f8b57007 100644 (file)
@@ -62,7 +62,6 @@
 static const struct iwl_base_params iwl2000_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
        .num_of_queues = IWLAGN_NUM_QUEUES,
-       .pll_cfg_val = 0,
        .max_ll_items = OTP_MAX_LL_ITEMS_2x00,
        .shadow_ram_support = true,
        .led_compensation = 51,
@@ -76,7 +75,6 @@ static const struct iwl_base_params iwl2000_base_params = {
 static const struct iwl_base_params iwl2030_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
        .num_of_queues = IWLAGN_NUM_QUEUES,
-       .pll_cfg_val = 0,
        .max_ll_items = OTP_MAX_LL_ITEMS_2x00,
        .shadow_ram_support = true,
        .led_compensation = 57,
index 4c3e3cf4c799d221d669d89b59a3bb0915944917..4aa8f0a05c8aea14ec98392cd9e0c6091687b458 100644 (file)
@@ -53,7 +53,7 @@
 static const struct iwl_base_params iwl5000_base_params = {
        .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
        .num_of_queues = IWLAGN_NUM_QUEUES,
-       .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
+       .pll_cfg = true,
        .led_compensation = 51,
        .wd_timeout = IWL_WATCHDOG_DISABLED,
        .max_event_log_size = 512,
index 5a7b7e1f0aab5d790774b41f8a34711d26ee2044..0b9f6a7bc83439eeb8665c2176a0efb2655d79d1 100644 (file)
@@ -71,7 +71,6 @@
 static const struct iwl_base_params iwl6000_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
        .num_of_queues = IWLAGN_NUM_QUEUES,
-       .pll_cfg_val = 0,
        .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
        .shadow_ram_support = true,
        .led_compensation = 51,
@@ -84,7 +83,6 @@ static const struct iwl_base_params iwl6000_base_params = {
 static const struct iwl_base_params iwl6050_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
        .num_of_queues = IWLAGN_NUM_QUEUES,
-       .pll_cfg_val = 0,
        .max_ll_items = OTP_MAX_LL_ITEMS_6x50,
        .shadow_ram_support = true,
        .led_compensation = 51,
@@ -97,7 +95,6 @@ static const struct iwl_base_params iwl6050_base_params = {
 static const struct iwl_base_params iwl6000_g2_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE,
        .num_of_queues = IWLAGN_NUM_QUEUES,
-       .pll_cfg_val = 0,
        .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
        .shadow_ram_support = true,
        .led_compensation = 57,
index abd2904ecc4816c0ec8e81194e09dc04240aabdf..f4d92155fa76e8ceadbdacb5c931bda228d8478a 100644 (file)
 static const struct iwl_base_params iwl7000_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_7000,
        .num_of_queues = 31,
-       .pll_cfg_val = 0,
        .shadow_ram_support = true,
        .led_compensation = 57,
        .wd_timeout = IWL_LONG_WD_TIMEOUT,
index d6bff166b269c5dd1cccd11748941d6ffcab6108..8bf11c918dfd082d4f8f9d3272427e8f315297e8 100644 (file)
 static const struct iwl_base_params iwl8000_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_8000,
        .num_of_queues = 31,
-       .pll_cfg_val = 0,
        .shadow_ram_support = true,
        .led_compensation = 57,
        .wd_timeout = IWL_LONG_WD_TIMEOUT,
index a0eeb536ad72296bfe6529414b240580602e5481..3ac298fdd3cd5cbbeba122750676eb2d94516c8b 100644 (file)
@@ -87,7 +87,6 @@
 static const struct iwl_base_params iwl9000_base_params = {
        .eeprom_size = OTP_LOW_IMAGE_SIZE_FAMILY_9000,
        .num_of_queues = 31,
-       .pll_cfg_val = 0,
        .shadow_ram_support = true,
        .led_compensation = 57,
        .wd_timeout = IWL_LONG_WD_TIMEOUT,
index 6eef5dc50293600e2e3e77d5fa1a7747b796dc02..4a0af7de82fd932ab53c395d98d81331bc08abc3 100644 (file)
@@ -6,6 +6,7 @@
  * GPL LICENSE SUMMARY
  *
  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
+ * Copyright (C) 2016 Intel Deutschland GmbH
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
@@ -31,6 +32,7 @@
  * BSD LICENSE
  *
  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
+ * Copyright (C) 2016 Intel Deutschland GmbH
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -165,20 +167,22 @@ static inline u8 num_of_ant(u8 mask)
  * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
  */
 struct iwl_base_params {
-       int eeprom_size;
-       int num_of_queues;      /* def: HW dependent */
-       /* for iwl_pcie_apm_init() */
-       u32 pll_cfg_val;
-
-       const u16 max_ll_items;
-       const bool shadow_ram_support;
-       u16 led_compensation;
        unsigned int wd_timeout;
-       u32 max_event_log_size;
-       const bool shadow_reg_enable;
-       const bool pcie_l1_allowed;
-       const bool apmg_wake_up_wa;
-       const bool scd_chain_ext_wa;
+
+       u16 eeprom_size;
+       u16 max_event_log_size;
+
+       u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
+          shadow_ram_support:1,
+          shadow_reg_enable:1,
+          pcie_l1_allowed:1,
+          apmg_wake_up_wa:1,
+          scd_chain_ext_wa:1;
+
+       u8 num_of_queues;       /* def: HW dependent */
+
+       u8 max_ll_items;
+       u8 led_compensation;
 };
 
 /*
@@ -189,10 +193,10 @@ struct iwl_base_params {
  */
 struct iwl_ht_params {
        enum ieee80211_smps_mode smps_mode;
-       const bool ht_greenfield_support; /* if used set to true */
-       const bool stbc;
-       const bool ldpc;
-       bool use_rts_for_aggregation;
+       u8 ht_greenfield_support:1,
+          stbc:1,
+          ldpc:1,
+          use_rts_for_aggregation:1;
        u8 ht40_bands;
 };
 
@@ -233,10 +237,10 @@ struct iwl_tt_params {
        u32 tx_protection_entry;
        u32 tx_protection_exit;
        struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
-       bool support_ct_kill;
-       bool support_dynamic_smps;
-       bool support_tx_protection;
-       bool support_tx_backoff;
+       u8 support_ct_kill:1,
+          support_dynamic_smps:1,
+          support_tx_protection:1,
+          support_tx_backoff:1;
 };
 
 /*
@@ -324,51 +328,51 @@ struct iwl_cfg {
        /* params specific to an individual device within a device family */
        const char *name;
        const char *fw_name_pre;
-       const unsigned int ucode_api_max;
-       const unsigned int ucode_api_min;
-       const enum iwl_device_family device_family;
-       const u32 max_data_size;
-       const u32 max_inst_size;
-       u8   valid_tx_ant;
-       u8   valid_rx_ant;
-       u8   non_shared_ant;
-       bool bt_shared_single_ant;
-       u16  nvm_ver;
-       u16  nvm_calib_ver;
        /* params not likely to change within a device family */
        const struct iwl_base_params *base_params;
        /* params likely to change within a device family */
        const struct iwl_ht_params *ht_params;
        const struct iwl_eeprom_params *eeprom_params;
-       enum iwl_led_mode led_mode;
-       const bool rx_with_siso_diversity;
-       const bool internal_wimax_coex;
-       const bool host_interrupt_operation_mode;
-       bool high_temp;
-       u8   nvm_hw_section_num;
-       bool mac_addr_from_csr;
-       bool lp_xtal_workaround;
        const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
-       bool no_power_up_nic_in_init;
        const char *default_nvm_file_B_step;
        const char *default_nvm_file_C_step;
-       netdev_features_t features;
-       unsigned int max_rx_agg_size;
-       bool disable_dummy_notification;
-       unsigned int max_tx_agg_size;
-       unsigned int max_ht_ampdu_exponent;
-       unsigned int max_vht_ampdu_exponent;
-       const u32 dccm_offset;
-       const u32 dccm_len;
-       const u32 dccm2_offset;
-       const u32 dccm2_len;
-       const u32 smem_offset;
-       const u32 smem_len;
        const struct iwl_tt_params *thermal_params;
-       bool apmg_not_supported;
-       bool mq_rx_supported;
-       bool vht_mu_mimo_supported;
-       bool rf_id;
+       enum iwl_device_family device_family;
+       enum iwl_led_mode led_mode;
+       u32 max_data_size;
+       u32 max_inst_size;
+       netdev_features_t features;
+       u32 dccm_offset;
+       u32 dccm_len;
+       u32 dccm2_offset;
+       u32 dccm2_len;
+       u32 smem_offset;
+       u32 smem_len;
+       u16 nvm_ver;
+       u16 nvm_calib_ver;
+       u16 rx_with_siso_diversity:1,
+           bt_shared_single_ant:1,
+           internal_wimax_coex:1,
+           host_interrupt_operation_mode:1,
+           high_temp:1,
+           mac_addr_from_csr:1,
+           lp_xtal_workaround:1,
+           no_power_up_nic_in_init:1,
+           disable_dummy_notification:1,
+           apmg_not_supported:1,
+           mq_rx_supported:1,
+           vht_mu_mimo_supported:1,
+           rf_id:1;
+       u8 valid_tx_ant;
+       u8 valid_rx_ant;
+       u8 non_shared_ant;
+       u8 nvm_hw_section_num;
+       u8 max_rx_agg_size;
+       u8 max_tx_agg_size;
+       u8 max_ht_ampdu_exponent;
+       u8 max_vht_ampdu_exponent;
+       u8 ucode_api_max;
+       u8 ucode_api_min;
 };
 
 /*
index eb9bdf0ba02ae706c17e398562207423ff0e0e2d..edf9e23869c1ea1a2f6aa3ecde0ac0f55df1b466 100644 (file)
@@ -269,9 +269,8 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
        iwl_pcie_apm_config(trans);
 
        /* Configure analog phase-lock-loop before activating to D0A */
-       if (trans->cfg->base_params->pll_cfg_val)
-               iwl_set_bit(trans, CSR_ANA_PLL_CFG,
-                           trans->cfg->base_params->pll_cfg_val);
+       if (trans->cfg->base_params->pll_cfg)
+               iwl_set_bit(trans, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
 
        /*
         * Set "initialization complete" bit to move adapter from