ASoC: rt5677: fixed wrong DMIC ref clock

DMIC clock source is not from codec system clock directly. it is
generated from the division of system clock. And it should be 256 *
sample rate of AIF1.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index c6d4e8fa8bd36d02adb057f43dd28875c53993f3..84d162d91ff6ee5d55c400e6a46dc2de2505eceb 100644 (file)
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -904,7 +904,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 {
        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
        struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
-       int idx = rl6231_calc_dmic_clk(rt5677->sysclk);
+       int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8);
 
        if (idx < 0)
                dev_err(codec->dev, "Failed to set DMIC clock\n");