drm/amdgpu/sriov: add ring_stop before ring_create in psp v11 code
authorJack Zhang <Jack.Zhang1@amd.com>
Tue, 10 Sep 2019 04:29:14 +0000 (12:29 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 16 Sep 2019 15:11:28 +0000 (10:11 -0500)
psp  v11 code missed ring stop in ring create function(VMR)
while psp v3.1 code had the code. This will cause VM destroy1
fail and psp ring create fail.

For SIOV-VF, ring_stop should not be deleted in ring_create
function.

Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

index 9193f3f87615129efb42d603258aa08402dc9b6d..64802e88a9a2fb80e4c7bcff37108711d66eea30 100644 (file)
@@ -399,6 +399,34 @@ static bool psp_v11_0_support_vmr_ring(struct psp_context *psp)
        return false;
 }
 
+static int psp_v11_0_ring_stop(struct psp_context *psp,
+                             enum psp_ring_type ring_type)
+{
+       int ret = 0;
+       struct amdgpu_device *adev = psp->adev;
+
+       /* Write the ring destroy command*/
+       if (psp_v11_0_support_vmr_ring(psp))
+               WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,
+                                    GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING);
+       else
+               WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
+                                    GFX_CTRL_CMD_ID_DESTROY_RINGS);
+
+       /* there might be handshake issue with hardware which needs delay */
+       mdelay(20);
+
+       /* Wait for response flag (bit 31) */
+       if (psp_v11_0_support_vmr_ring(psp))
+               ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),
+                                  0x80000000, 0x80000000, false);
+       else
+               ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
+                                  0x80000000, 0x80000000, false);
+
+       return ret;
+}
+
 static int psp_v11_0_ring_create(struct psp_context *psp,
                                enum psp_ring_type ring_type)
 {
@@ -408,6 +436,12 @@ static int psp_v11_0_ring_create(struct psp_context *psp,
        struct amdgpu_device *adev = psp->adev;
 
        if (psp_v11_0_support_vmr_ring(psp)) {
+               ret = psp_v11_0_ring_stop(psp, ring_type);
+               if (ret) {
+                       DRM_ERROR("psp_v11_0_ring_stop_sriov failed!\n");
+                       return ret;
+               }
+
                /* Write low address of the ring to C2PMSG_102 */
                psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);
                WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);
@@ -452,33 +486,6 @@ static int psp_v11_0_ring_create(struct psp_context *psp,
        return ret;
 }
 
-static int psp_v11_0_ring_stop(struct psp_context *psp,
-                             enum psp_ring_type ring_type)
-{
-       int ret = 0;
-       struct amdgpu_device *adev = psp->adev;
-
-       /* Write the ring destroy command*/
-       if (psp_v11_0_support_vmr_ring(psp))
-               WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,
-                                    GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING);
-       else
-               WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
-                                    GFX_CTRL_CMD_ID_DESTROY_RINGS);
-
-       /* there might be handshake issue with hardware which needs delay */
-       mdelay(20);
-
-       /* Wait for response flag (bit 31) */
-       if (psp_v11_0_support_vmr_ring(psp))
-               ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),
-                                  0x80000000, 0x80000000, false);
-       else
-               ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
-                                  0x80000000, 0x80000000, false);
-
-       return ret;
-}
 
 static int psp_v11_0_ring_destroy(struct psp_context *psp,
                                 enum psp_ring_type ring_type)