intel-iommu: Fix tiny theoretical race in write-buffer flush.

In iommu_flush_write_buffer() we read iommu->gcmd before taking the
register_lock, and then we mask in the WBF bit and write it to the
register.

There is a tiny chance that something else could have _changed_
iommu->gcmd before we take the lock, but after we read it. So we could
be undoing that change.

Never actually going to have happened in practice, since nothing else
changes that register at runtime -- aside from the write-buffer flush
it's only ever touched at startup for enabling translation, etc.

But worth fixing anyway.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index f47d04aced87065ab5b892c690971e4f85636dc7..2e2c7406131d46144f0d37732d2daf1a31d39d89 100644 (file)
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -844,10 +844,8 @@ static void iommu_flush_write_buffer(struct intel_iommu *iommu)
 
        if (!rwbf_quirk && !cap_rwbf(iommu->cap))
                return;
-       val = iommu->gcmd | DMA_GCMD_WBF;
-
        spin_lock_irqsave(&iommu->register_lock, flag);
-       writel(val, iommu->reg + DMAR_GCMD_REG);
+       writel(iommu->gcmd | DMA_GCMD_WBF, iommu->reg + DMAR_GCMD_REG);
 
        /* Make sure hardware complete it */
        IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,