Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 10 Nov 2015 17:33:06 +0000 (09:33 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 10 Nov 2015 17:33:06 +0000 (09:33 -0800)
Pull drm updates from Dave Airlie:
 "I Was Almost Tempted To Capitalise Every Word, but then I decided I
  couldn't read it myself!

  I've also got one pull request for the sti driver outstanding.  It
  relied on a commit in Greg's tree and I didn't find out in time, that
  commit is in your tree now so I might send that along once this is
  merged.

  I also had the accidental misfortune to have access to a Skylake on my
  desk for a few days, and I've had to encourage Intel to try harder,
  which seems to be happening now.

  Here is the main drm-next pull request for 4.4.

  Highlights:

  New driver:
        vc4 driver for the Rasberry Pi VPU.
        (From Eric Anholt at Broadcom.)

  Core:
        Atomic fbdev support
        Atomic helpers for runtime pm
        dp/aux i2c STATUS_UPDATE handling
        struct_mutex usage cleanups.
        Generic of probing support.

  Documentation:
        Kerneldoc for VGA switcheroo code.
        Rename to gpu instead of drm to reflect scope.

  i915:
        Skylake GuC firmware fixes
        HPD A support
        VBT backlight fallbacks
        Fastboot by default for some systems
        FBC work
        BXT/SKL workarounds
        Skylake deeper sleep state fixes

  amdgpu:
        Enable GPU scheduler by default
        New atombios opcodes
        GPUVM debugging options
        Stoney support.
        Fencing cleanups.

  radeon:
        More efficient CS checking

  nouveau:
        gk20a instance memory handling improvements.
        Improved PGOB detection and GK107 support
        Kepler GDDR5 PLL statbility improvement
        G8x/GT2xx reclock improvements
        new userspace API compatiblity fixes.

  virtio-gpu:
        Add 3D support - qemu 2.5 has it merged for it's gtk backend.

  msm:
        Initial msm88896 (snapdragon 8200)

  exynos:
        HDMI cleanups
        Enable mixer driver byt default
        Add DECON-TV support

  vmwgfx:
        Move to using memremap + fixes.

  rcar-du:
        Add support for R8A7793/4 DU

  armada:
        Remove support for non-component mode
        Improved plane handling
        Power savings while in DPMS off.

  tda998x:
        Remove unused slave encoder support
        Use more HDMI helpers
        Fix EDID read handling

  dwhdmi:
        Interlace video mode support for ipu-v3/dw_hdmi
        Hotplug state fixes
        Audio driver integration

  imx:
        More color formats support.

  tegra:
        Minor fixes/improvements"

[ Merge fixup: remove unused variable 'dev' that had all uses removed in
  commit 4e270f088011: "drm/gem: Drop struct_mutex requirement from
  drm_gem_mmap_obj" ]

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
  drm/vmwgfx: Relax irq locking somewhat
  drm/vmwgfx: Properly flush cursor updates and page-flips
  drm/i915/skl: disable display side power well support for now
  drm/i915: Extend DSL readout fix to BDW and SKL.
  drm/i915: Do graphics device reset under forcewake
  drm/i915: Skip fence installation for objects with rotated views (v4)
  vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
  drm/amdgpu: group together common fence implementation
  drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
  drm/amdgpu: remove now unused fence functions
  drm/amdgpu: fix fence fallback check
  drm/amdgpu: fix stoping the scheduler timeout
  drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
  drm/i915: Fix locking around GuC firmware load
  drm/amdgpu: update Fiji's Golden setting
  drm/amdgpu: update Fiji's rev id
  drm/amdgpu: extract common code in vi_common_early_init
  drm/amd/scheduler: don't oops on failure to load
  drm/amdgpu: don't oops on failure to load (v2)
  drm/amdgpu: don't VT switch on suspend
  ...

26 files changed:
1  2 
Documentation/DocBook/Makefile
Documentation/devicetree/bindings/display/msm/hdmi.txt
Documentation/devicetree/bindings/display/msm/mdp.txt
Documentation/devicetree/bindings/display/renesas,du.txt
Documentation/kernel-parameters.txt
MAINTAINERS
arch/arm/configs/exynos_defconfig
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
drivers/gpu/drm/drm_crtc.c
drivers/gpu/drm/drm_gem.c
drivers/gpu/drm/drm_gem_cma_helper.c
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_userptr.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_ringbuffer.c
drivers/gpu/drm/radeon/radeon_pm.c
drivers/gpu/drm/virtio/virtgpu_fence.c
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
include/drm/drmP.h
include/linux/fb.h
sound/pci/hda/hda_intel.c

Simple merge
index e926239e11011c7b96e4b19d6f0f272853cb621d,0000000000000000000000000000000000000000..379ee2ea9a3d848e881af9cc45809004cd1022ea
mode 100644,000000..100644
--- /dev/null
@@@ -1,55 -1,0 +1,58 @@@
 +Qualcomm adreno/snapdragon hdmi output
 +
 +Required properties:
 +- compatible: one of the following
++   * "qcom,hdmi-tx-8996"
 +   * "qcom,hdmi-tx-8994"
 +   * "qcom,hdmi-tx-8084"
 +   * "qcom,hdmi-tx-8974"
 +   * "qcom,hdmi-tx-8660"
 +   * "qcom,hdmi-tx-8960"
 +- reg: Physical base address and length of the controller's registers
 +- reg-names: "core_physical"
 +- interrupts: The interrupt signal from the hdmi block.
 +- clocks: device clocks
 +  See ../clocks/clock-bindings.txt for details.
 +- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
 +- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
 +- qcom,hdmi-tx-hpd-gpio: hpd pin
 +- core-vdda-supply: phandle to supply regulator
 +- hdmi-mux-supply: phandle to mux regulator
 +
 +Optional properties:
 +- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
 +- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
++- power-domains: reference to the power domain(s), if available.
 +- pinctrl-names: the pin control state names; should contain "default"
 +- pinctrl-0: the default pinctrl state (active)
 +- pinctrl-1: the "sleep" pinctrl state
 +
 +Example:
 +
 +/ {
 +      ...
 +
 +      hdmi: qcom,hdmi-tx-8960@4a00000 {
 +              compatible = "qcom,hdmi-tx-8960";
 +              reg-names = "core_physical";
 +              reg = <0x04a00000 0x1000>;
 +              interrupts = <GIC_SPI 79 0>;
++              power-domains = <&mmcc MDSS_GDSC>;
 +              clock-names =
 +                  "core_clk",
 +                  "master_iface_clk",
 +                  "slave_iface_clk";
 +              clocks =
 +                  <&mmcc HDMI_APP_CLK>,
 +                  <&mmcc HDMI_M_AHB_CLK>,
 +                  <&mmcc HDMI_S_AHB_CLK>;
 +              qcom,hdmi-tx-ddc-clk = <&msmgpio 70 GPIO_ACTIVE_HIGH>;
 +              qcom,hdmi-tx-ddc-data = <&msmgpio 71 GPIO_ACTIVE_HIGH>;
 +              qcom,hdmi-tx-hpd = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
 +              core-vdda-supply = <&pm8921_hdmi_mvs>;
 +              hdmi-mux-supply = <&ext_3p3v>;
 +              pinctrl-names = "default", "sleep";
 +              pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;
 +              pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
 +      };
 +};
index 1a0598e5279df04cf63e581066309744f06df3ab,0000000000000000000000000000000000000000..0833edaba4c3704717726af66a105d0aade1d4ea
mode 100644,000000..100644
--- /dev/null
@@@ -1,48 -1,0 +1,49 @@@
-   * "lut_clk"
 +Qualcomm adreno/snapdragon display controller
 +
 +Required properties:
 +- compatible:
 +  * "qcom,mdp" - mdp4
 +- reg: Physical base address and length of the controller's registers.
 +- interrupts: The interrupt signal from the display controller.
 +- connectors: array of phandles for output device(s)
 +- clocks: device clocks
 +  See ../clocks/clock-bindings.txt for details.
 +- clock-names: the following clocks are required:
 +  * "core_clk"
 +  * "iface_clk"
 +  * "src_clk"
 +  * "hdmi_clk"
 +  * "mpd_clk"
 +
 +Optional properties:
 +- gpus: phandle for gpu device
++- clock-names: the following clocks are optional:
++  * "lut_clk"
 +
 +Example:
 +
 +/ {
 +      ...
 +
 +      mdp: qcom,mdp@5100000 {
 +              compatible = "qcom,mdp";
 +              reg = <0x05100000 0xf0000>;
 +              interrupts = <GIC_SPI 75 0>;
 +              connectors = <&hdmi>;
 +              gpus = <&gpu>;
 +              clock-names =
 +                  "core_clk",
 +                  "iface_clk",
 +                  "lut_clk",
 +                  "src_clk",
 +                  "hdmi_clk",
 +                  "mdp_clk";
 +              clocks =
 +                  <&mmcc MDP_SRC>,
 +                  <&mmcc MDP_AHB_CLK>,
 +                  <&mmcc MDP_LUT_CLK>,
 +                  <&mmcc TV_SRC>,
 +                  <&mmcc HDMI_TV_CLK>,
 +                  <&mmcc MDP_TV_CLK>;
 +      };
 +};
index c902323928f700a356d7e8fd118cde2e680e2c94,0000000000000000000000000000000000000000..eccd4f4867b29cd9e5a1c6fee231fadfb79b5e8e
mode 100644,000000..100644
--- /dev/null
@@@ -1,88 -1,0 +1,92 @@@
-     - "renesas,du-r8a7791" for R8A7791 (R-Car M2) compatible DU
 +* Renesas R-Car Display Unit (DU)
 +
 +Required Properties:
 +
 +  - compatible: must be one of the following.
 +    - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
 +    - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
-     - R8A7790 and R8A7791 use one functional clock per channel and one clock
-       per LVDS encoder. The functional clocks must be named "du.x" with "x"
-       being the channel numerical index. The LVDS clocks must be named
++    - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
++    - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
++    - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
 +
 +  - reg: A list of base address and length of each memory resource, one for
 +    each entry in the reg-names property.
 +  - reg-names: Name of the memory resources. The DU requires one memory
 +    resource for the DU core (named "du") and one memory resource for each
 +    LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
 +    index).
 +
 +  - interrupt-parent: phandle of the parent interrupt controller.
 +  - interrupts: Interrupt specifiers for the DU interrupts.
 +
 +  - clocks: A list of phandles + clock-specifier pairs, one for each entry in
 +    the clock-names property.
 +  - clock-names: Name of the clocks. This property is model-dependent.
 +    - R8A7779 uses a single functional clock. The clock doesn't need to be
 +      named.
-  R8A7791 (M2) DPAD            LVDS 0          -
++    - R8A779[0134] use one functional clock per channel and one clock per LVDS
++      encoder (if available). The functional clocks must be named "du.x" with
++      "x" being the channel numerical index. The LVDS clocks must be named
 +      "lvds.x" with "x" being the LVDS encoder numerical index.
 +    - In addition to the functional and encoder clocks, all DU versions also
 +      support externally supplied pixel clocks. Those clocks are optional.
 +      When supplied they must be named "dclkin.x" with "x" being the input
 +      clock numerical index.
 +
 +Required nodes:
 +
 +The connections to the DU output video ports are modeled using the OF graph
 +bindings specified in Documentation/devicetree/bindings/graph.txt.
 +
 +The following table lists for each supported model the port number
 +corresponding to each DU output.
 +
 +              Port 0          Port1           Port2
 +-----------------------------------------------------------------------------
 + R8A7779 (H1) DPAD 0          DPAD 1          -
 + R8A7790 (H2) DPAD            LVDS 0          LVDS 1
++ R8A7791 (M2-W)       DPAD            LVDS 0          -
++ R8A7793 (M2-N)       DPAD            LVDS 0          -
++ R8A7794 (E2) DPAD 0          DPAD 1          -
 +
 +
 +Example: R8A7790 (R-Car H2) DU
 +
 +      du: du@feb00000 {
 +              compatible = "renesas,du-r8a7790";
 +              reg = <0 0xfeb00000 0 0x70000>,
 +                    <0 0xfeb90000 0 0x1c>,
 +                    <0 0xfeb94000 0 0x1c>;
 +              reg-names = "du", "lvds.0", "lvds.1";
 +              interrupt-parent = <&gic>;
 +              interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
 +                           <0 268 IRQ_TYPE_LEVEL_HIGH>,
 +                           <0 269 IRQ_TYPE_LEVEL_HIGH>;
 +              clocks = <&mstp7_clks R8A7790_CLK_DU0>,
 +                       <&mstp7_clks R8A7790_CLK_DU1>,
 +                       <&mstp7_clks R8A7790_CLK_DU2>,
 +                       <&mstp7_clks R8A7790_CLK_LVDS0>,
 +                       <&mstp7_clks R8A7790_CLK_LVDS1>;
 +              clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
 +
 +              ports {
 +                      #address-cells = <1>;
 +                      #size-cells = <0>;
 +
 +                      port@0 {
 +                              reg = <0>;
 +                              du_out_rgb: endpoint {
 +                              };
 +                      };
 +                      port@1 {
 +                              reg = <1>;
 +                              du_out_lvds0: endpoint {
 +                              };
 +                      };
 +                      port@2 {
 +                              reg = <2>;
 +                              du_out_lvds1: endpoint {
 +                              };
 +                      };
 +              };
 +      };
Simple merge
diff --cc MAINTAINERS
index 7af7f4a01f0b83224b50f3a7f52eac58cc751b3e,ba0a1c1160b4c9776492f2a0b6504e21c3190ec5..1a73c20bc400c9b3c1efec2bf4d39b58c7286e34
@@@ -3664,15 -3618,8 +3665,16 @@@ M:    Philipp Zabel <p.zabel@pengutronix.d
  L:    dri-devel@lists.freedesktop.org
  S:    Maintained
  F:    drivers/gpu/drm/imx/
 -F:    Documentation/devicetree/bindings/drm/imx/
+ F:    drivers/gpu/ipu-v3/
 +F:    Documentation/devicetree/bindings/display/imx/
 +
 +DRM DRIVERS FOR GMA500 (Poulsbo, Moorestown and derivative chipsets)
 +M:    Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
 +L:    dri-devel@lists.freedesktop.org
 +T:    git git://github.com/patjak/drm-gma500
 +S:    Maintained
 +F:    drivers/gpu/drm/gma500
 +F:    include/drm/gma500*
  
  DRM DRIVERS FOR NVIDIA TEGRA
  M:    Thierry Reding <thierry.reding@gmail.com>
Simple merge
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index 86cc793cdf79d154b2caad7eb42a99e595812954,4fb4c45d039f65be8b65460cd88185485dde3be0..e109b49cd25d59cd7e4c10a08425d39f14c90a7c
@@@ -481,12 -481,10 +481,9 @@@ int drm_gem_cma_prime_mmap(struct drm_g
                           struct vm_area_struct *vma)
  {
        struct drm_gem_cma_object *cma_obj;
--      struct drm_device *dev = obj->dev;
        int ret;
  
-       mutex_lock(&dev->struct_mutex);
        ret = drm_gem_mmap_obj(obj, obj->size, vma);
-       mutex_unlock(&dev->struct_mutex);
        if (ret < 0)
                return ret;
  
Simple merge
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