gpio: omap: clean up edge interrupt handling
authorRussell King <rmk+kernel@armlinux.org.uk>
Mon, 10 Jun 2019 17:10:47 +0000 (20:10 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 12 Jun 2019 09:13:20 +0000 (11:13 +0200)
The edge interrupt handling was effectively:

isr = ISR_reg & enabled;
if (bank->level_mask)
level_mask = bank->level_mask & enabled;
else
level_mask = 0;

edge = isr & ~level_mask;

When bank->level_mask is zero, level_mask will be computed as zero
anyway, so the if() statement is redundant.  We are then left with:

isr = ISR_reg & enabled;
level_mask = bank->level_mask & enabled;
edge = isr & ~level_mask;

This can be simplified further to:

isr = ISR_reg & enabled;
edge = isr & ~bank->level_mask;

since the second mask with 'enabled' is redundant.

Improve the associated comment as well.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/gpio/gpio-omap.c

index 708a135e2f0cf5b799151d8c0abfbdc58f0c5276..01da1c17bb201206261fd3dbeecf0658d74827ac 100644 (file)
@@ -733,7 +733,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
 static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)
 {
        void __iomem *isr_reg = NULL;
-       u32 enabled, isr, level_mask;
+       u32 enabled, isr, edge;
        unsigned int bit;
        struct gpio_bank *bank = gpiobank;
        unsigned long wa_lock_flags;
@@ -753,16 +753,14 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)
                enabled = omap_get_gpio_irqbank_mask(bank);
                isr = readl_relaxed(isr_reg) & enabled;
 
-               if (bank->level_mask)
-                       level_mask = bank->level_mask & enabled;
-               else
-                       level_mask = 0;
-
-               /* clear edge sensitive interrupts before handler(s) are
-               called so that we don't miss any interrupt occurred while
-               executing them */
-               if (isr & ~level_mask)
-                       omap_clear_gpio_irqbank(bank, isr & ~level_mask);
+               /*
+                * Clear edge sensitive interrupts before calling handler(s)
+                * so subsequent edge transitions are not missed while the
+                * handlers are running.
+                */
+               edge = isr & ~bank->level_mask;
+               if (edge)
+                       omap_clear_gpio_irqbank(bank, edge);
 
                raw_spin_unlock_irqrestore(&bank->lock, lock_flags);