arm64: dts: stratix10: add USB ECC reset bit

The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted
as well for the USB IP to work properly.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 7c9bdc7ab50bcfd12764d7206bb0fb75e30ec8c1..3c91d07ab47e8b24a53d182f5a2f6705020de40f 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -335,8 +335,8 @@
                        interrupts = <0 93 4>;
                        phys = <&usbphy0>;
                        phy-names = "usb2-phy";
-                       resets = <&rst USB0_RESET>;
-                       reset-names = "dwc2";
+                       resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
+                       reset-names = "dwc2", "dwc2-ecc";
                        status = "disabled";
                };
 
@@ -346,8 +346,8 @@
                        interrupts = <0 94 4>;
                        phys = <&usbphy0>;
                        phy-names = "usb2-phy";
-                       resets = <&rst USB1_RESET>;
-                       reset-names = "dwc2";
+                       resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>;
+                       reset-names = "dwc2", "dwc2-ecc";
                        status = "disabled";
                };