gpio: syscon: Remove usage of syscon_regmap_lookup_by_compatible
authorAlexander Shiyan <eagle.alexander923@gmail.com>
Wed, 20 Apr 2022 06:51:02 +0000 (09:51 +0300)
committerBartosz Golaszewski <brgl@bgdev.pl>
Mon, 2 May 2022 08:41:33 +0000 (10:41 +0200)
Since version 5.13, the standard syscon bindings have been added
to all clps711x DT nodes, so we can now use the more general
syscon_regmap_lookup_by_phandle function to get the syscon pointer.

This patch removes the usage of the syscon_regmap_lookup_by_compatible
function as it is no longer used in the driver.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
drivers/gpio/gpio-syscon.c

index fdd3d497b53507b6d870161803dd7a6b60c6085d..6076937b18e73ee3016c7587e4a7ade25b3a617d 100644 (file)
@@ -38,7 +38,6 @@
  */
 
 struct syscon_gpio_data {
-       const char      *compatible;
        unsigned int    flags;
        unsigned int    bit_count;
        unsigned int    dat_bit_offset;
@@ -125,7 +124,6 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
 
 static const struct syscon_gpio_data clps711x_mctrl_gpio = {
        /* ARM CLPS711X SYSFLG1 Bits 8-10 */
-       .compatible     = "cirrus,ep7209-syscon1",
        .flags          = GPIO_SYSCON_FEAT_IN,
        .bit_count      = 3,
        .dat_bit_offset = 0x40 * 8 + 8,
@@ -182,7 +180,6 @@ static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 
 static const struct syscon_gpio_data keystone_dsp_gpio = {
        /* ARM Keystone 2 */
-       .compatible     = NULL,
        .flags          = GPIO_SYSCON_FEAT_OUT,
        .bit_count      = 28,
        .dat_bit_offset = 4,
@@ -219,33 +216,25 @@ static int syscon_gpio_probe(struct platform_device *pdev)
 
        priv->data = of_device_get_match_data(dev);
 
-       if (priv->data->compatible) {
-               priv->syscon = syscon_regmap_lookup_by_compatible(
-                                       priv->data->compatible);
-               if (IS_ERR(priv->syscon))
-                       return PTR_ERR(priv->syscon);
-       } else {
-               priv->syscon =
-                       syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");
-               if (IS_ERR(priv->syscon) && np->parent)
-                       priv->syscon = syscon_node_to_regmap(np->parent);
-               if (IS_ERR(priv->syscon))
-                       return PTR_ERR(priv->syscon);
-
-               ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
-                                                &priv->dreg_offset);
-               if (ret)
-                       dev_err(dev, "can't read the data register offset!\n");
-
-               priv->dreg_offset <<= 3;
-
-               ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
-                                                &priv->dir_reg_offset);
-               if (ret)
-                       dev_dbg(dev, "can't read the dir register offset!\n");
-
-               priv->dir_reg_offset <<= 3;
-       }
+       priv->syscon = syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");
+       if (IS_ERR(priv->syscon) && np->parent)
+               priv->syscon = syscon_node_to_regmap(np->parent);
+       if (IS_ERR(priv->syscon))
+               return PTR_ERR(priv->syscon);
+
+       ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
+                                        &priv->dreg_offset);
+       if (ret)
+               dev_err(dev, "can't read the data register offset!\n");
+
+       priv->dreg_offset <<= 3;
+
+       ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
+                                        &priv->dir_reg_offset);
+       if (ret)
+               dev_dbg(dev, "can't read the dir register offset!\n");
+
+       priv->dir_reg_offset <<= 3;
 
        priv->chip.parent = dev;
        priv->chip.owner = THIS_MODULE;