drm/amdkfd: Add gws number to kfd topology node properties
authorOak Zeng <Oak.Zeng@amd.com>
Fri, 3 May 2019 14:10:38 +0000 (09:10 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 28 May 2019 19:43:58 +0000 (14:43 -0500)
Add amdgpu_amdkfd interface to get num_gws and add num_gws
to /sys/class/kfd/kfd/topology/nodes/x/properties. Only report
num_gws if MEC FW support GWS barriers. Currently it is
determined by a module parameter which will be replaced
with MEC FW version check when firmware is ready.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
drivers/gpu/drm/amd/amdkfd/kfd_topology.h

index 98326e3b561943ed06997d17ec6b4aff63cfbdec..a4780d5532be98f8b62d7a95ba83ce68c420bf4f 100644 (file)
@@ -544,6 +544,13 @@ uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd)
        return adev->rmmio_remap.bus_addr;
 }
 
+uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
+
+       return adev->gds.gws_size;
+}
+
 int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
                                uint32_t vmid, uint64_t gpu_addr,
                                uint32_t *ib_cmd, uint32_t ib_len)
index f57f297637692819f5ef238f9a1c2ab41a139797..57006432a36e8ca9c60e1843deae9be18146dd9e 100644 (file)
@@ -169,6 +169,7 @@ int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,
 uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);
 uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);
 uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd);
+uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd);
 uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src);
 
 #define read_user_wptr(mmptr, wptr, dst)                               \
index 8fd8807272a798aa8cbf03bd3af6e24cfedca604..78706dfa753ab7ad1202ebcb7571bba52e107c06 100644 (file)
@@ -666,6 +666,16 @@ MODULE_PARM_DESC(noretry,
 int halt_if_hws_hang;
 module_param(halt_if_hws_hang, int, 0644);
 MODULE_PARM_DESC(halt_if_hws_hang, "Halt if HWS hang is detected (0 = off (default), 1 = on)");
+
+/**
+ * DOC: hws_gws_support(bool)
+ * Whether HWS support gws barriers. Default value: false (not supported)
+ * This will be replaced with a MEC firmware version check once firmware
+ * is ready
+ */
+bool hws_gws_support;
+module_param(hws_gws_support, bool, 0444);
+MODULE_PARM_DESC(hws_gws_support, "MEC FW support gws barriers (false = not supported (Default), true = supported)");
 #endif
 
 /**
index b44ea00ded9d989b5979f7022053710c2690ba31..b6a60fc3094bd21e095925240a17457081d77707 100644 (file)
@@ -161,6 +161,11 @@ extern int noretry;
  */
 extern int halt_if_hws_hang;
 
+/*
+ * Whether MEC FW support GWS barriers
+ */
+extern bool hws_gws_support;
+
 enum cache_policy {
        cache_policy_coherent,
        cache_policy_noncoherent
index 592cc6acffd915248c7e16176736024051fb5394..d241a8672599c9935f6bf23f2b8b266afad918c0 100644 (file)
@@ -454,6 +454,8 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
                        dev->node_props.lds_size_in_kb);
        sysfs_show_32bit_prop(buffer, "gds_size_in_kb",
                        dev->node_props.gds_size_in_kb);
+       sysfs_show_32bit_prop(buffer, "num_gws",
+                       dev->node_props.num_gws);
        sysfs_show_32bit_prop(buffer, "wave_front_size",
                        dev->node_props.wave_front_size);
        sysfs_show_32bit_prop(buffer, "array_count",
@@ -1289,6 +1291,9 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
        dev->node_props.num_sdma_engines = gpu->device_info->num_sdma_engines;
        dev->node_props.num_sdma_xgmi_engines =
                                gpu->device_info->num_xgmi_sdma_engines;
+       dev->node_props.num_gws = (hws_gws_support &&
+               dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ?
+               amdgpu_amdkfd_get_num_gws(dev->gpu->kgd) : 0;
 
        kfd_fill_mem_clk_max_info(dev);
        kfd_fill_iolink_non_crat_info(dev);
index 949e885dfb5328cacf2744be7cc0f056435d1c36..276354aa0fcc26745887b4298c38de0c358bbc9c 100644 (file)
@@ -65,6 +65,7 @@ struct kfd_node_properties {
        uint32_t max_waves_per_simd;
        uint32_t lds_size_in_kb;
        uint32_t gds_size_in_kb;
+       uint32_t num_gws;
        uint32_t wave_front_size;
        uint32_t array_count;
        uint32_t simd_arrays_per_engine;