ARM: dts: imx6sl: Add vivante gpu nodes

The imx6sl soc has gpu_2d and gpu_vg, no 3d support:

etnaviv-gpu 2200000.gpu: model: GC320, revision: 5007
etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215

The IP blocks seem to be already supported.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index a6b5ca48298f22106d679bf314d62b87f5f2e0d4..7a4f5dace9026b0075507f46107c95bba1ab6397 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -949,5 +949,25 @@
                                status = "disabled";
                        };
                };
+
+               gpu_2d: gpu@2200000 {
+                       compatible = "vivante,gc";
+                       reg = <0x02200000 0x4000>;
+                       interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
+                                <&clks IMX6SL_CLK_GPU2D_OVG>;
+                       clock-names = "bus", "core";
+                       power-domains = <&pd_pu>;
+               };
+
+               gpu_vg: gpu@2204000 {
+                       compatible = "vivante,gc";
+                       reg = <0x02204000 0x4000>;
+                       interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
+                                <&clks IMX6SL_CLK_GPU2D_OVG>;
+                       clock-names = "bus", "core";
+                       power-domains = <&pd_pu>;
+               };
        };
 };