ALSA: hdac: clear link output stream mapping
authorRander Wang <rander.wang@linux.intel.com>
Mon, 30 Sep 2019 14:29:45 +0000 (09:29 -0500)
committerTakashi Iwai <tiwai@suse.de>
Mon, 7 Oct 2019 01:58:48 +0000 (03:58 +0200)
Fix potential DMA hang upon starting playback on devices in HDA mode
on Intel platforms (Gemini Lake/Whiskey Lake/Comet Lake/Ice Lake). It
doesn't affect platforms before Gemini Lake or any Intel device in
non-HDA mode.

The reset value for the LOSDIV register is all output streams valid.
Clear this register to invalidate non-existent streams when the bus
is powered up.

Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190930142945.7805-1-pierre-louis.bossart@linux.intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
include/sound/hda_register.h
sound/hda/ext/hdac_ext_controller.c

index 0fd39295b426b0306e62bd7fd5e837c578f87f1c..057d2a2d0bd05f738936b167aef23a7529f76609 100644 (file)
@@ -264,6 +264,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
 #define AZX_REG_ML_LOUTPAY             0x20
 #define AZX_REG_ML_LINPAY              0x30
 
+/* bit0 is reserved, with BIT(1) mapping to stream1 */
+#define ML_LOSIDV_STREAM_MASK          0xFFFE
+
 #define ML_LCTL_SCF_MASK                       0xF
 #define AZX_MLCTL_SPA                          (0x1 << 16)
 #define AZX_MLCTL_CPA                          (0x1 << 23)
index 211ca85acd8c4dbbedb93d7fc1fea806b3e8ced6..cfab60d88c921c507b5a0121a8e8f44d177e4d06 100644 (file)
@@ -270,6 +270,11 @@ int snd_hdac_ext_bus_link_get(struct hdac_bus *bus,
 
                ret = snd_hdac_ext_bus_link_power_up(link);
 
+               /*
+                * clear the register to invalidate all the output streams
+                */
+               snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV,
+                                ML_LOSIDV_STREAM_MASK, 0);
                /*
                 *  wait for 521usec for codec to report status
                 *  HDA spec section 4.3 - Codec Discovery