MIPS: Loongson-3: Add IRQF_NO_SUSPEND to Cascade irqaction
authorHuacai Chen <chenhc@lemote.com>
Thu, 12 Mar 2015 03:51:06 +0000 (11:51 +0800)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 25 Mar 2015 12:47:55 +0000 (13:47 +0100)
HPET irq is routed to i8259 and then to MIPS CPU irq (cascade). After
commit a3e6c1eff5 (MIPS: IRQ: Fix disable_irq on CPU IRQs), if without
IRQF_NO_SUSPEND in cascade_irqaction, HPET interrupts will lost during
suspend. The result is machine cannot be waken up.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: <stable@vger.kernel.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9528/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/loongson/loongson-3/irq.c

index 21221edda7a9a7968023eabb0d190cbe8b612f29..0f75b6b3d2184b2cf0a85e59037aa6ad589b1f6d 100644 (file)
@@ -44,6 +44,7 @@ void mach_irq_dispatch(unsigned int pending)
 
 static struct irqaction cascade_irqaction = {
        .handler = no_action,
+       .flags = IRQF_NO_SUSPEND,
        .name = "cascade",
 };